coreboot-gerrit May 2019

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Change in ...coreboot[master]: mb/google/sarien: Enable UCSI device
by Duncan Laurie (Code Review) 25 May '19

25 May '19

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32358 Change subject: mb/google/sarien: Enable UCSI device ...................................................................... mb/google/sarien: Enable UCSI device Enable the UCSI driver in kconfig and add the device to the mainboard devicetree with the specified path for the UCSI device that is provided by the Wilco EC driver. This was tested on a Sarien device with the linux kernel: > cat /sys/class/typec/port0/usb_typec_revision 1.1 > cat /sys/class/typec/port0/port_type [dual] source sink Change-Id: I0fe33a8b63e04de883579a80aeb896b880da147a Signed-off-by: Duncan Laurie <dlaurie(a)google.com> --- M src/mainboard/google/sarien/Kconfig M src/mainboard/google/sarien/variants/arcada/devicetree.cb M src/mainboard/google/sarien/variants/sarien/devicetree.cb 3 files changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/32358/1 diff --git a/src/mainboard/google/sarien/Kconfig b/src/mainboard/google/sarien/Kconfig index 9d658fa..6131149 100644 --- a/src/mainboard/google/sarien/Kconfig +++ b/src/mainboard/google/sarien/Kconfig @@ -7,6 +7,7 @@ select DRIVERS_INTEL_ISH if BOARD_GOOGLE_ARCADA select DRIVERS_SPI_ACPI select DRIVERS_USB_ACPI + select DRIVERS_USB_UCSI select EC_GOOGLE_WILCO select GENERIC_SPD_BIN select GOOGLE_SMBIOS_MAINBOARD_VERSION diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index 9ecbf00..042d4f5 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -358,6 +358,10 @@ chip ec/google/wilco device pnp 0c09.0 on end end + chip drivers/usb/ucsi + register "path" = ""\\_SB.PCI0.LPCB.EC0.UCSI"" + device pnp 0ca0.0 on end + end end # LPC/eSPI device pci 1f.1 on end # P2SB device pci 1f.2 on end # Power Management Controller diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index 625655b..7b9f83e 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -391,6 +391,10 @@ chip ec/google/wilco device pnp 0c09.0 on end end + chip drivers/usb/ucsi + register "path" = ""\\_SB.PCI0.LPCB.EC0.UCSI"" + device pnp 0ca0.0 on end + end end # LPC/eSPI device pci 1f.1 on end # P2SB device pci 1f.2 on end # Power Management Controller -- To view, visit https://review.coreboot.org/c/coreboot/+/32358 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0fe33a8b63e04de883579a80aeb896b880da147a Gerrit-Change-Number: 32358 Gerrit-PatchSet: 1 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb: Remove duplicated ENABLE_VMX
by HAOUAS Elyes (Code Review) 24 May '19

24 May '19

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/30562 ) Change subject: mb: Remove duplicated ENABLE_VMX ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/30562 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I130738aa3758a9212bab10f90edb7b2ab6830597 Gerrit-Change-Number: 30562 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: mainboards: Remove duplicated ENABLE_VMX
by HAOUAS Elyes (Code Review) 24 May '19

24 May '19

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/30568 ) Change subject: mainboards: Remove duplicated ENABLE_VMX ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/30568 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I130738aa3758a9212bab10f90edb7b2ab6830597 Gerrit-Change-Number: 30568 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: src/mb: Remove duplicated ENABLE_VMX
by HAOUAS Elyes (Code Review) 24 May '19

24 May '19

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/30563 ) Change subject: src/mb: Remove duplicated ENABLE_VMX ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/30563 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I130738aa3758a9212bab10f90edb7b2ab6830597 Gerrit-Change-Number: 30563 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: ec/google/wilco: Fix radio control command
by Duncan Laurie (Code Review) 24 May '19

24 May '19

Duncan Laurie has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32973 Change subject: ec/google/wilco: Fix radio control command ...................................................................... ec/google/wilco: Fix radio control command This command is working as written, but it is not actually correct as to what the format of the command should be. Fix this and add define the other radios. There is no change in the command send to the EC. Change-Id: Ia551b08561b673d27bec2f900d97b746699b30c4 Signed-off-by: Duncan Laurie <dlaurie(a)google.com> --- M src/ec/google/wilco/commands.c M src/ec/google/wilco/commands.h 2 files changed, 10 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/32973/1 diff --git a/src/ec/google/wilco/commands.c b/src/ec/google/wilco/commands.c index 9d4170f..626f9dd 100644 --- a/src/ec/google/wilco/commands.c +++ b/src/ec/google/wilco/commands.c @@ -159,7 +159,7 @@ int wilco_ec_radio_control(enum ec_radio radio, uint8_t state) { - uint8_t radio_control[3] = { 0, radio, state }; + uint8_t radio_control[3] = { radio, RADIO_WRITE, state }; return wilco_ec_mailbox(WILCO_EC_MSG_DEFAULT, KB_RADIO_CONTROL, radio_control, ARRAY_SIZE(radio_control), diff --git a/src/ec/google/wilco/commands.h b/src/ec/google/wilco/commands.h index 9b7f2e5..9a18580 100644 --- a/src/ec/google/wilco/commands.h +++ b/src/ec/google/wilco/commands.h @@ -80,7 +80,15 @@ }; enum ec_radio { - RADIO_WIFI = 0x02, + RADIO_WIFI = 0, + RADIO_WWAN, + RADIO_BT, +}; + +enum ec_radio_action { + RADIO_READ = 1, + RADIO_WRITE, + RADIO_TOGGLE, }; enum ec_camera { -- To view, visit https://review.coreboot.org/c/coreboot/+/32973 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia551b08561b673d27bec2f900d97b746699b30c4 Gerrit-Change-Number: 32973 Gerrit-PatchSet: 1 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: payloads/external/iPXE: Add more Kconfig options
by Michał Żygowski (Code Review) 24 May '19

24 May '19

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/20782 ) Change subject: payloads/external/iPXE: Add more Kconfig options ...................................................................... Patch Set 2: Patrick could You rebase and fix conflicts? These improvements are very handful. -- To view, visit https://review.coreboot.org/c/coreboot/+/20782 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie1083d8571d9d1f1c7c71659fb6ff0de2eecad0e Gerrit-Change-Number: 20782 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Fri, 24 May 2019 13:22:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support
by Arthur Heymans (Code Review) 24 May '19

24 May '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 ) Change subject: {drivers,soc/intel/braswell}: Implement C_ENVIRONMENT_BOOTBLOCK support ...................................................................... Patch Set 30: (3 comments) > Patch Set 30: > > > Patch Set 30: > > > > (3 comments) > > > > You might want to rebase on top of https://review.coreboot.org/q/topic:%22fsp1.1+cleanup . It cleans up a few things and should make the transition and the bootflow in general cleaner. It gets rid of the many functions that do nothing but calling the next one, like the one in car_stage_entry.S > > I was wondering how to combine your cleanup and this patch. > I tested a few of your patches, not all of them yet. > > Will rebase on top of your patch next week. I was curious if your patch properly applied on top of the branch. Simply cherry-picking your patch on top of my branch applies rather ok. Not too many changes needed (mostly keep stuff from my branch that was cleaned up). If you want I could push it. I can also comment on a few things that I noticed went wrong. https://review.coreboot.org/#/c/29662/30/src/drivers/intel/fsp1_1/car.c File src/drivers/intel/fsp1_1/car.c: https://review.coreboot.org/#/c/29662/30/src/drivers/intel/fsp1_1/car.c@a182 PS30, Line 182: You need to change the implementation in strago/com_init.c and cyan/com_init.c to bootblock_mainboard_early_init(void) and link that file in the bootblock instead romstage (and also link some gpio related stuff in the bootblock for it to compile) https://review.coreboot.org/#/c/29662/30/src/soc/intel/braswell/bootblock/c… File src/soc/intel/braswell/bootblock/cache_as_ram.S: https://review.coreboot.org/#/c/29662/30/src/soc/intel/braswell/bootblock/c… PS30, Line 1: /* I wouldn't move this file, since it is FSP-T specific, not braswell (I hope no-one does, but one could want to add other FSP1.1 targets). Simply guard it like before with the Kconfig option. (IMHO it's a bit ridiculous Kconfig option as you need to run that code anyway, Skylake simply does it from native CAR instead of assembly) https://review.coreboot.org/#/c/29662/30/src/soc/intel/braswell/bootblock/c… PS30, Line 49: .global cache_as_ram unneeded? -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 30 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 24 May 2019 10:12:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: nb/amd/amdmct/mct/mctdqs_d.c: Remove variable set but not used
by HAOUAS Elyes (Code Review) 24 May '19

24 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32940 Change subject: nb/amd/amdmct/mct/mctdqs_d.c: Remove variable set but not used ...................................................................... nb/amd/amdmct/mct/mctdqs_d.c: Remove variable set but not used Change-Id: I45f32ea1ebf59a20d475dfad2d9d0980dec6918b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/amd/amdmct/mct/mctdqs_d.c 1 file changed, 1 insertion(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/32940/1 diff --git a/src/northbridge/amd/amdmct/mct/mctdqs_d.c b/src/northbridge/amd/amdmct/mct/mctdqs_d.c index e2dd56f..36ee3ab 100644 --- a/src/northbridge/amd/amdmct/mct/mctdqs_d.c +++ b/src/northbridge/amd/amdmct/mct/mctdqs_d.c @@ -1192,8 +1192,6 @@ void mct_Read1LTestPattern_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, u32 addr) { - u32 value; - /* BIOS issues the remaining (Ntrain - 2) reads after checking that * F2x11C[PrefDramTrainMode] is cleared. These reads must be to * consecutive cache lines (i.e., 64 bytes apart) and must not cross @@ -1205,5 +1203,5 @@ SetUpperFSbase(addr); /* 1st move causes read fill (to exclusive or shared)*/ - value = read32_fs(addr << 8); + read32_fs(addr << 8); } -- To view, visit https://review.coreboot.org/c/coreboot/+/32940 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45f32ea1ebf59a20d475dfad2d9d0980dec6918b Gerrit-Change-Number: 32940 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: nb/northbridge/intel/x4x/acpi.c: Remove variable set but not used
by HAOUAS Elyes (Code Review) 24 May '19

24 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32950 Change subject: nb/northbridge/intel/x4x/acpi.c: Remove variable set but not used ...................................................................... nb/northbridge/intel/x4x/acpi.c: Remove variable set but not used Change-Id: I715adbe3d90d0f5195b54c274fb7843945d3e6be Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/x4x/acpi.c 1 file changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/32950/1 diff --git a/src/northbridge/intel/x4x/acpi.c b/src/northbridge/intel/x4x/acpi.c index fb04fd8..a91d227 100644 --- a/src/northbridge/intel/x4x/acpi.c +++ b/src/northbridge/intel/x4x/acpi.c @@ -25,11 +25,9 @@ unsigned long acpi_fill_mcfg(unsigned long current) { - struct device *dev; u32 pciexbar = 0; u32 length = 0; - dev = pcidev_on_root(0, 0); if (!decode_pciebar(&pciexbar, &length)) return current; -- To view, visit https://review.coreboot.org/c/coreboot/+/32950 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I715adbe3d90d0f5195b54c274fb7843945d3e6be Gerrit-Change-Number: 32950 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: NB/amd/amdmct/mct/mctpro_d.c: Remove variable set but not used
by HAOUAS Elyes (Code Review) 24 May '19

24 May '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32949 Change subject: NB/amd/amdmct/mct/mctpro_d.c: Remove variable set but not used ...................................................................... NB/amd/amdmct/mct/mctpro_d.c: Remove variable set but not used Change-Id: Ic2f2788142329e2e4d04b531805a32d4dcaa293c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/amd/amdmct/mct/mctpro_d.c 1 file changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/32949/1 diff --git a/src/northbridge/amd/amdmct/mct/mctpro_d.c b/src/northbridge/amd/amdmct/mct/mctpro_d.c index 0acb6f4..8393733 100644 --- a/src/northbridge/amd/amdmct/mct/mctpro_d.c +++ b/src/northbridge/amd/amdmct/mct/mctpro_d.c @@ -280,7 +280,6 @@ u32 Speed; u32 ch, ch_start, ch_end; u32 index_reg; - u32 index; u32 dev; u32 val; @@ -297,7 +296,7 @@ ch_end = dct+1; } dev = pDCTstat->dev_dct; - index = 0x0D00E001; + for (ch = ch_start; ch < ch_end; ch++) { index_reg = 0x98 + 0x100 * ch; val = Get_NB32_index(dev, index_reg, 0x0D00E001); -- To view, visit https://review.coreboot.org/c/coreboot/+/32949 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic2f2788142329e2e4d04b531805a32d4dcaa293c Gerrit-Change-Number: 32949 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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coreboot-gerrit May 2019