coreboot-gerrit April 2019

coreboot-gerrit@coreboot.org

1 participants
1219 discussions

Change in ...coreboot[master]: sdm845: Add DSI clock support
by T.Michael Turney (Code Review) 11 Apr '19

11 Apr '19

Hello T Michael Turney, Sravan Kumar Deepala, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/28013 to look at the new patch set (#33). Change subject: sdm845: Add DSI clock support ...................................................................... sdm845: Add DSI clock support Change-Id: I051cb1b2150399589427922bcf5c9d270674705a Signed-off-by: Rajashekar Alusa <arajashe(a)codeaurora.org> --- M src/soc/qualcomm/sdm845/clock.c M src/soc/qualcomm/sdm845/include/soc/addressmap.h M src/soc/qualcomm/sdm845/include/soc/clock.h 3 files changed, 173 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/28013/33 -- To view, visit https://review.coreboot.org/c/coreboot/+/28013 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I051cb1b2150399589427922bcf5c9d270674705a Gerrit-Change-Number: 28013 Gerrit-PatchSet: 33 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sravan Kumar Deepala <sravank(a)qti-qualcomm.corp-partner.google.com> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add AOP firmware support
by T.Michael Turney (Code Review) 11 Apr '19

11 Apr '19

Hello T Michael Turney, Julius Werner, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25210 to look at the new patch set (#75). Change subject: sdm845: Add AOP firmware support ...................................................................... sdm845: Add AOP firmware support TEST=build & run Change-Id: I9845c8638e4b905de5d6985dc9f1fddd8b1a8942 Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/soc/qualcomm/sdm845/Makefile.inc A src/soc/qualcomm/sdm845/aop_load_reset.c M src/soc/qualcomm/sdm845/clock.c M src/soc/qualcomm/sdm845/include/soc/addressmap.h A src/soc/qualcomm/sdm845/include/soc/aop.h M src/soc/qualcomm/sdm845/include/soc/clock.h M src/soc/qualcomm/sdm845/include/soc/memlayout.ld M src/soc/qualcomm/sdm845/include/soc/symbols.h M src/soc/qualcomm/sdm845/mmu.c M src/soc/qualcomm/sdm845/soc.c 10 files changed, 109 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/25210/75 -- To view, visit https://review.coreboot.org/c/coreboot/+/25210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9845c8638e4b905de5d6985dc9f1fddd8b1a8942 Gerrit-Change-Number: 25210 Gerrit-PatchSet: 75 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add QCLib to RomStage to perform IP init
by T.Michael Turney (Code Review) 11 Apr '19

11 Apr '19

Hello T Michael Turney, Julius Werner, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25208 to look at the new patch set (#72). Change subject: sdm845: Add QCLib to RomStage to perform IP init ...................................................................... sdm845: Add QCLib to RomStage to perform IP init CB acts as I/O handler for QCLib (e.g. DDR training data) This interface allows bi-directional data flow between CB and QCLib Tested and working interfaces: DDR Training data QCLib serial console output DDR Information (base & size) limits cfg data TEST=build & run Change-Id: I073186674a1a593547d1ee1d15c7cd4fd8ad5bc1 Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/mainboard/google/cheza/chromeos.fmd M src/mainboard/google/cheza/romstage.c M src/soc/qualcomm/sdm845/Makefile.inc M src/soc/qualcomm/sdm845/include/soc/memlayout.ld M src/soc/qualcomm/sdm845/include/soc/mmu.h M src/soc/qualcomm/sdm845/include/soc/symbols.h M src/soc/qualcomm/sdm845/mmu.c M src/soc/qualcomm/sdm845/soc.c A src/soc/qualcomm/sdm845/soc_blob_load.c 9 files changed, 132 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/25208/72 -- To view, visit https://review.coreboot.org/c/coreboot/+/25208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I073186674a1a593547d1ee1d15c7cd4fd8ad5bc1 Gerrit-Change-Number: 25208 Gerrit-PatchSet: 72 Gerrit-Owner: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: T Michael Turney <mturney(a)codeaurora.org> Gerrit-Reviewer: T.Michael Turney <tturne(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variant
by Nico Huber (Code Review) 11 Apr '19

11 Apr '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31832 ) Change subject: mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variant ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/#/c/31832/5/src/mainboard/gigabyte/ga-h61m-s2pv… File src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61ma-d3v/devicetree.cb: https://review.coreboot.org/#/c/31832/5/src/mainboard/gigabyte/ga-h61m-s2pv… PS5, Line 83: irq 0x62 = 0x0a Looks like there are 2 i/o resources missing around this one. This (plus the i/o bug in the allocator) probably is why you got the resource trouble with the PCI device... -- To view, visit https://review.coreboot.org/c/coreboot/+/31832 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37928de158bb8fbb47fbda5d1ccd4efba7edab26 Gerrit-Change-Number: 31832 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Thu, 11 Apr 2019 20:22:37 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variant
by Angel Pons (Code Review) 11 Apr '19

11 Apr '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31832 ) Change subject: mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variant ...................................................................... Patch Set 5: (2 comments) https://review.coreboot.org/#/c/31832/4/src/mainboard/gigabyte/ga-h61m-s2pv… File src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61ma-d3v/devicetree.cb: https://review.coreboot.org/#/c/31832/4/src/mainboard/gigabyte/ga-h61m-s2pv… PS4, Line 78: device pnp 2e.7 off # GPIO > Is the 'off' here correct? I don't think so. Fixed. https://review.coreboot.org/#/c/31832/4/src/mainboard/gigabyte/ga-h61m-s2pv… PS4, Line 88: io 0xf6 = 0x1c > yep. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/31832 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37928de158bb8fbb47fbda5d1ccd4efba7edab26 Gerrit-Change-Number: 31832 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Thu, 11 Apr 2019 18:32:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variant
by Angel Pons (Code Review) 11 Apr '19

11 Apr '19

Hello Arthur Heymans, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/31832 to look at the new patch set (#5). Change subject: mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variant ...................................................................... mb/gigabyte/ga-h61ma-d3v: Add new mainboard as variant Tested with SeaBIOS as a payload, booting Arch Linux with a Linux kernel. The new code is based on autoport and the existing GA-H61M-S2PV code. The GA-H61M-S2PV has been boot-tested too, it still boots. Working: - S3 suspend/resume - USB ports and headers (Intel USB2 and EtronTech USB3) - Gigabit Ethernet - Integrated DVI/VGA graphics (libgfxinit) - PCIe x16 graphics - PCIe x1 ports - PS/2 port with a keyboard - SATA controllers (Intel SATA2 and Marvell SATA3) - Fan Control (fancontrol on linux works well) - Native raminit (4+4GB DDR3-1333) - flashrom, using the internal programmer. Tested with coreboot, as well as with the vendor firmware. Backup chip is untested. Untested: - VGA BIOS for integrated graphics init - Audio: Only front/read outputs has been tested. - Non-Linux OSes - ACPI thermal zone and fan control Not working: - Default IFD defines the BIOS region as the entire flash chip. Care should be taken when using flashrom and ifd-as-layout! Change-Id: I37928de158bb8fbb47fbda5d1ccd4efba7edab26 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig M src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig.name M src/mainboard/gigabyte/ga-h61m-s2pv/Makefile.inc M src/mainboard/gigabyte/ga-h61m-s2pv/hda_verb.c M src/mainboard/gigabyte/ga-h61m-s2pv/romstage.c R src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61m-s2pv/devicetree.cb R src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61m-s2pv/gpio.c A src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61m-s2pv/hda_verb.c A src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61ma-d3v/devicetree.cb A src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61ma-d3v/gpio.c A src/mainboard/gigabyte/ga-h61m-s2pv/variants/ga-h61ma-d3v/hda_verb.c 11 files changed, 433 insertions(+), 81 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/31832/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/31832 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I37928de158bb8fbb47fbda5d1ccd4efba7edab26 Gerrit-Change-Number: 31832 Gerrit-PatchSet: 5 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sb/intel/lynxpoint: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB
by Arthur Heymans (Code Review) 11 Apr '19

11 Apr '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32039 ) Change subject: sb/intel/lynxpoint: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/32039 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87ac56e4ba1fb83761786d5f32a0fc308ee9718a Gerrit-Change-Number: 32039 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 11 Apr 2019 16:02:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB
by Arthur Heymans (Code Review) 11 Apr '19

11 Apr '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32038 ) Change subject: sb/intel/i82801jx: Use SOUTHBRIDGE_INTEL_COMMON_PMCLIB ...................................................................... Patch Set 5: Code-Review+2 Looks ok. Will you create a patch for i82801ix too? -- To view, visit https://review.coreboot.org/c/coreboot/+/32038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2264c087b317f70506817b5458295a17e83b1efc Gerrit-Change-Number: 32038 Gerrit-PatchSet: 5 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 11 Apr 2019 16:01:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/braswell/acpi/lpss.asl: Remove SPI1 and PWM asl code
by Matt DeVillier (Code Review) 11 Apr '19

11 Apr '19

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29417 ) Change subject: soc/intel/braswell/acpi/lpss.asl: Remove SPI1 and PWM asl code ...................................................................... Patch Set 4: Code-Review+1 > Matt, have You possibly tested the patch already? just now tested on google/edgar, didn't see any change under Linux or Win10 -- To view, visit https://review.coreboot.org/c/coreboot/+/29417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec2ca7520081d00bf7a53d58ee054aa6f23e5606 Gerrit-Change-Number: 29417 Gerrit-PatchSet: 4 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 11 Apr 2019 15:41:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: drivers/intel/fsp1_1/raminit.c: Make check FSP HOBs independent of CO...
by Michał Żygowski (Code Review) 11 Apr '19

11 Apr '19

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29371 ) Change subject: drivers/intel/fsp1_1/raminit.c: Make check FSP HOBs independent of CONFIG_DISPLAY_HOBS ...................................................................... Patch Set 3: (3 comments) Please clean up and separate HOB checking and HOB displaying. You have also enabled prints that are a part of displaying the hobs after removing the macro. https://review.coreboot.org/#/c/29371/3/src/drivers/intel/fsp1_1/raminit.c File src/drivers/intel/fsp1_1/raminit.c: https://review.coreboot.org/#/c/29371/3/src/drivers/intel/fsp1_1/raminit.c@… PS3, Line 209: printk(BIOS_DEBUG, These prints could be moved to the print_hob_type_structure function possibly? It is kind of displaying the HOB information. https://review.coreboot.org/#/c/29371/3/src/drivers/intel/fsp1_1/raminit.c@… PS3, Line 224: printk(BIOS_DEBUG, Let's print only an error message in case of missing HOB. The debug print should be in print_hob_type_structure function then. https://review.coreboot.org/#/c/29371/3/src/drivers/intel/fsp1_1/raminit.c@… PS3, Line 229: printk(BIOS_DEBUG, These prints should be moved too. The check for missing HOB is done earlier. -- To view, visit https://review.coreboot.org/c/coreboot/+/29371 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3776fa37866c7ef3aea090842387660c22bbdd4d Gerrit-Change-Number: 29371 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: York Yang <yyang024(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 11 Apr 2019 13:53:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit April 2019