coreboot-gerrit April 2019

coreboot-gerrit@coreboot.org

1 participants
1219 discussions

Change in ...coreboot[master]: nb/intel/haswell: Add an option for where verstage starts
by Duncan Laurie (Code Review) 19 Apr '19

19 Apr '19

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26926 ) Change subject: nb/intel/haswell: Add an option for where verstage starts ...................................................................... Patch Set 49: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/26926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3b7b29f4a24c0fb830ff76fe31a35b6afcae4e67 Gerrit-Change-Number: 26926 Gerrit-PatchSet: 49 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Fri, 19 Apr 2019 14:55:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK
by Duncan Laurie (Code Review) 19 Apr '19

19 Apr '19

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/26859 ) Change subject: cpu/intel/haswell: Use C_ENVIRONMENT_BOOTBLOCK ...................................................................... Patch Set 54: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/26859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia96499a9d478127f6b9d880883ac41397b58dbea Gerrit-Change-Number: 26859 Gerrit-PatchSet: 54 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Comment-Date: Fri, 19 Apr 2019 14:54:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: Documentation: Small fixes
by Patrick Rudolph (Code Review) 19 Apr '19

19 Apr '19

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32340 Change subject: Documentation: Small fixes ...................................................................... Documentation: Small fixes * Remove empty security.md * Remove second H1 header from lib/index.md * Move two documents in appropriate subfolders * Fix file path * Drop document overview Change-Id: I0e9df6203e82003c01b84967ea6bd779d7583fef Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M Documentation/index.md R Documentation/lib/abi-data-consumption.md M Documentation/lib/index.md R Documentation/lib/timestamp.md D Documentation/security.md 5 files changed, 11 insertions(+), 39 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/32340/1 diff --git a/Documentation/index.md b/Documentation/index.md index 6eb2e69..6dbbf4d 100644 --- a/Documentation/index.md +++ b/Documentation/index.md @@ -167,13 +167,10 @@ * [Code of Conduct](community/code_of_conduct.md) * [Community forums](community/forums.md) * [coreboot at conferences](community/conferences.md) -* [Security](security.md) * [Payloads](payloads.md) * [Distributions](distributions.md) -* [Timestamps](timestamp.md) * [Intel IFD Binary Extraction](Binary_Extraction.md) * [Dealing with Untrusted Input in SMM](technotes/2017-02-dealing-with-untrusted-input-in-smm.md) -* [ABI data consumption](abi-data-consumption.md) * [GPIO toggling in ACPI AML](acpi/gpio.md) * [Native Graphics Initialization with libgfxinit](gfx/libgfxinit.md) * [Architecture-specific documentation](arch/index.md) @@ -182,6 +179,7 @@ * [Mainboard-specific documentation](mainboard/index.md) * [Payload-specific documentation](lib/payloads/index.md) * [Library-specific documentation](lib/index.md) +* [Security](security/index.md) * [SuperIO-specific documentation](superio/index.md) * [Vendorcode-specific documentation](vendorcode/index.md) * [Utilities](util.md) diff --git a/Documentation/abi-data-consumption.md b/Documentation/lib/abi-data-consumption.md similarity index 86% rename from Documentation/abi-data-consumption.md rename to Documentation/lib/abi-data-consumption.md index 962f33e..d162199 100644 --- a/Documentation/abi-data-consumption.md +++ b/Documentation/lib/abi-data-consumption.md @@ -8,8 +8,9 @@ ## Background and Usage coreboot passes information to downstream users using coreboot tables. These -table definitions can be found in src/include/boot/coreboot_tables.h and -payloads/libpayload/include/coreboot_tables.h respectively within coreboot +table definitions can be found in +`./src/commonlib/include/commonlib/coreboot_tables.h` and +`./payloads/libpayload/include/coreboot_tables.h` respectively within coreboot and libpayload. One of the most vital and important pieces of information found within these tables is the memory map of the system indicating available and reserved memory. diff --git a/Documentation/lib/index.md b/Documentation/lib/index.md index 85e0460..99b8061 100644 --- a/Documentation/lib/index.md +++ b/Documentation/lib/index.md @@ -3,5 +3,7 @@ This section contains documentation about coreboot internal technical information and libraries. -# Structure and layout +## Structure and layout - [Flashmap and Flashmap Descriptor](flashmap.md) +- [ABI data consumption](abi-data-consumption.md) +- [Timestamps](timestamp.md) diff --git a/Documentation/timestamp.md b/Documentation/lib/timestamp.md similarity index 90% rename from Documentation/timestamp.md rename to Documentation/lib/timestamp.md index 9233ed9..d5dc8fa 100644 --- a/Documentation/timestamp.md +++ b/Documentation/lib/timestamp.md @@ -1,29 +1,5 @@ # Timestamps -## Table of Contents - -Introduction -- Transition from cache to cbmem - -Data structures used -- cache_state -- table -- entries - -Function APIs -- timestamp_init -- timestamp_add -- timestamp_add_now -- timestamp_sync - -Use / Test Cases -- Case 1: Timestamp Region Exists -- Case 2: No timestamp region, fresh boot, cbmem_initialize called after timestamp_init -- Case 3: No timestamp region, fresh boot, cbmem_initialize called before timestamp_init -- Case 4: No timestamp region, resume, cbmem_initialize called after timestamp_init -- Case 5: No timestamp region, resume, cbmem_initialize called before timestamp_init - - ## Introduction The aim of the timestamp library is to make it easier for different boards @@ -64,7 +40,7 @@ The main structure that maintains information about the timestamp cache is: -``` +```c struct __packed timestamp_cache { uint16_t cache_state; struct timestamp_table table; @@ -77,7 +53,7 @@ The state of the cache is maintained by `cache_state` attribute which can be any one of the following: -``` +```c enum { TIMESTAMP_CACHE_UNINITIALIZED = 0, TIMESTAMP_CACHE_INITIALIZED, @@ -107,7 +83,7 @@ This field is represented by a structure which provides overall information about the entries in the timestamp area: -``` +```c struct timestamp_table { uint64_t base_time; uint32_t max_entries; @@ -127,7 +103,7 @@ of `MAX_TIMESTAMP_CACHE` which is defined as 16 entries. Each entry is defined by: -``` +```c struct timestamp_entry { uint32_t entry_id; uint64_t entry_stamp; diff --git a/Documentation/security.md b/Documentation/security.md deleted file mode 100644 index 73b167f..0000000 --- a/Documentation/security.md +++ /dev/null @@ -1,5 +0,0 @@ -# Security - -## Google VBoot2 Measured boot extension - -- [Measured Boot](vboot/measured_boot.md) -- To view, visit https://review.coreboot.org/c/coreboot/+/32340 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e9df6203e82003c01b84967ea6bd779d7583fef Gerrit-Change-Number: 32340 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/google/octopus: Add a missing IOstandby setting for gpio_178
by Chen Wisley (Code Review) 19 Apr '19

19 Apr '19

Chen Wisley has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32247 Change subject: mb/google/octopus: Add a missing IOstandby setting for gpio_178 ...................................................................... mb/google/octopus: Add a missing IOstandby setting for gpio_178 Other varant boards of octopus added IOstandby setting for gpio_178, excepted meep/bloog. Add a missing IOstandby setting of gpio_178 for meep/bloog. TEST=verified that boot into OS on meep board. suspend/resume, reboot, and no failure found. Change-Id: I7668ff4817edfca5c6cea63db779fcea21c7af92 Signed-off-by: Wisley Chen <wisley.chen(a)quantatw.com> --- M src/mainboard/google/octopus/variants/bloog/gpio.c M src/mainboard/google/octopus/variants/meep/gpio.c 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/32247/1 diff --git a/src/mainboard/google/octopus/variants/bloog/gpio.c b/src/mainboard/google/octopus/variants/bloog/gpio.c index 2b29cba..0c19570 100644 --- a/src/mainboard/google/octopus/variants/bloog/gpio.c +++ b/src/mainboard/google/octopus/variants/bloog/gpio.c @@ -44,7 +44,7 @@ DISPUPD), /* EN_PP3300_WLAN_L */ - PAD_CFG_GPO(GPIO_178, 0, DEEP), + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), }; const struct pad_config *variant_override_gpio_table(size_t *num) diff --git a/src/mainboard/google/octopus/variants/meep/gpio.c b/src/mainboard/google/octopus/variants/meep/gpio.c index 001a488..17157d6 100644 --- a/src/mainboard/google/octopus/variants/meep/gpio.c +++ b/src/mainboard/google/octopus/variants/meep/gpio.c @@ -26,7 +26,7 @@ DISPUPD), /* EN_PP3300_WLAN_L */ - PAD_CFG_GPO(GPIO_178, 0, DEEP), + PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, Tx0RxDCRx0, DISPUPD), }; const struct pad_config *variant_override_gpio_table(size_t *num) -- To view, visit https://review.coreboot.org/c/coreboot/+/32247 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7668ff4817edfca5c6cea63db779fcea21c7af92 Gerrit-Change-Number: 32247 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by build bot (Jenkins) (Code Review) 19 Apr '19

19 Apr '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30414 ) Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... Patch Set 22: (2 comments) https://review.coreboot.org/#/c/30414/22/src/mainboard/facebook/fbg1701/irq… File src/mainboard/facebook/fbg1701/irqroute.h: https://review.coreboot.org/#/c/30414/22/src/mainboard/facebook/fbg1701/irq… PS22, Line 40: #define PCI_DEV_PIRQ_ROUTES \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/30414/22/src/mainboard/facebook/fbg1701/irq… PS22, Line 62: #define PIRQ_PIC_ROUTES \ Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 22 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Fri, 19 Apr 2019 08:46:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/facebook/fbg1701: Do initial mainboard commit
by Frans Hendriks (Code Review) 19 Apr '19

19 Apr '19

Hello Patrick Rudolph, build bot (Jenkins), Michał Żygowski, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30414 to look at the new patch set (#22). Change subject: mainboard/facebook/fbg1701: Do initial mainboard commit ...................................................................... mainboard/facebook/fbg1701: Do initial mainboard commit Initial support for Facebook FBG-1701 system. coreboot implementation based on Intel Strago mainboard. Configure 'Onboard memory manufacture' which must match HW. BUG=N/A TEST=booting SeaBIOS and Linux 4.15+ kernel on Facebook FBG-1701 Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- A Documentation/mainboard/facebook/fbg1701.md M Documentation/mainboard/index.md A src/mainboard/facebook/fbg1701/Kconfig A src/mainboard/facebook/fbg1701/Kconfig.name A src/mainboard/facebook/fbg1701/Makefile.inc A src/mainboard/facebook/fbg1701/acpi/ec.asl A src/mainboard/facebook/fbg1701/acpi/mainboard.asl A src/mainboard/facebook/fbg1701/acpi/sleepstates.asl A src/mainboard/facebook/fbg1701/acpi/superio.asl A src/mainboard/facebook/fbg1701/acpi_tables.c A src/mainboard/facebook/fbg1701/board_info.txt A src/mainboard/facebook/fbg1701/bootblock.c A src/mainboard/facebook/fbg1701/cmos.layout A src/mainboard/facebook/fbg1701/com_init.c A src/mainboard/facebook/fbg1701/devicetree.cb A src/mainboard/facebook/fbg1701/dsdt.asl A src/mainboard/facebook/fbg1701/fadt.c A src/mainboard/facebook/fbg1701/gpio.c A src/mainboard/facebook/fbg1701/hda_verb.c A src/mainboard/facebook/fbg1701/irqroute.c A src/mainboard/facebook/fbg1701/irqroute.h A src/mainboard/facebook/fbg1701/logo.c A src/mainboard/facebook/fbg1701/mainboard.c A src/mainboard/facebook/fbg1701/mainboard.h A src/mainboard/facebook/fbg1701/onboard.h A src/mainboard/facebook/fbg1701/ramstage.c A src/mainboard/facebook/fbg1701/romstage.c A src/mainboard/facebook/fbg1701/smihandler.c A src/mainboard/facebook/fbg1701/spd/MICRON_MT41K512M16HA-125A.spd.hex A src/mainboard/facebook/fbg1701/spd/SAMSUNG_K4B8G1646D-MYKO.spd.hex A src/mainboard/facebook/fbg1701/w25q64.c 31 files changed, 2,141 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/30414/22 -- To view, visit https://review.coreboot.org/c/coreboot/+/30414 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28ac78a630ee705b1e546031f024bfe7f952ab39 Gerrit-Change-Number: 30414 Gerrit-PatchSet: 22 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: Add support for low power idle table
by Shaunak Saha (Code Review) 19 Apr '19

19 Apr '19

Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32350 ) Change subject: Add support for low power idle table ...................................................................... Patch Set 2: (2 comments) https://review.coreboot.org/#/c/32350/2//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/32350/2//COMMIT_MSG@7 PS2, Line 7: Add support for low power idle table > Please prefix with x86. Ack https://review.coreboot.org/#/c/32350/2//COMMIT_MSG@9 PS2, Line 9: kernel > Chromium OS kernel Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/32350 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie76ab0d50f09c98762bc674c2758520d53789137 Gerrit-Change-Number: 32350 Gerrit-PatchSet: 2 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 19 Apr 2019 06:57:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in ...coreboot[master]: Add support for low power idle table
by Shaunak Saha (Code Review) 19 Apr '19

19 Apr '19

Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32350 ) Change subject: Add support for low power idle table ...................................................................... Patch Set 2: (4 comments) https://review.coreboot.org/#/c/32350/2/src/arch/x86/acpi.c File src/arch/x86/acpi.c: https://review.coreboot.org/#/c/32350/2/src/arch/x86/acpi.c@1108 PS2, Line 1108: #if CONFIG(ACPI_LPIT) > no need for preprocessor Ack https://review.coreboot.org/#/c/32350/2/src/arch/x86/acpi.c@1112 PS2, Line 1112: unsigned long current = (unsigned long)lpit + sizeof(acpi_table_lpit); > can be removed Ack https://review.coreboot.org/#/c/32350/2/src/arch/x86/acpi.c@1151 PS2, Line 1151: /* (Re)calculate length and checksum. */ > why? you did not increase current? Ack https://review.coreboot.org/#/c/32350/2/src/arch/x86/acpi.c@1343 PS2, Line 1343: #if CONFIG(ACPI_LPIT) > use if(CONFIG(ACPI_LPIT)). The linker will drop unused code. Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/32350 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie76ab0d50f09c98762bc674c2758520d53789137 Gerrit-Change-Number: 32350 Gerrit-PatchSet: 2 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 19 Apr 2019 06:57:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: smbios: Fix copy paste error
by Patrick Rudolph (Code Review) 19 Apr '19

19 Apr '19

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32313 Change subject: smbios: Fix copy paste error ...................................................................... smbios: Fix copy paste error As reported by Coverity Scan CID 1400679. Change-Id: I526b78a0697b7eb3c3dc75974c3a3a714b3d343f Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/smbios.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/32313/1 diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index c565462..f40f107 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -650,7 +650,7 @@ t->max_cache_size |= SMBIOS_CACHE_SIZE_UNIT_1KB; t->max_cache_size2 |= SMBIOS_CACHE_SIZE2_UNIT_1KB; } else { - if (cache_size < (SMBIOS_CACHE_SIZE_MASK * 64 * KiB)) + if (max_cache_size < (SMBIOS_CACHE_SIZE_MASK * 64 * KiB)) t->max_cache_size = max_cache_size / (64 * KiB); else t->max_cache_size = SMBIOS_CACHE_SIZE_OVERFLOW; -- To view, visit https://review.coreboot.org/c/coreboot/+/32313 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I526b78a0697b7eb3c3dc75974c3a3a714b3d343f Gerrit-Change-Number: 32313 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: kohaku: mb/hatch/gpio: Scrub Kohaku GPIOs.
by Tim Wawrzynczak (Code Review) 19 Apr '19

19 Apr '19

Tim Wawrzynczak has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32326 Change subject: kohaku: mb/hatch/gpio: Scrub Kohaku GPIOs. ...................................................................... kohaku: mb/hatch/gpio: Scrub Kohaku GPIOs. BUG=b:129707481 BRANCH=none TEST=Compiles. Change-Id: Ie5c83a0538d367ea11e9499f21cea41891d7a78e Signed-off-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org> --- M src/mainboard/google/hatch/variants/baseboard/gpio.c A src/mainboard/google/hatch/variants/kohaku/gpio.c 2 files changed, 95 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/32326/1 diff --git a/src/mainboard/google/hatch/variants/baseboard/gpio.c b/src/mainboard/google/hatch/variants/baseboard/gpio.c index 0391dfe..784dd6c 100644 --- a/src/mainboard/google/hatch/variants/baseboard/gpio.c +++ b/src/mainboard/google/hatch/variants/baseboard/gpio.c @@ -232,7 +232,7 @@ /* E0 : GPP_E0 ==> NC */ PAD_NC(GPP_E0, NONE), - /* E1 : SATAPCIE1 */ + /* E1 : M2_SSD_PEDET */ PAD_CFG_NF(GPP_E1, NONE, DEEP, NF1), /* E2 : GPP_E2 ==> NC */ PAD_NC(GPP_E2, NONE), diff --git a/src/mainboard/google/hatch/variants/kohaku/gpio.c b/src/mainboard/google/hatch/variants/kohaku/gpio.c new file mode 100644 index 0000000..c7d7213 --- /dev/null +++ b/src/mainboard/google/hatch/variants/kohaku/gpio.c @@ -0,0 +1,94 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#include <arch/acpi.h> +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <commonlib/helpers.h> + +static const struct pad_config gpio_table[] = { + /* RCIN# ==> NC */ + PAD_NC(GPP_A0, NONE), + /* SERIRQ ==> NC */ + PAD_NC(GPP_A6, NONE), + /* PEN_RESET_ODL */ + PAD_CFG_GPO(GPP_A10, 0, DEEP), + /* PIRQA# ==> NC */ + PAD_NC(GPP_A17, NONE), + /* ISH_GP0 ==> NC */ + PAD_NC(GPP_A18, NONE), + /* ISH_GP1 ==> NC */ + PAD_NC(GPP_A19, NONE), + /* ISH_GP2 ==> NC */ + PAD_NC(GPP_A20, NONE), + /* ISH_GP4 ==> NC */ + PAD_NC(GPP_A22, NONE), + /* SRCCLKREQ3#: NC */ + PAD_NC(GPP_B8, NONE), + /* SMBDATA: NC */ + PAD_NC(GPP_C1, NONE), + /* + * Hoping that GPP_A8 can be used for both interrupt (SCI) and wake + * (GPIO). Keeping as GPI for now, but with the option to change later. + */ + PAD_CFG_GPI_SCI(GPP_C12, NONE, DEEP, EDGE_SINGLE, INVERT), + /* EN_PP3300_TSP_DIG_DX */ + PAD_CFG_GPO(GPP_C15, 0, DEEP), + /* UART2_CTS# ==> NC */ + PAD_NC(GPP_C23, NONE), + /* GPP_E23 ==> NC */ + PAD_NC(GPP_E23, NONE), + /* GPP_F1 ==> NC */ + PAD_NC(GPP_F1, NONE), + /* GPP_G0 ==> NC */ + PAD_NC(GPP_G0, NONE), + /* GPP_G1 ==> NC */ + PAD_NC(GPP_G1, NONE), + /* GPP_G2 ==> NC */ + PAD_NC(GPP_G2, NONE), + /* GPP_G3 ==> NC */ + PAD_NC(GPP_G3, NONE), + /* GPP_G4 ==> NC */ + PAD_NC(GPP_G4, NONE), + /* GPP_G5 ==> NC */ + PAD_NC(GPP_G5, NONE), + /* GPP_G6 ==> NC */ + PAD_NC(GPP_G6, NONE), +}; + +const struct pad_config *variant_gpio_table(size_t *num) +{ + *num = ARRAY_SIZE(gpio_table); + return gpio_table; +} + +/* + * GPIO settings before entering S5 + */ +static const struct pad_config s5_sleep_gpio_table[] = { + PAD_CFG_GPO(GPP_A12, 1, DEEP), /* FPMCU_RST_ODL */ +}; + +const struct pad_config *sleep_gpio_table(u8 slp_typ, size_t *num) +{ + if (slp_typ == ACPI_S5) { + *num = ARRAY_SIZE(s5_sleep_gpio_table); + return s5_sleep_gpio_table; + } + + *num = ARRAY_SIZE(default_sleep_gpio_table); + return default_sleep_gpio_table; +} + -- To view, visit https://review.coreboot.org/c/coreboot/+/32326 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie5c83a0538d367ea11e9499f21cea41891d7a78e Gerrit-Change-Number: 32326 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-MessageType: newchange

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coreboot-gerrit April 2019