Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32385
Change subject: arch/x86/car.ld: Also check mrc.bin heap for Ivybridge
......................................................................
arch/x86/car.ld: Also check mrc.bin heap for Ivybridge
Sandy- and ivybridge use the same mrc.bin that has the heap in an
awkward location.
Change-Id: If985a48c6703c8a86d8051e67595cf0fd409d99a
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/arch/x86/car.ld
1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/32385/1
diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld
index 37fb087..322ee3d 100644
--- a/src/arch/x86/car.ld
+++ b/src/arch/x86/car.ld
@@ -89,7 +89,8 @@
_car_global_end = .;
_car_relocatable_data_end = .;
-#if CONFIG(NORTHBRIDGE_INTEL_SANDYBRIDGE) && \
+#if CONFIG(NORTHBRIDGE_INTEL_SANDYBRIDGE) || \
+ CONFIG(NORTHBRIDGE_INTEL_IVYBRIDGE) && \
!CONFIG(USE_NATIVE_RAMINIT)
. = ABSOLUTE(0xff7e1000);
_mrc_pool = .;
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Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29969 )
Change subject: TEMP: NOT FOR REVIEW: qcs405: memlayout: Make bootblock 64k aligned
......................................................................
Patch Set 21:
> Patch Set 21:
>
> > qc-sec while jumping from 32bit<->64bit using rmr, maps 0x8c30000 <-> 0x0 address and jumps
>
> How does this mapping work? Are you talking about page tables? Or some special mapping mechanism? Can you point to some documentation?
>
> > So 0x8c30000 gets mapped to 0x0 and bootblock starts executing from 0x0 address.
>
> Why does the CPU start executing from 0x0 after reset? Can't you just make it execute from 0x8c30000 directly? Isn't that what RVBAR (or is it MVBAR?) is for?
>
> If that's not possible, can you just change QC-SEC so the first 64-bit instruction is in there (just needs to be a single jump)?
Hi Julius,
So the mapping here happens in hardware block 'boot-remapper'.
That said, right now, looking in to the possibility of having this implemented in qc_sec.
Will update more on this in a couple of days.
btw, Sorry for the late reponse, was off most of last week.
Regards,
Sricharan
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/27138 )
Change subject: gma: Implement automatic CPU detection
......................................................................
Patch Set 4: Code-Review+2
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/27068 )
Change subject: gma config: Make Config.CPU and Config.CPU_Var variable
......................................................................
Patch Set 6: Code-Review+1
(1 comment)
https://review.coreboot.org/#/c/27068/6/common/hw-gfx-gma-config.ads.templa…
File common/hw-gfx-gma-config.ads.template:
https://review.coreboot.org/#/c/27068/6/common/hw-gfx-gma-config.ads.templa…
PS6, Line 69: ,
put those on the previous line?
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/27067 )
Change subject: gma config: Tag constants depending on generation or CPU
......................................................................
Patch Set 6: Code-Review+2
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/27065 )
Change subject: gma config: Group mutable state into a record
......................................................................
Patch Set 4: Code-Review+2
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/libgfxinit/+/27064 )
Change subject: gma pipe setup: Drop explicit Global and Depends contracts
......................................................................
Patch Set 4: Code-Review+2
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