coreboot-gerrit March 2019

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Change in ...coreboot[master]: device/pci_ops: Drop unused parameter
by Aaron Durbin (Code Review) 01 Mar '19

01 Mar '19

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31678 ) Change subject: device/pci_ops: Drop unused parameter ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/31678/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/31678/1//COMMIT_MSG@7 PS1, Line 7: device/pci_ops: Drop unused parameter I guess we never had a need to utilize it. Can you please add some commentary here in the description to that effect? -- To view, visit https://review.coreboot.org/c/coreboot/+/31678 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09e928b4677d9db2eee12730ba7b3fdd8837805c Gerrit-Change-Number: 31678 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Mar 2019 18:12:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci_ops: Avoid name collisions
by Aaron Durbin (Code Review) 01 Mar '19

01 Mar '19

Aaron Durbin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31677 ) Change subject: device/pci_ops: Avoid name collisions ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/#/c/31677/1/src/arch/x86/include/arch/pci_io_cf… File src/arch/x86/include/arch/pci_io_cfg.h: https://review.coreboot.org/#/c/31677/1/src/arch/x86/include/arch/pci_io_cf… PS1, Line 81: Add a comment describing what 's' means? https://review.coreboot.org/#/c/31677/1/src/include/device/pci_mmio_cfg.h File src/include/device/pci_mmio_cfg.h: https://review.coreboot.org/#/c/31677/1/src/include/device/pci_mmio_cfg.h@a… PS1, Line 75: ditto about comment https://review.coreboot.org/#/c/31677/1/src/include/device/pci_ops.h File src/include/device/pci_ops.h: https://review.coreboot.org/#/c/31677/1/src/include/device/pci_ops.h@9 PS1, Line 9: #define pci_read_config8 pci_s_read_config8 and here too -- To view, visit https://review.coreboot.org/c/coreboot/+/31677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20f56cfe3ac7dc4421e62a99ca91f39a857c0ccf Gerrit-Change-Number: 31677 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Mar 2019 18:10:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci: Organize Makefile
by Kyösti Mälkki (Code Review) 01 Mar '19

01 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31680 ) Change subject: device/pci: Organize Makefile ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31680 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I426f4398c01dfbf03b9dd2db8c7a964512c86d5e Gerrit-Change-Number: 31680 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Mar 2019 18:02:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci_ops: Drop parameter from pci_bus_default_ops()
by Kyösti Mälkki (Code Review) 01 Mar '19

01 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31679 ) Change subject: device/pci_ops: Drop parameter from pci_bus_default_ops() ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31679 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43ae28f465fb46391519ec97a2a50891d458c46d Gerrit-Change-Number: 31679 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Mar 2019 18:00:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci_ops: Drop unused parameter
by Kyösti Mälkki (Code Review) 01 Mar '19

01 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31678 ) Change subject: device/pci_ops: Drop unused parameter ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31678 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I09e928b4677d9db2eee12730ba7b3fdd8837805c Gerrit-Change-Number: 31678 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Mar 2019 17:59:57 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: device/pci_ops: Avoid name collisions
by Kyösti Mälkki (Code Review) 01 Mar '19

01 Mar '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31677 ) Change subject: device/pci_ops: Avoid name collisions ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20f56cfe3ac7dc4421e62a99ca91f39a857c0ccf Gerrit-Change-Number: 31677 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 01 Mar 2019 17:59:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support
by Michał Żygowski (Code Review) 01 Mar '19

01 Mar '19

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29662 ) Change subject: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support ...................................................................... Patch Set 7: > Patch Set 7: > > > Patch Set 7: > > > > > Patch Set 7: Code-Review-2 > > > > > > (1 comment) > > > > > > select C_ENVIRONMENT_BOOTBLOCK is the braswell Kconfig and drop the romcc bootblock option and add console init in the bootblock. > > > Also drop things that get unused in drivers/intel/fsp1_1 > > > This patch is not even build tested... > > > > This patch is to support C_ENVIRONMENT_BOOTBLOCK for Braswell. To be backward compatible this support has made optional. > > Please don't make it optional and remove the 'backwards compatibility', there is really no reason to keep that around. > > > This patch has been build and tested. I will check if I made mistake by uploading. > > > > No gerrit has not build-tested it. > > > Can you clarify your comment? I concur with Arthur. C_ENVIRONMENT_BOOTBLOCK is becoming a standard in coreboot. No reason to keep backward compatibility. -- To view, visit https://review.coreboot.org/c/coreboot/+/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 7 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 01 Mar 2019 15:29:05 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/braswell: Configure IO APIC
by Michał Żygowski (Code Review) 01 Mar '19

01 Mar '19

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29423 ) Change subject: soc/intel/braswell: Configure IO APIC ...................................................................... Patch Set 7: Code-Review-1 (1 comment) https://review.coreboot.org/#/c/29423/7/src/soc/intel/braswell/southcluster… File src/soc/intel/braswell/southcluster.c: https://review.coreboot.org/#/c/29423/7/src/soc/intel/braswell/southcluster… PS7, Line 248: static void sc_enable_ioapic(struct device *dev) The function is defined twice. Copy-paste error? -- To view, visit https://review.coreboot.org/c/coreboot/+/29423 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I917c30892b46ac1d964e7bab339082d17a1e706d Gerrit-Change-Number: 29423 Gerrit-PatchSet: 7 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Fri, 01 Mar 2019 15:12:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/braswell: Configure IO APIC
by Frans Hendriks (Code Review) 01 Mar '19

01 Mar '19

Hello Patrick Rudolph, build bot (Jenkins), Hannah Williams, Michał Żygowski, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29423 to look at the new patch set (#7). Change subject: soc/intel/braswell: Configure IO APIC ...................................................................... soc/intel/braswell: Configure IO APIC IO APIC is not configured. Add sc_enable_ioapic() copied from fsp_baytrail SoC. BUG=N/A TEST=Intel CherryHill CRB Change-Id: I917c30892b46ac1d964e7bab339082d17a1e706d Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/soc/intel/braswell/Kconfig M src/soc/intel/braswell/include/soc/lpc.h M src/soc/intel/braswell/southcluster.c 3 files changed, 95 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/29423/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/29423 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I917c30892b46ac1d964e7bab339082d17a1e706d Gerrit-Change-Number: 29423 Gerrit-PatchSet: 7 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sb/intel/common/firmware: Add an option to use IFDTOOL
by Mario Scheithauer (Code Review) 01 Mar '19

01 Mar '19

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31639 Change subject: sb/intel/common/firmware: Add an option to use IFDTOOL ...................................................................... sb/intel/common/firmware: Add an option to use IFDTOOL This patch makes the use of the IFDTOOL to modify the flash descriptor region selectable via a Kconfig option. This option is selected by default so that nothing changes for all mainboards that have activate 'Lock ME/TXE section'. If you don't want to use IFDTOOL for modification of flash descriptor, disable it. In this case, the preset values are retained. Change-Id: I46ec6339008edcc78fe76682eed5714f85354937 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/southbridge/intel/common/firmware/Kconfig M src/southbridge/intel/common/firmware/Makefile.inc 2 files changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/31639/1 diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig index 31a3df3..7a1bd82 100644 --- a/src/southbridge/intel/common/firmware/Kconfig +++ b/src/southbridge/intel/common/firmware/Kconfig @@ -141,6 +141,18 @@ depends on HAVE_EC_BIN default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/ec.bin" +config MOD_INTEL_FLASH_DESCRIPTOR + bool "Use IFDTOOL to modifiy descriptor region" + default y + help + Read and write access permissions to different regions in the flash + can be controlled via dedicated bitfields in the flash descriptor. + These permissions can be modified with the Intel Flash Descriptor + Tool (IFDTOOL). If you don't want to change these permissions and + keep the ones provided in the initial descriptor, disable this switch. + +if MOD_INTEL_FLASH_DESCRIPTOR + config LOCK_MANAGEMENT_ENGINE bool "Lock ME/TXE section" default n @@ -154,6 +166,8 @@ If unsure, say N. +endif #MOD_INTEL_FLASH_DESCRIPTOR + config CBFS_SIZE hex default 0x100000 diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc index 774bb23..331382e 100644 --- a/src/southbridge/intel/common/firmware/Makefile.inc +++ b/src/southbridge/intel/common/firmware/Makefile.inc @@ -68,6 +68,8 @@ $(obj)/coreboot.pre mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre endif + +ifeq ($(CONFIG_MOD_INTEL_FLASH_DESCRIPTOR),y) ifeq ($(CONFIG_LOCK_MANAGEMENT_ENGINE),y) printf " IFDTOOL Locking Management Engine\n" $(objutil)/ifdtool/ifdtool \ @@ -79,6 +81,11 @@ $(IFDTOOL_USE_CHIPSET) -u $(obj)/coreboot.pre mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre endif +else + printf " Don't touch Intel Flash Descriptor\n" + cp $(obj)/coreboot.pre $(obj)/coreboot.pre.new + mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre +endif ifeq ($(CONFIG_EM100),y) printf " IFDTOOL Setting EM100 mode\n" -- To view, visit https://review.coreboot.org/c/coreboot/+/31639 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I46ec6339008edcc78fe76682eed5714f85354937 Gerrit-Change-Number: 31639 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-MessageType: newchange

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coreboot-gerrit March 2019