coreboot-gerrit December 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: drivers/mrc_cache: Redo indenting
by Marshall Dawson (Code Review) 15 Dec '19

15 Dec '19

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37720 ) Change subject: drivers/mrc_cache: Redo indenting ...................................................................... drivers/mrc_cache: Redo indenting Indent continuation lines of an if test farther than its "true" expression to be executed. Change-Id: I3dfa4049761095dcbb6797f1533d6a513e3b503c Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/drivers/mrc_cache/mrc_cache.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/37720/1 diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c index ca0f447..d4a4aab 100644 --- a/src/drivers/mrc_cache/mrc_cache.c +++ b/src/drivers/mrc_cache/mrc_cache.c @@ -415,8 +415,8 @@ printk(BIOS_DEBUG, "MRC: cache data '%s' needs update.\n", cr->name); if (region_file_update_data(&cache_file, - cbmem_entry_start(to_be_updated), - cbmem_entry_size(to_be_updated)) < 0) + cbmem_entry_start(to_be_updated), + cbmem_entry_size(to_be_updated)) < 0) log_event_cache_update(cr->elog_slot, UPDATE_FAILURE); else log_event_cache_update(cr->elog_slot, UPDATE_SUCCESS); -- To view, visit https://review.coreboot.org/c/coreboot/+/37720 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3dfa4049761095dcbb6797f1533d6a513e3b503c Gerrit-Change-Number: 37720 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK
by Kyösti Mälkki (Code Review) 15 Dec '19

15 Dec '19

Kyösti Mälkki has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37727 ) Change subject: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK ...................................................................... asus/f2a85-m: switch away from ROMCC_BOOTBLOCK Change-Id: I1d7127e2f9bd5bd9677feb2b0e686a854c4e3885 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37727 Reviewed-by: HAOUAS Elyes <ehaouas(a)noos.fr> Reviewed-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/asus/f2a85-m/Kconfig M src/mainboard/asus/f2a85-m/Makefile.inc A src/mainboard/asus/f2a85-m/bootblock.c M src/mainboard/asus/f2a85-m/romstage.c 4 files changed, 70 insertions(+), 69 deletions(-) Approvals: build bot (Jenkins): Verified Kyösti Mälkki: Looks good to me, approved HAOUAS Elyes: Looks good to me, but someone else must approve diff --git a/src/mainboard/asus/f2a85-m/Kconfig b/src/mainboard/asus/f2a85-m/Kconfig index cd10e53..c1dd063 100644 --- a/src/mainboard/asus/f2a85-m/Kconfig +++ b/src/mainboard/asus/f2a85-m/Kconfig @@ -18,7 +18,6 @@ config BOARD_SPECIFIC_OPTIONS def_bool y - select ROMCC_BOOTBLOCK select CPU_AMD_AGESA_FAMILY15_TN select NORTHBRIDGE_AMD_AGESA_FAMILY15_TN select SOUTHBRIDGE_AMD_AGESA_HUDSON diff --git a/src/mainboard/asus/f2a85-m/Makefile.inc b/src/mainboard/asus/f2a85-m/Makefile.inc index f8895fa..4dde2cf 100644 --- a/src/mainboard/asus/f2a85-m/Makefile.inc +++ b/src/mainboard/asus/f2a85-m/Makefile.inc @@ -13,6 +13,8 @@ # GNU General Public License for more details. # +bootblock-y += bootblock.c + romstage-y += buildOpts.c romstage-y += BiosCallOuts.c romstage-y += OemCustomize.c diff --git a/src/mainboard/asus/f2a85-m/bootblock.c b/src/mainboard/asus/f2a85-m/bootblock.c new file mode 100644 index 0000000..648f55a --- /dev/null +++ b/src/mainboard/asus/f2a85-m/bootblock.c @@ -0,0 +1,68 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2012 Advanced Micro Devices, Inc. + * Copyright (C) 2012 Rudolf Marek <r.marek(a)assembler.cz> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <bootblock_common.h> +#include <device/pnp_type.h> +#include <southbridge/amd/common/amd_defs.h> +#include <stdint.h> +#include <superio/ite/common/ite.h> +#include <superio/ite/it8728f/it8728f.h> +#include <superio/nuvoton/common/nuvoton.h> +#include <superio/nuvoton/nct6779d/nct6779d.h> + +#define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x)) + +static void sbxxx_enable_48mhzout(void) +{ + /* most likely programming to 48MHz out signal */ + u32 reg32; + reg32 = SB_MMIO_MISC32(0x28); + reg32 &= 0xffc7ffff; + reg32 |= 0x00100000; + SB_MMIO_MISC32(0x28) = reg32; + + reg32 = SB_MMIO_MISC32(0x40); + reg32 &= ~0x80u; + SB_MMIO_MISC32(0x40) = reg32; +} + +static void superio_init_m(void) +{ + pnp_devfn_t uart = PNP_DEV(0x2e, IT8728F_SP1); + pnp_devfn_t gpio = PNP_DEV(0x2e, IT8728F_GPIO); + + ite_kill_watchdog(gpio); + ite_enable_serial(uart, CONFIG_TTYS0_BASE); + ite_enable_3vsbsw(gpio); +} + +static void superio_init_m_pro(void) +{ + pnp_devfn_t uart = PNP_DEV(0x2e, NCT6779D_SP1); + + nuvoton_enable_serial(uart, CONFIG_TTYS0_BASE); +} + +void bootblock_mainboard_early_init(void) +{ + /* enable SIO clock */ + sbxxx_enable_48mhzout(); + + if (CONFIG(BOARD_ASUS_F2A85_M_PRO)) + superio_init_m_pro(); + else + superio_init_m(); +} diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c index 8a48e00..3aa29c8 100644 --- a/src/mainboard/asus/f2a85-m/romstage.c +++ b/src/mainboard/asus/f2a85-m/romstage.c @@ -15,84 +15,16 @@ */ #include <arch/io.h> -#include <console/console.h> -#include <device/pnp_type.h> -#include <device/pci_ops.h> #include <northbridge/amd/agesa/state_machine.h> -#include <southbridge/amd/common/amd_defs.h> -#include <southbridge/amd/agesa/hudson/hudson.h> #include <southbridge/amd/agesa/hudson/smbus.h> #include <stdint.h> -#include <superio/ite/common/ite.h> -#include <superio/ite/it8728f/it8728f.h> -#include <superio/nuvoton/common/nuvoton.h> -#include <superio/nuvoton/nct6779d/nct6779d.h> - -#define MMIO_NON_POSTED_START 0xfed00000 -#define MMIO_NON_POSTED_END 0xfedfffff -#define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x)) - -static void sbxxx_enable_48mhzout(void) -{ - /* most likely programming to 48MHz out signal */ - u32 reg32; - reg32 = SB_MMIO_MISC32(0x28); - reg32 &= 0xffc7ffff; - reg32 |= 0x00100000; - SB_MMIO_MISC32(0x28) = reg32; - - reg32 = SB_MMIO_MISC32(0x40); - reg32 &= ~0x80u; - SB_MMIO_MISC32(0x40) = reg32; -} - -static void superio_init_m(void) -{ - pnp_devfn_t uart = PNP_DEV(0x2e, IT8728F_SP1); - pnp_devfn_t gpio = PNP_DEV(0x2e, IT8728F_GPIO); - - ite_kill_watchdog(gpio); - ite_enable_serial(uart, CONFIG_TTYS0_BASE); - ite_enable_3vsbsw(gpio); -} - -static void superio_init_m_pro(void) -{ - pnp_devfn_t uart = PNP_DEV(0x2e, NCT6779D_SP1); - - nuvoton_enable_serial(uart, CONFIG_TTYS0_BASE); -} void board_BeforeAgesa(struct sysinfo *cb) { u8 byte; - pci_devfn_t dev; - - /* enable SIO LPC decode */ - dev = PCI_DEV(0, 0x14, 3); - byte = pci_read_config8(dev, 0x48); - byte |= 3; /* 2e, 2f */ - pci_write_config8(dev, 0x48, byte); - - /* enable serial decode */ - byte = pci_read_config8(dev, 0x44); - byte |= (1 << 6); /* 0x3f8 */ - pci_write_config8(dev, 0x44, byte); post_code(0x30); - /* enable SB MMIO space */ - outb(0x24, 0xcd6); - outb(0x1, 0xcd7); - - /* enable SIO clock */ - sbxxx_enable_48mhzout(); - - if (CONFIG(BOARD_ASUS_F2A85_M_PRO)) - superio_init_m_pro(); - else - superio_init_m(); - /* turn on secondary smbus at b20 */ outb(0x28, 0xcd6); byte = inb(0xcd7); -- To view, visit https://review.coreboot.org/c/coreboot/+/37727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d7127e2f9bd5bd9677feb2b0e686a854c4e3885 Gerrit-Change-Number: 37727 Gerrit-PatchSet: 8 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in coreboot[master]: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK
by Kyösti Mälkki (Code Review) 15 Dec '19

15 Dec '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37727 ) Change subject: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK ...................................................................... Patch Set 7: Code-Review+2 (2 comments) https://review.coreboot.org/c/coreboot/+/37727/4/src/mainboard/asus/f2a85-m… File src/mainboard/asus/f2a85-m/bootblock.c: https://review.coreboot.org/c/coreboot/+/37727/4/src/mainboard/asus/f2a85-m… PS4, Line 19: include <console/console.h> > remove? […] Done https://review.coreboot.org/c/coreboot/+/37727/4/src/mainboard/asus/f2a85-m… PS4, Line 32: define MMIO_NON_POSTED_START 0xfed00000 : #define MMIO_NON_POSTED_END 0xfedfffff > remove ? Done -- To view, visit https://review.coreboot.org/c/coreboot/+/37727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d7127e2f9bd5bd9677feb2b0e686a854c4e3885 Gerrit-Change-Number: 37727 Gerrit-PatchSet: 7 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 15 Dec 2019 16:08:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/msi/ms7721: Move pnp_{enter,exit}_conf_state to common place
by HAOUAS Elyes (Code Review) 15 Dec '19

15 Dec '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37570 ) Change subject: mb/msi/ms7721: Move pnp_{enter,exit}_conf_state to common place ...................................................................... mb/msi/ms7721: Move pnp_{enter,exit}_conf_state to common place Change-Id: Ib27c518fb5ce99e17be25b974ff5adc8c6b3f3a6 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/msi/ms7721/romstage.c M src/superio/fintek/common/early_serial.c M src/superio/fintek/common/fintek.h 3 files changed, 5 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/37570/1 diff --git a/src/mainboard/msi/ms7721/romstage.c b/src/mainboard/msi/ms7721/romstage.c index 0266eff..02f27b0 100644 --- a/src/mainboard/msi/ms7721/romstage.c +++ b/src/mainboard/msi/ms7721/romstage.c @@ -41,21 +41,6 @@ /* GPIO configuration */ -#define FINTEK_ENTRY_KEY 0x87 -static void pnp_enter_conf_state(pnp_devfn_t dev) -{ - u16 port = dev >> 8; - outb(FINTEK_ENTRY_KEY, port); - outb(FINTEK_ENTRY_KEY, port); -} - -#define FINTEK_EXIT_KEY 0xAA -static void pnp_exit_conf_state(pnp_devfn_t dev) -{ - u16 port = dev >> 8; - outb(FINTEK_EXIT_KEY, port); -} - static void gpio_init(pnp_devfn_t dev) { pnp_enter_conf_state(dev); diff --git a/src/superio/fintek/common/early_serial.c b/src/superio/fintek/common/early_serial.c index c625b53..d0e0ab0 100644 --- a/src/superio/fintek/common/early_serial.c +++ b/src/superio/fintek/common/early_serial.c @@ -43,7 +43,7 @@ #define FINTEK_EXIT_KEY 0xAA /* Enable configuration: pass entry key '0x87' into index port dev. */ -static void pnp_enter_conf_state(pnp_devfn_t dev) +void pnp_enter_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(FINTEK_ENTRY_KEY, port); @@ -51,7 +51,7 @@ } /* Disable configuration: pass exit key '0xAA' into index port dev. */ -static void pnp_exit_conf_state(pnp_devfn_t dev) +void pnp_exit_conf_state(pnp_devfn_t dev) { u16 port = dev >> 8; outb(FINTEK_EXIT_KEY, port); diff --git a/src/superio/fintek/common/fintek.h b/src/superio/fintek/common/fintek.h index cbd175f..306edee 100644 --- a/src/superio/fintek/common/fintek.h +++ b/src/superio/fintek/common/fintek.h @@ -22,4 +22,7 @@ void fintek_enable_serial(pnp_devfn_t dev, u16 iobase); +void pnp_enter_conf_state(pnp_devfn_t dev); +void pnp_exit_conf_state(pnp_devfn_t dev); + #endif /* SUPERIO_FINTEK_COMMON_PRE_RAM_H */ -- To view, visit https://review.coreboot.org/c/coreboot/+/37570 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib27c518fb5ce99e17be25b974ff5adc8c6b3f3a6 Gerrit-Change-Number: 37570 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/roda/rk886ex: Don't rewrite pnp_{enter,exit}_conf_state function
by HAOUAS Elyes (Code Review) 15 Dec '19

15 Dec '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37686 ) Change subject: mb/roda/rk886ex: Don't rewrite pnp_{enter,exit}_conf_state function ...................................................................... mb/roda/rk886ex: Don't rewrite pnp_{enter,exit}_conf_state function Change-Id: Ie9918e5114bb880e37680a85eab2bd224b0b082c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/roda/rk886ex/early_init.c 1 file changed, 4 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/37686/1 diff --git a/src/mainboard/roda/rk886ex/early_init.c b/src/mainboard/roda/rk886ex/early_init.c index f3e24e0..6f0a12c 100644 --- a/src/mainboard/roda/rk886ex/early_init.c +++ b/src/mainboard/roda/rk886ex/early_init.c @@ -24,6 +24,8 @@ #include <pc80/mc146818rtc.h> #include <northbridge/intel/i945/i945.h> #include <southbridge/intel/i82801gx/i82801gx.h> +#include <superio/smsc/lpc47n227/lpc47n227.h> + #include "option_table.h" /* Override the default lpc decode ranges */ @@ -43,17 +45,6 @@ * the two. Also set up the GPIOs from the beginning. This is the "no schematic * but safe anyways" method. */ -static inline void pnp_enter_ext_func_mode(pnp_devfn_t dev) -{ - unsigned int port = dev >> 8; - outb(0x55, port); -} - -static void pnp_exit_ext_func_mode(pnp_devfn_t dev) -{ - unsigned int port = dev >> 8; - outb(0xaa, port); -} void bootblock_mainboard_early_init(void) { @@ -61,7 +52,7 @@ dev = PNP_DEV(0x2e, 0x00); - pnp_enter_ext_func_mode(dev); + pnp_enter_conf_state(dev); pnp_write_config(dev, 0x01, 0x94); /* Extended Parport modes */ pnp_write_config(dev, 0x02, 0x88); /* UART power on */ pnp_write_config(dev, 0x03, 0x72); /* Floppy */ @@ -87,7 +78,7 @@ pnp_write_config(dev, 0x38, 0x00); /* GPIO4 POL */ pnp_write_config(dev, 0x39, 0x80); /* GPIO4 POL */ - pnp_exit_ext_func_mode(dev); + pnp_exit_conf_state(dev); } void mainboard_late_rcba_config(void) -- To view, visit https://review.coreboot.org/c/coreboot/+/37686 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie9918e5114bb880e37680a85eab2bd224b0b082c Gerrit-Change-Number: 37686 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/acer: add e1-571g mainboard
by Angel Pons (Code Review) 14 Dec '19

14 Dec '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30651 ) Change subject: mb/acer: add e1-571g mainboard ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/30651 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b04e12f1cb937150ab54e5862a64b62e4fe9e8e Gerrit-Change-Number: 30651 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 14 Dec 2019 20:40:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK
by HAOUAS Elyes (Code Review) 14 Dec '19

14 Dec '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37727 ) Change subject: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK ...................................................................... Patch Set 7: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/37727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d7127e2f9bd5bd9677feb2b0e686a854c4e3885 Gerrit-Change-Number: 37727 Gerrit-PatchSet: 7 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 14 Dec 2019 18:18:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK
by build bot (Jenkins) (Code Review) 14 Dec '19

14 Dec '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37727 ) Change subject: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK ...................................................................... Patch Set 7: (1 comment) https://review.coreboot.org/c/coreboot/+/37727/7/src/mainboard/asus/f2a85-m… File src/mainboard/asus/f2a85-m/bootblock.c: https://review.coreboot.org/c/coreboot/+/37727/7/src/mainboard/asus/f2a85-m… PS7, Line 26: #define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x)) Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/37727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d7127e2f9bd5bd9677feb2b0e686a854c4e3885 Gerrit-Change-Number: 37727 Gerrit-PatchSet: 7 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 14 Dec 2019 18:16:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK
by Idwer Vollering (Code Review) 14 Dec '19

14 Dec '19

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/37727 to look at the new patch set (#7). Change subject: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK ...................................................................... asus/f2a85-m: switch away from ROMCC_BOOTBLOCK Change-Id: I1d7127e2f9bd5bd9677feb2b0e686a854c4e3885 Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> --- M src/mainboard/asus/f2a85-m/Kconfig M src/mainboard/asus/f2a85-m/Makefile.inc A src/mainboard/asus/f2a85-m/bootblock.c M src/mainboard/asus/f2a85-m/romstage.c 4 files changed, 70 insertions(+), 69 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/37727/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/37727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d7127e2f9bd5bd9677feb2b0e686a854c4e3885 Gerrit-Change-Number: 37727 Gerrit-PatchSet: 7 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK
by build bot (Jenkins) (Code Review) 14 Dec '19

14 Dec '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37727 ) Change subject: asus/f2a85-m: switch away from ROMCC_BOOTBLOCK ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/c/coreboot/+/37727/6/src/mainboard/asus/f2a85-m… File src/mainboard/asus/f2a85-m/bootblock.c: https://review.coreboot.org/c/coreboot/+/37727/6/src/mainboard/asus/f2a85-m… PS6, Line 32: #define SB_MMIO_MISC32(x) *(volatile u32 *)(AMD_SB_ACPI_MMIO_ADDR + 0xE00 + (x)) Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/c/coreboot/+/37727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1d7127e2f9bd5bd9677feb2b0e686a854c4e3885 Gerrit-Change-Number: 37727 Gerrit-PatchSet: 6 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Comment-Date: Sat, 14 Dec 2019 18:13:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit December 2019