Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30707 )
Change subject: mitral: qcs405: Increased the size of RO_VPD
......................................................................
Patch Set 1:
With https://review.coreboot.org/c/coreboot/+/30902 this is now obsolete, right?
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Gerrit-Change-Number: 30707
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29967 )
Change subject: qclib: Add qclib support
......................................................................
Patch Set 6:
(2 comments)
https://review.coreboot.org/#/c/29967/6/src/soc/qualcomm/qcs405/qclib_execu…
File src/soc/qualcomm/qcs405/qclib_execute.c:
https://review.coreboot.org/#/c/29967/6/src/soc/qualcomm/qcs405/qclib_execu…
PS6, Line 35: int (*doit)(void *, void *);
function definition argument 'void *' should also have an identifier name
https://review.coreboot.org/#/c/29967/6/src/soc/qualcomm/qcs405/qclib_execu…
PS6, Line 35: int (*doit)(void *, void *);
function definition argument 'void *' should also have an identifier name
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Gerrit-Comment-Date: Mon, 14 Jan 2019 16:41:07 +0000
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Patrick Georgi has uploaded a new patch set (#6) to the change originally created by nsekar(a)codeaurora.org. ( https://review.coreboot.org/c/coreboot/+/29967 )
Change subject: qclib: Add qclib support
......................................................................
qclib: Add qclib support
Add qclib support to configure pmic, clocks, DDR
Change-Id: I534af71163d034ea04420dda6a94ce31b08c8a07
Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org>
Signed-off-by: Sricharan R <sricharan(a)codeaurora.org>
---
M src/mainboard/google/mistral/mainboard.c
M src/mainboard/google/mistral/romstage.c
M src/soc/qualcomm/qcs405/Makefile.inc
M src/soc/qualcomm/qcs405/include/soc/memlayout.ld
A src/soc/qualcomm/qcs405/include/soc/qclib.h
M src/soc/qualcomm/qcs405/include/soc/symbols.h
M src/soc/qualcomm/qcs405/mmu.c
A src/soc/qualcomm/qcs405/qclib_execute.c
8 files changed, 247 insertions(+), 16 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/29967/6
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Gerrit-MessageType: newpatchset
Patrick Georgi has uploaded a new patch set (#6) to the change originally created by nsekar(a)codeaurora.org. ( https://review.coreboot.org/c/coreboot/+/29964 )
Change subject: qcs405: Add blsp uart driver
......................................................................
qcs405: Add blsp uart driver
Change-Id: Id9626c68eadead8b8ec5ffbc08cab7b0ec36478f
Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org>
Signed-off-by: Sricharan R <sricharan(a)codeaurora.org>
Signed-off-by: Prudhvi Yarlagadda<pyarlaga(a)codeaurora.org>
Signed-off-by: Sricharan R <sricharan(a)codeaurora.org>
---
M src/soc/qualcomm/qcs405/Makefile.inc
A src/soc/qualcomm/qcs405/include/soc/blsp.h
A src/soc/qualcomm/qcs405/include/soc/cdp.h
A src/soc/qualcomm/qcs405/include/soc/iomap.h
A src/soc/qualcomm/qcs405/include/soc/ipq_uart.h
A src/soc/qualcomm/qcs405/uart.c
6 files changed, 976 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/29964/6
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Gerrit-MessageType: newpatchset
Patrick Georgi has uploaded a new patch set (#6) to the change originally created by nsekar(a)codeaurora.org. ( https://review.coreboot.org/c/coreboot/+/29959 )
Change subject: qcs405:Add SPI_RAM_SIMULATION support for QCS405
......................................................................
qcs405:Add SPI_RAM_SIMULATION support for QCS405
Change-Id: I895315a995cbbd5e6a7a305e48476f0d0f583cfe
Signed-off-by: Sricharan R <sricharan(a)codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org>
---
M src/mainboard/google/mistral/romstage.c
M src/soc/qualcomm/qcs405/Kconfig
M src/soc/qualcomm/qcs405/Makefile.inc
A src/soc/qualcomm/qcs405/flash_controller.c
A src/soc/qualcomm/qcs405/include/soc/flash_controller.h
M src/soc/qualcomm/qcs405/include/soc/mmu.h
M src/soc/qualcomm/qcs405/mmu.c
M src/soc/qualcomm/qcs405/spi.c
8 files changed, 173 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/59/29959/6
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Gerrit-MessageType: newpatchset
Patrick Georgi has uploaded a new patch set (#6) to the change originally created by nsekar(a)codeaurora.org. ( https://review.coreboot.org/c/coreboot/+/29951 )
Change subject: util/qualcomm: Add T32 debug scripts
......................................................................
util/qualcomm: Add T32 debug scripts
T32 scripts that allow debug of any coreboot stage on qcs405
Change-Id: I4e792a2806e5ebd3b4075c7bb69c43587920deae
Signed-off-by: Sricharan R <sricharan(a)codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org>
---
A util/qualcomm/scripts/cmm/clear_bss.cmm
A util/qualcomm/scripts/cmm/debug_cb_405.cmm
M util/qualcomm/scripts/cmm/debug_cb_common.cmm
A util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm
4 files changed, 211 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/29951/6
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Gerrit-MessageType: newpatchset
Patrick Georgi has uploaded a new patch set (#6) to the change originally created by nsekar(a)codeaurora.org. ( https://review.coreboot.org/c/coreboot/+/29950 )
Change subject: soc/qualcomm/qcs405: Add MMU support
......................................................................
soc/qualcomm/qcs405: Add MMU support
Initialize 1st 4GB as Device Memory, except:
* 1st page: NULL address
* System_IMEM: Cached SRAM
* Boot_IMEM: Cached SRAM
Change-Id: I8c6353be2c0379ec94f91223805762a2286de06d
Signed-off-by: Sricharan R <sricharan(a)codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org>
---
M src/soc/qualcomm/qcs405/Makefile.inc
M src/soc/qualcomm/qcs405/bootblock.c
A src/soc/qualcomm/qcs405/include/soc/mmu.h
A src/soc/qualcomm/qcs405/include/soc/symbols.h
A src/soc/qualcomm/qcs405/mmu.c
5 files changed, 85 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/29950/6
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29951 )
Change subject: util/qualcomm: Add T32 debug scripts
......................................................................
Patch Set 5: Code-Review-1
(1 comment)
Patrick already mentioned the failure here - adding -1 to bring attention to the issue.
https://review.coreboot.org/#/c/29951/5/util/qualcomm/scripts/cmm/pbl32_to_…
File util/qualcomm/scripts/cmm/pbl32_to_bootblock64_jump.cmm:
https://review.coreboot.org/#/c/29951/5/util/qualcomm/scripts/cmm/pbl32_to_…
PS5, Line 17:
remove extra newline to get this series of patches to pass.
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