coreboot-gerrit January 2019

coreboot-gerrit@coreboot.org

1 participants
1296 discussions

Change in ...coreboot[master]: src/soc/intel/cnl/chip.h: Fix preprocessor condition
by Subrata Banik (Code Review) 28 Jan '19

28 Jan '19

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31095 ) Change subject: src/soc/intel/cnl/chip.h: Fix preprocessor condition ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/31095 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a6959bb615fb5668cbfe54339747d135bd5a005 Gerrit-Change-Number: 31095 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 28 Jan 2019 06:34:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by HAOUAS Elyes (Code Review) 28 Jan '19

28 Jan '19

Hello Kyösti Mälkki, Patrick Rudolph, Angel Pons, Arthur Heymans, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/22604 to look at the new patch set (#65). Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... cpu/intel/speedstep: Add Netburst CPUs Netburst CPUs hang if we read MSR_PLATFORM_INFO or MSR_EXTENDED_CONFIG. The maximum bus ratio can be read in MSR_PERF_STAT[44:40] Tested with P4 (CPUID F65) on 945G-M4 board. Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/speedstep/acpi.c M src/cpu/intel/speedstep/speedstep.c 2 files changed, 51 insertions(+), 56 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/22604/65 -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 65 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: util/bincfg: code cleanup: convert sym_table to a local variable
by Stefan Reinauer (Code Review) 27 Jan '19

27 Jan '19

Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27810 ) Change subject: util/bincfg: code cleanup: convert sym_table to a local variable ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/#/c/27810/6/util/bincfg/bincfg.h File util/bincfg/bincfg.h: https://review.coreboot.org/#/c/27810/6/util/bincfg/bincfg.h@39 PS6, Line 39: : static struct field *putsym(field_ptr_t, char const *, unsigned int); : static struct field *getsym(field_ptr_t, char const *); : static void yyerror(FILE *, field_ptr_t, char const *); > this broke bincfg as field_ptr_t is not defined now... Shouldn't this just be struct field **? -- To view, visit https://review.coreboot.org/c/coreboot/+/27810 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I652a8da75498f871a53eb7509f6145c4842e3373 Gerrit-Change-Number: 27810 Gerrit-PatchSet: 6 Gerrit-Owner: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Gerrit-Reviewer: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Kocialkowski <contact(a)paulk.fr> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Mon, 28 Jan 2019 02:34:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: cpu/intel/speedstep: Add Netburst
by Arthur Heymans (Code Review) 27 Jan '19

27 Jan '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/22604 ) Change subject: cpu/intel/speedstep: Add Netburst ...................................................................... Patch Set 64: (1 comment) https://review.coreboot.org/#/c/22604/64/src/cpu/intel/speedstep/speedstep.c File src/cpu/intel/speedstep/speedstep.c: https://review.coreboot.org/#/c/22604/64/src/cpu/intel/speedstep/speedstep.… PS64, Line 84: !(rdmsr(IA32_MISC_ENABLE).hi & (1 << (38 - 32)))) { move to a different indention level as the code in the if condition. -- To view, visit https://review.coreboot.org/c/coreboot/+/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 64 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 27 Jan 2019 21:25:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: mb/clevo/n130wu: Add mainboard
by build bot (Jenkins) (Code Review) 27 Jan '19

27 Jan '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28640 ) Change subject: mb/clevo/n130wu: Add mainboard ...................................................................... Patch Set 78: (2 comments) https://review.coreboot.org/#/c/28640/78/src/mainboard/clevo/n130wu/gpio.h File src/mainboard/clevo/n130wu/gpio.h: https://review.coreboot.org/#/c/28640/78/src/mainboard/clevo/n130wu/gpio.h@… PS78, Line 168: /* I2C5_SDA/ISH_I2C2_SDA */ _PAD_CFG_STRUCT(GPP_F10, 0x44000b02, 0x2000000), line over 80 characters https://review.coreboot.org/#/c/28640/78/src/mainboard/clevo/n130wu/gpio.h@… PS78, Line 169: /* I2C5_SCL/ISH_I2C2_SCL */ _PAD_CFG_STRUCT(GPP_F11, 0x44000b02, 0x2000000), line over 80 characters -- To view, visit https://review.coreboot.org/c/coreboot/+/28640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Gerrit-Change-Number: 28640 Gerrit-PatchSet: 78 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Shaleen jain <shaleen(a)jain.sh> Gerrit-Comment-Date: Sun, 27 Jan 2019 16:52:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: mb/clevo/n130wu: Add mainboard
by Felix Singer (Code Review) 27 Jan '19

27 Jan '19

Hello Paul Menzel, Stefan Reinauer, Philipp Deppenwiese, build bot (Jenkins), Martin Roth, Patrick Georgi, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/28640 to look at the new patch set (#78). Change subject: mb/clevo/n130wu: Add mainboard ...................................................................... mb/clevo/n130wu: Add mainboard Devices: - N130WU / N131WU Working: - Compiling - Seabios, iPXE - NVMe, SATA3, booting from SSD into Arch Linux - USB2, USB3 - Graphics, mDP, HDMI - Sound - Webcam - WLAN, LAN, Bluetooth, LTE - Keyboard, touchpad - TPM - flashrom support; reading / flashing from Linux Works, but needs testing: - Thunderbolt WIP: - Documentation Not working: - EC ACPI Untested: - Virtualization Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Signed-off-by: Felix Singer <migy(a)darmstadt.ccc.de> --- A Documentation/mainboard/clevo/index.md A Documentation/mainboard/clevo/n130wu/index.md A Documentation/mainboard/clevo/n130wu/n130wu_overview.jpg M Documentation/mainboard/index.md A src/mainboard/clevo/Kconfig A src/mainboard/clevo/Kconfig.name A src/mainboard/clevo/n130wu/Kconfig A src/mainboard/clevo/n130wu/Kconfig.name A src/mainboard/clevo/n130wu/Makefile.inc A src/mainboard/clevo/n130wu/acpi/ec.asl A src/mainboard/clevo/n130wu/acpi/superio.asl A src/mainboard/clevo/n130wu/acpi_tables.c A src/mainboard/clevo/n130wu/board_info.txt A src/mainboard/clevo/n130wu/devicetree.cb A src/mainboard/clevo/n130wu/dsdt.asl A src/mainboard/clevo/n130wu/gpio.h A src/mainboard/clevo/n130wu/hda_verb.c A src/mainboard/clevo/n130wu/pei_data.c A src/mainboard/clevo/n130wu/pei_data.h A src/mainboard/clevo/n130wu/ramstage.c A src/mainboard/clevo/n130wu/romstage.c A src/mainboard/clevo/n130wu/variants/n13xwu/data.vbt A src/mainboard/clevo/n130wu/variants/n13xwu/overridetree.cb 23 files changed, 946 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/28640/78 -- To view, visit https://review.coreboot.org/c/coreboot/+/28640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Gerrit-Change-Number: 28640 Gerrit-PatchSet: 78 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Shaleen jain <shaleen(a)jain.sh> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: src/soc/intel/cnl/chip.h: Fix preprocessor condition
by Angel Pons (Code Review) 27 Jan '19

27 Jan '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31095 ) Change subject: src/soc/intel/cnl/chip.h: Fix preprocessor condition ...................................................................... Patch Set 4: > Patch Set 4: Code-Review+1 > > > Patch Set 4: > > > > > Patch Set 4: Code-Review-1 > > > > > > Kindly hold this CL, till the time submitter of original CL come and share his view. > > > -1 just to block this CL from merge else no issue > > > > Ack, I will add them as reviewer. > > At this point we can use this change but I think we should have different Kconfig options for all SOC. I agree. If CNL, CFL and WHL are similar it would be a good idea to make a common Kconfig option for all three, and make SOC_INTEL_CANNONLAKE CNL-specific. -- To view, visit https://review.coreboot.org/c/coreboot/+/31095 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a6959bb615fb5668cbfe54339747d135bd5a005 Gerrit-Change-Number: 31095 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 27 Jan 2019 16:01:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: src/soc/intel/cnl/chip.h: Fix preprocessor condition
by Ronak Kanabar (Code Review) 27 Jan '19

27 Jan '19

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31095 ) Change subject: src/soc/intel/cnl/chip.h: Fix preprocessor condition ...................................................................... Patch Set 4: Code-Review+1 > Patch Set 4: > > > Patch Set 4: Code-Review-1 > > > > Kindly hold this CL, till the time submitter of original CL come and share his view. > > -1 just to block this CL from merge else no issue > > Ack, I will add them as reviewer. At this point we can use this change but I think we should have different Kconfig options for all SOC. -- To view, visit https://review.coreboot.org/c/coreboot/+/31095 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8a6959bb615fb5668cbfe54339747d135bd5a005 Gerrit-Change-Number: 31095 Gerrit-PatchSet: 4 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 27 Jan 2019 15:53:24 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: soc/intel/cannonlake: Change in SaGv options
by Ronak Kanabar (Code Review) 27 Jan '19

27 Jan '19

Ronak Kanabar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30917 Change subject: soc/intel/cannonlake: Change in SaGv options ...................................................................... soc/intel/cannonlake: Change in SaGv options CML,WHL and CFL is not using midfixed option in SaGv so keeping it for CNL and removing it for CML,WHL and CFL. Change-Id: I754515c2f8e249479c603872c61ac9a006e962ff Signed-off-by: Ronak Kanabar <ronak.kanabar(a)intel.com> --- M src/soc/intel/cannonlake/chip.h 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/30917/1 diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 6517b9e..11cddc9 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -105,7 +105,9 @@ enum { SaGv_Disabled, SaGv_FixedLow, +#if IS_ENABLED(CONFIG_SOC_INTEL_CANNONLAKE_PCH_H) SaGv_FixedMid, +#endif SaGv_FixedHigh, SaGv_Enabled, } SaGv; -- To view, visit https://review.coreboot.org/c/coreboot/+/30917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I754515c2f8e249479c603872c61ac9a006e962ff Gerrit-Change-Number: 30917 Gerrit-PatchSet: 1 Gerrit-Owner: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-MessageType: newchange

9 36

Change in ...coreboot[master]: src/mb/google/hatch: disable HECI
by Ronak Kanabar (Code Review) 27 Jan '19

27 Jan '19

Ronak Kanabar has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31097 ) Change subject: src/mb/google/hatch: disable HECI ...................................................................... Patch Set 1: Code-Review-1 > Patch Set 1: > > > Patch Set 1: > > > > > Patch Set 1: > > > > > > > Patch Set 1: Code-Review-1 > > > > > > > > Yes, this causes hatch to not boot. It gets stuck after finalizing SMM output in the BIOS logs: > > > > > > > > CBFS: 'VBOOT' located CBFS at [1410000:1521000) > > > > CBFS: Locating 'fallback/payload' > > > > CBFS: Found @ offset fc000 size 14fc4 > > > > Checking segment from ROM address 0xff50c038 > > > > Checking segment from ROM address 0xff50c054 > > > > Loading segment from ROM address 0xff50c038 > > > > code (compression=1) > > > > New segment dstaddr 0x30104020 memsize 0x638f10 srcaddr 0xff50c070 filesize 0c > > > > Loading Segment: addr: 0x30104020 memsz: 0x0000000000638f10 filesz: 0x000000000c > > > > using LZMA > > > > [ 0x30104020, 3012e5c0, 0x3073cf30) <- ff50c070 > > > > Clearing Segment: addr: 0x000000003012e5c0 memsz: 0x000000000060e970 > > > > Loading segment from ROM address 0xff50c054 > > > > Entry Point 0x30104020 > > > > Loaded segments > > > > Finalizing chipset. > > > > Finalizing SMM. > > > > > > Could this be because of the SaGv enable change? > > > > No. I tried disabling HECI after I put in the SaGv_Enabled fix and results in this. > > I believe my wording was imprecise. CB:31095 (SaGv fix) is most likely not an issue, but CB:30774 (which enabled HECI as well as SaGv for Hatch) could be an issue. Maybe SaGv depends on HECI? There is no relation between SaGv and HECI this both things are totally different. No dependency at all. Both are different Features. As discussed CB:30774 at this point HeciEnabled should be 1 to make platform boot. Bug:123413775 is already raised. HeciEnabled can't be zero. -- To view, visit https://review.coreboot.org/c/coreboot/+/31097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53b8e10e910bcff108c203234d613fffc8314c4f Gerrit-Change-Number: 31097 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 27 Jan 2019 15:40:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2019