coreboot-gerrit January 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: vendorcode/eltan: Add vendor code for measured and verified boot.
by Angel Pons (Code Review) 13 Jan '19

13 Jan '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30218 ) Change subject: vendorcode/eltan: Add vendor code for measured and verified boot. ...................................................................... Patch Set 7: (7 comments) https://review.coreboot.org/#/c/30218/7//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/30218/7//COMMIT_MSG@7 PS7, Line 7: vendorcode/eltan: Add vendor code for measured and verified boot. Please, no full stops at the end of the commit summary. https://review.coreboot.org/#/c/30218/7//COMMIT_MSG@14 PS7, Line 14: Kconfg Kconf*i*g https://review.coreboot.org/#/c/30218/7/Documentation/vendorcode/eltan/secu… File Documentation/vendorcode/eltan/security.md: https://review.coreboot.org/#/c/30218/7/Documentation/vendorcode/eltan/secu… PS7, Line 5: Verify "Verified" ? https://review.coreboot.org/#/c/30218/7/Documentation/vendorcode/eltan/secu… PS7, Line 6: used only small library for the encryption leave as much more space in flash : available for payload uses a smaller encryption library and leaves much more space in flash for the payload. https://review.coreboot.org/#/c/30218/7/Documentation/vendorcode/eltan/secu… PS7, Line 10: sha1, sha256 and sha512 SHA-1, SHA-256 and SHA-512 https://review.coreboot.org/#/c/30218/7/Documentation/vendorcode/eltan/secu… PS7, Line 11: Please, no trailing whitespace. https://review.coreboot.org/#/c/30218/7/Documentation/vendorcode/eltan/secu… PS7, Line 18: trailing whitespace -- To view, visit https://review.coreboot.org/c/coreboot/+/30218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic1d5a21d40b6a31886777e8e9fe7b28c860f1a80 Gerrit-Change-Number: 30218 Gerrit-PatchSet: 7 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Patrick Rudolph Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sun, 13 Jan 2019 01:37:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/nb/intel/sandybridge/pcie.c: remove assert()
by Angel Pons (Code Review) 13 Jan '19

13 Jan '19

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30865 Change subject: src/nb/intel/sandybridge/pcie.c: remove assert() ...................................................................... src/nb/intel/sandybridge/pcie.c: remove assert() Use proper if() statements instead. Change-Id: If097ae6d387de393e45d820b65d60b17026e1805 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/northbridge/intel/sandybridge/pcie.c 1 file changed, 3 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/30865/1 diff --git a/src/northbridge/intel/sandybridge/pcie.c b/src/northbridge/intel/sandybridge/pcie.c index bb88c7a..f942433 100644 --- a/src/northbridge/intel/sandybridge/pcie.c +++ b/src/northbridge/intel/sandybridge/pcie.c @@ -19,7 +19,6 @@ #include <device/pci.h> #include <device/pciexp.h> #include <device/pci_ids.h> -#include <assert.h> static void pcie_disable(struct device *dev) { @@ -30,12 +29,9 @@ #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) static const char *pcie_acpi_name(const struct device *dev) { - assert(dev); - - if (dev->path.type != DEVICE_PATH_PCI) + if (!dev || !dev->bus || dev->path.type != DEVICE_PATH_PCI) return NULL; - assert(dev->bus); if (dev->bus->secondary == 0) switch (dev->path.pci.devfn) { case PCI_DEVFN(1, 0): @@ -49,8 +45,8 @@ }; struct device *const port = dev->bus->dev; - assert(port); - assert(port->bus); + if (!port || !port->bus) + return NULL; if (dev->path.pci.devfn == PCI_DEVFN(0, 0) && port->bus->secondary == 0 && -- To view, visit https://review.coreboot.org/c/coreboot/+/30865 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If097ae6d387de393e45d820b65d60b17026e1805 Gerrit-Change-Number: 30865 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: console: Add Kconfig debug option DEBUG_CONSOLE_INIT
by Angel Pons (Code Review) 13 Jan '19

13 Jan '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30558 ) Change subject: console: Add Kconfig debug option DEBUG_CONSOLE_INIT ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/30558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc2bb22bf930009ee229d4461f512ada3018307b Gerrit-Change-Number: 30558 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Sun, 13 Jan 2019 01:07:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: console: Add Kconfig debug option DEBUG_CONSOLE_INIT
by Nico Huber (Code Review) 13 Jan '19

13 Jan '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30558 ) Change subject: console: Add Kconfig debug option DEBUG_CONSOLE_INIT ...................................................................... Patch Set 4: (1 comment) https://review.coreboot.org/#/c/30558/4/src/Kconfig File src/Kconfig: https://review.coreboot.org/#/c/30558/4/src/Kconfig@790 PS4, Line 790: initialisation has not been completed. Your mileage may vary. spurious `not`? -- To view, visit https://review.coreboot.org/c/coreboot/+/30558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc2bb22bf930009ee229d4461f512ada3018307b Gerrit-Change-Number: 30558 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Sat, 12 Jan 2019 23:26:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/cannonlake: Hook Microcode
by Lijian Zhao (Code Review) 13 Jan '19

13 Jan '19

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30864 Change subject: soc/intel/cannonlake: Hook Microcode ...................................................................... soc/intel/cannonlake: Hook Microcode Hook Coffeelake U43e and Coffeelake H/S/E3 microcode into SOC and remove the MICROCODE_BLOB_NOT_HOOKED_UP. BUG=N/A TEST=Boot up with coffeelake rvp board and check microcode revision in coreboot log. Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> Change-Id: I6593081374dd4898a82db5b43c3b5bf154b3ef60 --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc 2 files changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/30864/1 diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index a3390d8..f8193cd 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -46,7 +46,6 @@ select PARALLEL_MP select PARALLEL_MP_AP_WORK select PLATFORM_USES_FSP2_0 - select MICROCODE_BLOB_NOT_HOOKED_UP select POSTCAR_CONSOLE select POSTCAR_STAGE select REG_SCRIPT diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index fb2c849..b2ba0fd 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -87,6 +87,11 @@ verstage-y += gpio.c endif +# Coffeelake U43e D0 +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_806ex/microcode.bin +# Coffeelake H/S/E3 B0 U0 +cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_906ex/microcode.bin + CPPFLAGS_common += -I$(src)/soc/intel/cannonlake CPPFLAGS_common += -I$(src)/soc/intel/cannonlake/include -- To view, visit https://review.coreboot.org/c/coreboot/+/30864 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6593081374dd4898a82db5b43c3b5bf154b3ef60 Gerrit-Change-Number: 30864 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: src/cpu/intel: Set get_ia32_fsb function common
by Angel Pons (Code Review) 13 Jan '19

13 Jan '19

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30103 ) Change subject: src/cpu/intel: Set get_ia32_fsb function common ...................................................................... Patch Set 24: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I232bf88de7ebba6ac5865db046ce79e9b2f3ed28 Gerrit-Change-Number: 30103 Gerrit-PatchSet: 24 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 12 Jan 2019 23:07:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: src/cpu/intel: Set get_ia32_fsb function common
by Nico Huber (Code Review) 13 Jan '19

13 Jan '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30103 ) Change subject: src/cpu/intel: Set get_ia32_fsb function common ...................................................................... Patch Set 24: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30103 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I232bf88de7ebba6ac5865db046ce79e9b2f3ed28 Gerrit-Change-Number: 30103 Gerrit-PatchSet: 24 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Sat, 12 Jan 2019 23:02:00 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/apollolake: Hook up microcode
by Lance Zhao (Code Review) 12 Jan '19

12 Jan '19

Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30885 ) Change subject: soc/intel/apollolake: Hook up microcode ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/30885 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7b42dc00d82c9d80d72a911762e79a4e48809281 Gerrit-Change-Number: 30885 Gerrit-PatchSet: 1 Gerrit-Owner: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: John Zhao <john.zhao(a)intel.com> Gerrit-Comment-Date: Sat, 12 Jan 2019 19:06:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: console: Add Kconfig debug option DEBUG_CONSOLE_INIT
by Kyösti Mälkki (Code Review) 12 Jan '19

12 Jan '19

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30558 to look at the new patch set (#4). Change subject: console: Add Kconfig debug option DEBUG_CONSOLE_INIT ...................................................................... console: Add Kconfig debug option DEBUG_CONSOLE_INIT Under normal circumstances no printk() goes through until console_hw_init() has completed. This is wanted behaviour, except when you need to debug the setup of one of consoles. Change-Id: Ifc2bb22bf930009ee229d4461f512ada3018307b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/Kconfig M src/console/init.c 2 files changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/30558/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/30558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc2bb22bf930009ee229d4461f512ada3018307b Gerrit-Change-Number: 30558 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: buildsystem: Promote rules.h to default include
by Kyösti Mälkki (Code Review) 12 Jan '19

12 Jan '19

Hello Patrick Rudolph, Aaron Durbin, Julius Werner, Paul Menzel, build bot (Jenkins), Philipp Hug, Patrick Georgi, Furquan Shaikh, ron minnich, David Guckian, Vanny E, Huang Jin, York Yang, Lee Leahy, Jonathan Neuschäfer, Nico Huber, David Guckian, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/17656 to look at the new patch set (#7). Change subject: buildsystem: Promote rules.h to default include ...................................................................... buildsystem: Promote rules.h to default include Does not fix 3rdparty/, *.S or *.ld yet. Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M Makefile.inc M src/arch/arm64/boot.c M src/arch/riscv/boot.c M src/arch/riscv/stages.c M src/arch/x86/acpi_s3.c M src/arch/x86/exception.c M src/arch/x86/include/arch/acpi.h M src/arch/x86/include/arch/cpu.h M src/arch/x86/include/arch/early_variables.h M src/arch/x86/include/arch/exception.h M src/arch/x86/include/arch/io.h M src/arch/x86/include/arch/memlayout.h M src/arch/x86/rdrand.c M src/commonlib/storage/pci_sdhci.c M src/console/console.c M src/console/init.c M src/console/post.c M src/cpu/intel/microcode/microcode.c M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/pae/pgtbl.c M src/drivers/intel/fsp1_1/cache_as_ram.inc M src/drivers/intel/fsp1_1/include/fsp/util.h M src/drivers/intel/fsp2_0/include/fsp/info_header.h M src/drivers/net/ne2k.c M src/drivers/spi/spi_flash.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/include/bootstate.h M src/include/cbmem.h M src/include/console/cbmem_console.h M src/include/console/console.h M src/include/console/flash.h M src/include/console/ne2k.h M src/include/console/qemu_debugcon.h M src/include/console/spi.h M src/include/console/spkmodem.h M src/include/console/uart.h M src/include/console/usb.h M src/include/device/device.h M src/include/device/pci.h M src/include/device/pnp.h M src/include/memlayout.h M src/include/stddef.h M src/lib/bootmode.c M src/lib/cbmem_common.c M src/lib/ext_stage_cache.c M src/lib/imd_cbmem.c M src/lib/prog_loaders.c M src/lib/romstage_handoff.c M src/lib/timestamp.c M src/mainboard/google/cyan/chromeos.c M src/mainboard/google/dragonegg/chromeos.c M src/mainboard/google/eve/chromeos.c M src/mainboard/google/fizz/chromeos.c M src/mainboard/google/glados/chromeos.c M src/mainboard/google/kahlee/ec.c M src/mainboard/google/octopus/ec.c M src/mainboard/google/poppy/chromeos.c M src/mainboard/google/reef/ec.c M src/mainboard/google/sarien/chromeos.c M src/mainboard/google/storm/mmu.c M src/mainboard/intel/cannonlake_rvp/chromeos.c M src/mainboard/intel/coffeelake_rvp/chromeos.c M src/mainboard/intel/glkrvp/ec.c M src/mainboard/intel/icelake_rvp/chromeos.c M src/mainboard/intel/kblrvp/chromeos.c M src/mainboard/intel/kunimitsu/chromeos.c M src/mainboard/intel/strago/chromeos.c M src/northbridge/intel/fsp_rangeley/northbridge.h M src/northbridge/intel/gm45/gm45.h M src/northbridge/intel/sandybridge/sandybridge.h M src/security/vboot/bootmode.c M src/security/vboot/vboot_common.c M src/security/vboot/vboot_loader.c M src/soc/amd/common/block/pi/agesawrapper.c M src/soc/amd/stoneyridge/include/soc/pci_devs.h M src/soc/amd/stoneyridge/include/soc/southbridge.h M src/soc/intel/apollolake/include/soc/pci_devs.h M src/soc/intel/apollolake/pmutil.c M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/include/soc/iosf.h M src/soc/intel/braswell/include/soc/nvs.h M src/soc/intel/braswell/include/soc/smm.h M src/soc/intel/braswell/pmutil.c M src/soc/intel/braswell/spi.c M src/soc/intel/braswell/tsc_freq.c M src/soc/intel/cannonlake/include/soc/pci_devs.h M src/soc/intel/cannonlake/pmutil.c M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/denverton_ns/include/soc/pci_devs.h M src/soc/intel/icelake/include/soc/pci_devs.h M src/soc/intel/icelake/pmutil.c M src/soc/intel/skylake/include/soc/nvs.h M src/soc/intel/skylake/include/soc/pch.h M src/soc/intel/skylake/include/soc/pci_devs.h M src/soc/intel/skylake/pmutil.c M src/southbridge/amd/rs780/rs780.h M src/southbridge/intel/bd82x6x/early_pch_common.c 98 files changed, 1 insertion(+), 99 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/17656/7 -- To view, visit https://review.coreboot.org/c/coreboot/+/17656 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda Gerrit-Change-Number: 17656 Gerrit-PatchSet: 7 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit January 2019