coreboot-gerrit January 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: AGESA binaryPI: Flip HUDSON_IMC_FWM default to disabled
by mikeb mikeb (Code Review) 13 Jan '19

13 Jan '19

mikeb mikeb has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/18561 ) Change subject: AGESA binaryPI: Flip HUDSON_IMC_FWM default to disabled ...................................................................... Patch Set 8: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/18561 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87146e32e1a9a8f8133987d2b26e059065c89b14 Gerrit-Change-Number: 18561 Gerrit-PatchSet: 8 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mikeb mikeb <mikebdp2(a)gmail.com> Gerrit-Comment-Date: Sun, 13 Jan 2019 14:16:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: nb/intel/x4x: Remove spurious pcidev_on_root() usage
by Nico Huber (Code Review) 13 Jan '19

13 Jan '19

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30880 Change subject: nb/intel/x4x: Remove spurious pcidev_on_root() usage ...................................................................... nb/intel/x4x: Remove spurious pcidev_on_root() usage It's supposed to be the same device that is passed to the executing function. Change-Id: I6cf994390c16e0393c96a2b2e04a36305be88e68 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/northbridge/intel/x4x/gma.c 1 file changed, 1 insertion(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/30880/1 diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c index 680b836..efb17a6 100644 --- a/src/northbridge/intel/x4x/gma.c +++ b/src/northbridge/intel/x4x/gma.c @@ -69,10 +69,7 @@ pci_write_config32(dev, PCI_COMMAND, reg32); /* configure GMBUSFREQ */ - reg16 = pci_read_config16(pcidev_on_root(0x2, 0), 0xcc); - reg16 &= ~0x1ff; - reg16 |= 0xbc; - pci_write_config16(pcidev_on_root(0x2, 0), 0xcc, reg16); + reg16 = pci_update_config16(dev, 0xcc, ~0x1ff, 0xbc); int vga_disable = (pci_read_config16(dev, D0F0_GGC) & 2) >> 1; -- To view, visit https://review.coreboot.org/c/coreboot/+/30880 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6cf994390c16e0393c96a2b2e04a36305be88e68 Gerrit-Change-Number: 30880 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: nb/intel/i945: Reduce pcidev_on_root() calls
by Nico Huber (Code Review) 13 Jan '19

13 Jan '19

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30881 Change subject: nb/intel/i945: Reduce pcidev_on_root() calls ...................................................................... nb/intel/i945: Reduce pcidev_on_root() calls Also removes one call for 0:2.0 (integrated graphics) that might be disabled. Change-Id: I494aa366030b77baf431f29ba331f13f7c567025 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/northbridge/intel/i945/northbridge.c 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/30881/1 diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 2b51b5e..10a7ba4 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -66,6 +66,7 @@ unsigned long long tomk, tomk_stolen; uint64_t uma_memory_base = 0, uma_memory_size = 0; uint64_t tseg_memory_base = 0, tseg_memory_size = 0; + struct device *const d0f0 = pcidev_on_root(0, 0); pci_domain_read_resources(dev); @@ -75,17 +76,14 @@ pci_tolm = find_pci_tolm(dev->link_list); printk(BIOS_DEBUG, "pci_tolm: 0x%x\n", pci_tolm); - printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n", - pci_read_config32(pcidev_on_root(2, 0), BSM)); - - tolud = pci_read_config8(pcidev_on_root(0, 0), TOLUD); + tolud = pci_read_config8(d0f0, TOLUD); printk(BIOS_SPEW, "Top of Low Used DRAM: 0x%08x\n", tolud << 24); tomk = tolud << 14; tomk_stolen = tomk; /* Note: subtract IGD device and TSEG */ - reg16 = pci_read_config16(pcidev_on_root(0, 0), GGC); + reg16 = pci_read_config16(d0f0, GGC); if (!(reg16 & 2)) { printk(BIOS_DEBUG, "IGD decoded, subtracting "); int uma_size = decode_igd_memory_size((reg16 >> 4) & 7); @@ -96,10 +94,12 @@ /* For reserving UMA memory in the memory map */ uma_memory_base = tomk_stolen * 1024ULL; uma_memory_size = uma_size * 1024ULL; + + printk(BIOS_SPEW, "Base of stolen memory: 0x%08x\n", + (unsigned int)uma_memory_base); } - tseg_sizek = decode_tseg_size(pci_read_config8(pcidev_on_root(0, 0), - ESMRAMC)) >> 10; + tseg_sizek = decode_tseg_size(pci_read_config8(d0f0, ESMRAMC)) >> 10; printk(BIOS_DEBUG, "TSEG decoded, subtracting %dM\n", tseg_sizek >> 10); tomk_stolen -= tseg_sizek; tseg_memory_base = tomk_stolen * 1024ULL; -- To view, visit https://review.coreboot.org/c/coreboot/+/30881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I494aa366030b77baf431f29ba331f13f7c567025 Gerrit-Change-Number: 30881 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: sb/intel: Check for NULL-return of pcidev_on_root()
by Nico Huber (Code Review) 13 Jan '19

13 Jan '19

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30879 Change subject: sb/intel: Check for NULL-return of pcidev_on_root() ...................................................................... sb/intel: Check for NULL-return of pcidev_on_root() In these cases we have to expect a NULL pointer because the IGD device 0:2.0 may be disabled. Change-Id: I1bab8fa3a82daca71d03453315cdd69d8951fc24 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/southbridge/intel/bd82x6x/lpc.c M src/southbridge/intel/i82801gx/lpc.c M src/southbridge/intel/i82801ix/lpc.c M src/southbridge/intel/i82801jx/lpc.c M src/southbridge/intel/ibexpeak/lpc.c M src/southbridge/intel/lynxpoint/lpc.c 6 files changed, 27 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/30879/1 diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index e13c666..4de4f16 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -719,8 +719,10 @@ gnvs->mpen = 1; /* Enable Multi Processing */ gnvs->pcnt = dev_count_cpu(); - gnvs->ndid = gfx->ndid; - memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + if (gfx) { + gnvs->ndid = gfx->ndid; + memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + } #if IS_ENABLED(CONFIG_CHROMEOS) chromeos_init_chromeos_acpi(&(gnvs->chromeos)); diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index e8cfc74..b20b2aa 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -705,8 +705,10 @@ acpi_create_gnvs(gnvs); - gnvs->ndid = gfx->ndid; - memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + if (gfx) { + gnvs->ndid = gfx->ndid; + memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + } /* And tell SMI about it */ smm_setup_structures(gnvs, NULL, NULL); diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index dd37a0b..e18f616 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -545,8 +545,10 @@ memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); - gnvs->ndid = gfx->ndid; - memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + if (gfx) { + gnvs->ndid = gfx->ndid; + memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + } /* And tell SMI about it */ smm_setup_structures(gnvs, NULL, NULL); diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 0f82f90..3f7095c 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -707,8 +707,10 @@ memset(gnvs, 0, sizeof(*gnvs)); acpi_create_gnvs(gnvs); - gnvs->ndid = gfx->ndid; - memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + if (gfx) { + gnvs->ndid = gfx->ndid; + memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + } /* And tell SMI about it */ smm_setup_structures(gnvs, NULL, NULL); diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 3358633..a96b7ff 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -632,8 +632,11 @@ gnvs->apic = 1; gnvs->mpen = 1; /* Enable Multi Processing */ gnvs->pcnt = dev_count_cpu(); - gnvs->ndid = gfx->ndid; - memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + + if (gfx) { + gnvs->ndid = gfx->ndid; + memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + } /* And tell SMI about it */ smm_setup_structures(gnvs, NULL, NULL); diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 474c7df..53e6da1 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -456,7 +456,8 @@ RCBA32_AND_OR(0x2614, 0x8bffffff, 0x0a206500); /* Check for LPT-LP B2 stepping and 0:31.0@0xFA > 4 */ - if (pci_read_config8(pcidev_on_root(2, 0), 0x8) >= 0x0b) + const struct device *const gma = pcidev_on_root(2, 0); + if (gma && pci_read_config8(gma, 0x8) >= 0x0b) RCBA32_OR(0x2614, (1 << 26)); RCBA32_OR(0x900, 0x0000031f); @@ -760,8 +761,10 @@ /* Update the mem console pointer. */ gnvs->cbmc = (u32)cbmem_find(CBMEM_ID_CONSOLE); - gnvs->ndid = gfx->ndid; - memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + if (gfx) { + gnvs->ndid = gfx->ndid; + memcpy(gnvs->did, gfx->did, sizeof(gnvs->did)); + } /* And tell SMI about it */ smm_setup_structures(gnvs, NULL, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/30879 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1bab8fa3a82daca71d03453315cdd69d8951fc24 Gerrit-Change-Number: 30879 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: AGESA binaryPI: Flip HUDSON_IMC_FWM default to disabled
by Michał Żygowski (Code Review) 13 Jan '19

13 Jan '19

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/18561 ) Change subject: AGESA binaryPI: Flip HUDSON_IMC_FWM default to disabled ...................................................................... Patch Set 8: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/18561 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87146e32e1a9a8f8133987d2b26e059065c89b14 Gerrit-Change-Number: 18561 Gerrit-PatchSet: 8 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Mike Banon <mikebdp2(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: mikeb mikeb <mikebdp2(a)gmail.com> Gerrit-Comment-Date: Sun, 13 Jan 2019 13:59:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: binaryPI: Remove ACPI for IMC we don't run
by Michał Żygowski (Code Review) 13 Jan '19

13 Jan '19

Michał Żygowski has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21190 ) Change subject: binaryPI: Remove ACPI for IMC we don't run ...................................................................... Patch Set 6: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/21190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6a58ab53d4a800d4c0c2026e50826122ece2c59f Gerrit-Change-Number: 21190 Gerrit-PatchSet: 6 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 13 Jan 2019 13:59:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: usbdebug: Remove option DEBUG_USBDEBUG
by Kyösti Mälkki (Code Review) 13 Jan '19

13 Jan '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30878 Change subject: usbdebug: Remove option DEBUG_USBDEBUG ...................................................................... usbdebug: Remove option DEBUG_USBDEBUG Superseeded with DEBUG_CONSOLE_INIT. Change-Id: Idf470b8572ad992c8d4684a860412d9140f514ca Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/Kconfig M src/drivers/usb/ehci_debug.c 2 files changed, 19 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/30878/1 diff --git a/src/Kconfig b/src/Kconfig index fb24b5f..cc8cb08 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -961,16 +961,6 @@ help This option enables additional SPI flash related debug messages. -config DEBUG_USBDEBUG - bool "Output verbose USB 2.0 EHCI debug dongle messages" - default n - depends on USBDEBUG - help - This option enables additional USB 2.0 debug dongle related messages. - - Select this to debug the connection of usbdebug dongle. Note that - you need some other working console to receive the messages. - if SOUTHBRIDGE_INTEL_BD82X6X && DEFAULT_CONSOLE_LOGLEVEL_8 # Only visible with the right southbridge and loglevel. config DEBUG_INTEL_ME diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index 6d0339b..18d0491 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -34,13 +34,14 @@ struct dbgp_pipe ep_pipe[DBGP_MAX_ENDPOINTS]; }; -#if IS_ENABLED(CONFIG_DEBUG_USBDEBUG) -static void dbgp_print_data(struct ehci_dbg_port *ehci_debug); -static int dbgp_enabled(void); +#if IS_ENABLED(CONFIG_DEBUG_CONSOLE_INIT) +/* When selected, you can debug the connection of usbdebug dongle. + * EHCI port register bits and USB packets are dumped on console, + * assuming some other console already works. + */ # define dprintk(LEVEL, args...) \ do { if (!dbgp_enabled()) printk(LEVEL, ##args); } while (0) #else -# define dbgp_print_data(x) do {} while (0) # define dprintk(LEVEL, args...) do {} while (0) #endif @@ -57,6 +58,9 @@ #define DBGP_MICROFRAME_RETRIES 10 #define DBGP_MAX_PACKET 8 +static int dbgp_enabled(void); +static void dbgp_print_data(struct ehci_dbg_port *ehci_debug); + static struct ehci_debug_info glob_dbg_info CAR_GLOBAL; static struct ehci_debug_info * glob_dbg_info_p CAR_GLOBAL; @@ -202,13 +206,19 @@ bytes[i] = (hi >> (8*(i - 4))) & 0xff; } -#if IS_ENABLED(CONFIG_DEBUG_USBDEBUG) static void dbgp_print_data(struct ehci_dbg_port *ehci_debug) { - u32 ctrl = read32(&ehci_debug->control); - u32 lo = read32(&ehci_debug->data03); - u32 hi = read32(&ehci_debug->data47); - int len = DBGP_LEN(ctrl); + int len; + u32 ctrl, lo, hi; + + if (!IS_ENABLED(CONFIG_DEBUG_CONSOLE_INIT) || dbgp_enabled()) + return; + + ctrl = read32(&ehci_debug->control); + lo = read32(&ehci_debug->data03); + hi = read32(&ehci_debug->data47); + + len = DBGP_LEN(ctrl); if (len) { int i; dprintk(BIOS_SPEW, "dbgp: buf:"); @@ -219,7 +229,6 @@ dprintk(BIOS_SPEW, "\n"); } } -#endif static int dbgp_bulk_write(struct ehci_dbg_port *ehci_debug, struct dbgp_pipe *pipe, const char *bytes, int size) -- To view, visit https://review.coreboot.org/c/coreboot/+/30878 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idf470b8572ad992c8d4684a860412d9140f514ca Gerrit-Change-Number: 30878 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: console: Add Kconfig debug option DEBUG_CONSOLE_INIT
by Kyösti Mälkki (Code Review) 13 Jan '19

13 Jan '19

Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30558 ) Change subject: console: Add Kconfig debug option DEBUG_CONSOLE_INIT ...................................................................... console: Add Kconfig debug option DEBUG_CONSOLE_INIT Under normal circumstances no printk() goes through until console_hw_init() has completed. This is wanted behaviour, except when you need to debug the setup of one of consoles. Change-Id: Ifc2bb22bf930009ee229d4461f512ada3018307b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/30558 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> --- M src/Kconfig M src/console/init.c 2 files changed, 15 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved diff --git a/src/Kconfig b/src/Kconfig index 87b088f..cba48af 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -782,6 +782,18 @@ If unsure, say N. +config DEBUG_CONSOLE_INIT + bool "Debug console initialisation code" + default n + help + With this option printk()'s are attempted before console hardware + initialisation has been completed. Your mileage may vary. + + Typically you will need to modify source in console_hw_init() such + that a working console appears before the one you want to debug. + + If unsure, say N. + # Only visible if debug level is DEBUG (7) or SPEW (8) as it does additional # printk(BIOS_DEBUG, ...) calls. config REALMODE_DEBUG diff --git a/src/console/init.c b/src/console/init.c index f35dd51..0bafdbe 100644 --- a/src/console/init.c +++ b/src/console/init.c @@ -72,6 +72,9 @@ { init_log_level(); + if (IS_ENABLED(CONFIG_DEBUG_CONSOLE_INIT)) + car_set_var(console_inited, 1); + #if IS_ENABLED(CONFIG_EARLY_PCI_BRIDGE) if (!ENV_SMM && !ENV_RAMSTAGE) pci_early_bridge_init(); -- To view, visit https://review.coreboot.org/c/coreboot/+/30558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc2bb22bf930009ee229d4461f512ada3018307b Gerrit-Change-Number: 30558 Gerrit-PatchSet: 6 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: console: Add Kconfig debug option DEBUG_CONSOLE_INIT
by Nico Huber (Code Review) 13 Jan '19

13 Jan '19

Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30558 ) Change subject: console: Add Kconfig debug option DEBUG_CONSOLE_INIT ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifc2bb22bf930009ee229d4461f512ada3018307b Gerrit-Change-Number: 30558 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 13 Jan 2019 12:18:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/kukui: add flapjack on top of kukui
by Patrick Georgi (Code Review) 13 Jan '19

13 Jan '19

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/30859 ) Change subject: mb/google/kukui: add flapjack on top of kukui ...................................................................... mb/google/kukui: add flapjack on top of kukui Add placeholder for future flapjack additions/modifications. BUG=None BRANCH=kukui TEST=build with kukui/flapjack configurations Signed-off-by: YH Lin <yueherngl(a)google.com> Change-Id: Ib9cd39e284f19b9179da73ed9f2b13d97442960e Reviewed-on: https://review.coreboot.org/c/30859 Reviewed-by: Julius Werner <jwerner(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/kukui/Kconfig M src/mainboard/google/kukui/Kconfig.name 2 files changed, 30 insertions(+), 3 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig index d8ad84b..7635e5f 100644 --- a/src/mainboard/google/kukui/Kconfig +++ b/src/mainboard/google/kukui/Kconfig @@ -1,4 +1,23 @@ -if BOARD_GOOGLE_KUKUI +## +## This file is part of the coreboot project. +## +## Copyright 2019 Google Inc. +## +## This program is free software; you can redistribute it and/or modify +## it under the terms of the GNU General Public License as published by +## the Free Software Foundation; version 2 of the License. +## +## This program is distributed in the hope that it will be useful, +## but WITHOUT ANY WARRANTY; without even the implied warranty of +## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +## GNU General Public License for more details. +## + +# Umbrella option to be selected by variant boards. +config BOARD_GOOGLE_KUKUI_COMMON + def_bool n + +if BOARD_GOOGLE_KUKUI_COMMON config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES @@ -25,7 +44,8 @@ config MAINBOARD_PART_NUMBER string - default "Kukui" + default "Kukui" if BOARD_GOOGLE_KUKUI + default "Flapjack" if BOARD_GOOGLE_FLAPJACK config DRIVER_TPM_SPI_BUS hex diff --git a/src/mainboard/google/kukui/Kconfig.name b/src/mainboard/google/kukui/Kconfig.name index ce3ac9e..6c84e26 100644 --- a/src/mainboard/google/kukui/Kconfig.name +++ b/src/mainboard/google/kukui/Kconfig.name @@ -1,2 +1,9 @@ +comment "Kukui" + config BOARD_GOOGLE_KUKUI - bool "Kukui" + bool "-> Kukui" + select BOARD_GOOGLE_KUKUI_COMMON + +config BOARD_GOOGLE_FLAPJACK + bool "-> Flapjack" + select BOARD_GOOGLE_KUKUI_COMMON -- To view, visit https://review.coreboot.org/c/coreboot/+/30859 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib9cd39e284f19b9179da73ed9f2b13d97442960e Gerrit-Change-Number: 30859 Gerrit-PatchSet: 2 Gerrit-Owner: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nick Sanders <nsanders(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit January 2019