coreboot-gerrit January 2019

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: buildsystem: Promote rules.h to default include
by Kyösti Mälkki (Code Review) 12 Jan '19

12 Jan '19

Hello Patrick Rudolph, Aaron Durbin, Julius Werner, Paul Menzel, build bot (Jenkins), Philipp Hug, Patrick Georgi, Furquan Shaikh, ron minnich, David Guckian, Vanny E, Huang Jin, York Yang, Lee Leahy, Jonathan Neuschäfer, Nico Huber, David Guckian, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/17656 to look at the new patch set (#6). Change subject: buildsystem: Promote rules.h to default include ...................................................................... buildsystem: Promote rules.h to default include Does not fix 3rdparty/, *.S or *.ld or yet. Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M Makefile.inc M src/arch/arm64/boot.c M src/arch/riscv/boot.c M src/arch/riscv/stages.c M src/arch/x86/acpi_s3.c M src/arch/x86/exception.c M src/arch/x86/include/arch/acpi.h M src/arch/x86/include/arch/cpu.h M src/arch/x86/include/arch/early_variables.h M src/arch/x86/include/arch/exception.h M src/arch/x86/include/arch/io.h M src/arch/x86/include/arch/memlayout.h M src/arch/x86/rdrand.c M src/commonlib/storage/pci_sdhci.c M src/console/console.c M src/console/init.c M src/console/post.c M src/cpu/intel/microcode/microcode.c M src/cpu/x86/32bit/entry32.inc M src/cpu/x86/pae/pgtbl.c M src/drivers/intel/fsp1_1/cache_as_ram.inc M src/drivers/intel/fsp1_1/include/fsp/util.h M src/drivers/intel/fsp2_0/include/fsp/info_header.h M src/drivers/net/ne2k.c M src/drivers/spi/spi_flash.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/include/bootstate.h M src/include/cbmem.h M src/include/console/cbmem_console.h M src/include/console/console.h M src/include/console/flash.h M src/include/console/ne2k.h M src/include/console/qemu_debugcon.h M src/include/console/spi.h M src/include/console/spkmodem.h M src/include/console/uart.h M src/include/console/usb.h M src/include/device/device.h M src/include/device/pci.h M src/include/device/pnp.h M src/include/memlayout.h M src/include/stddef.h M src/lib/bootmode.c M src/lib/cbmem_common.c M src/lib/ext_stage_cache.c M src/lib/imd_cbmem.c M src/lib/prog_loaders.c M src/lib/romstage_handoff.c M src/lib/timestamp.c M src/mainboard/google/cyan/chromeos.c M src/mainboard/google/dragonegg/chromeos.c M src/mainboard/google/eve/chromeos.c M src/mainboard/google/fizz/chromeos.c M src/mainboard/google/glados/chromeos.c M src/mainboard/google/kahlee/ec.c M src/mainboard/google/octopus/ec.c M src/mainboard/google/poppy/chromeos.c M src/mainboard/google/reef/ec.c M src/mainboard/google/sarien/chromeos.c M src/mainboard/google/storm/mmu.c M src/mainboard/intel/cannonlake_rvp/chromeos.c M src/mainboard/intel/coffeelake_rvp/chromeos.c M src/mainboard/intel/glkrvp/ec.c M src/mainboard/intel/icelake_rvp/chromeos.c M src/mainboard/intel/kblrvp/chromeos.c M src/mainboard/intel/kunimitsu/chromeos.c M src/mainboard/intel/strago/chromeos.c M src/northbridge/intel/fsp_rangeley/northbridge.h M src/northbridge/intel/gm45/gm45.h M src/northbridge/intel/sandybridge/sandybridge.h M src/security/vboot/bootmode.c M src/security/vboot/vboot_common.c M src/security/vboot/vboot_loader.c M src/soc/amd/common/block/pi/agesawrapper.c M src/soc/amd/stoneyridge/include/soc/pci_devs.h M src/soc/amd/stoneyridge/include/soc/southbridge.h M src/soc/intel/apollolake/include/soc/pci_devs.h M src/soc/intel/apollolake/pmutil.c M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/include/soc/iosf.h M src/soc/intel/braswell/include/soc/nvs.h M src/soc/intel/braswell/include/soc/smm.h M src/soc/intel/braswell/pmutil.c M src/soc/intel/braswell/spi.c M src/soc/intel/braswell/tsc_freq.c M src/soc/intel/cannonlake/include/soc/pci_devs.h M src/soc/intel/cannonlake/pmutil.c M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/denverton_ns/include/soc/pci_devs.h M src/soc/intel/icelake/include/soc/pci_devs.h M src/soc/intel/icelake/pmutil.c M src/soc/intel/skylake/include/soc/nvs.h M src/soc/intel/skylake/include/soc/pch.h M src/soc/intel/skylake/include/soc/pci_devs.h M src/soc/intel/skylake/pmutil.c M src/southbridge/amd/rs780/rs780.h M src/southbridge/intel/bd82x6x/early_pch_common.c 98 files changed, 1 insertion(+), 99 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/17656/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/17656 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda Gerrit-Change-Number: 17656 Gerrit-PatchSet: 6 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lee Leahy <leroy.p.leahy(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ron minnich <rminnich(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: [WIP] add i945G based mainboard
by HAOUAS Elyes (Code Review) 12 Jan '19

12 Jan '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25509 ) Change subject: [WIP] add i945G based mainboard ...................................................................... Patch Set 24: (1 comment) https://review.coreboot.org/#/c/25509/24/src/mainboard/nec/945g-m4/devicetr… File src/mainboard/nec/945g-m4/devicetree.cb: https://review.coreboot.org/#/c/25509/24/src/mainboard/nec/945g-m4/devicetr… PS24, Line 36: on off -- To view, visit https://review.coreboot.org/c/coreboot/+/25509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Gerrit-Change-Number: 25509 Gerrit-PatchSet: 24 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Jan 2019 12:13:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: arch/x86: Add symbols for CAR MTRRs in linker script
by Kyösti Mälkki (Code Review) 12 Jan '19

12 Jan '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30872 ) Change subject: arch/x86: Add symbols for CAR MTRRs in linker script ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/30872/1/src/arch/x86/car.ld File src/arch/x86/car.ld: https://review.coreboot.org/#/c/30872/1/src/arch/x86/car.ld@105 PS1, Line 105: _car_mtrr_size = (_car_mtrr_end - _car_mtrr_start); > I think it would make sense to check for MTRR alignment here. […] Yeah.. we have checks now on Kconfig variables, could move them here. AMDs don't now use these symbols. And with AP stacks in CAR too, I am not sure if I want to make this reflect the fixed MTRR cases at all. -- To view, visit https://review.coreboot.org/c/coreboot/+/30872 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2fef3546d2bfea2d4d8f87aaf8376e5566fd6aaa Gerrit-Change-Number: 30872 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sat, 12 Jan 2019 11:24:50 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in ...coreboot[master]: arch/x86: Add symbols for CAR MTRRs in linker script
by Arthur Heymans (Code Review) 12 Jan '19

12 Jan '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30872 ) Change subject: arch/x86: Add symbols for CAR MTRRs in linker script ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/30872/1/src/arch/x86/car.ld File src/arch/x86/car.ld: https://review.coreboot.org/#/c/30872/1/src/arch/x86/car.ld@105 PS1, Line 105: _car_mtrr_size = (_car_mtrr_end - _car_mtrr_start); I think it would make sense to check for MTRR alignment here. It would allow to catch bad Kconfig setups. It could be some AMD boards have unaligned CAR regions due to using fixed MTRR's. -- To view, visit https://review.coreboot.org/c/coreboot/+/30872 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2fef3546d2bfea2d4d8f87aaf8376e5566fd6aaa Gerrit-Change-Number: 30872 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sat, 12 Jan 2019 11:18:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: cpu/intel/car/p4: Update microcode in CAR setup
by Kyösti Mälkki (Code Review) 12 Jan '19

12 Jan '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30777 ) Change subject: cpu/intel/car/p4: Update microcode in CAR setup ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30777 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I87d34cf38dbd700ecb04d87c5b4767910e4a922c Gerrit-Change-Number: 30777 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Jan 2019 11:07:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: [WIP] add i945G based mainboard
by HAOUAS Elyes (Code Review) 12 Jan '19

12 Jan '19

Hello Kyösti Mälkki, Arthur Heymans, Idwer Vollering, Paul Menzel, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25509 to look at the new patch set (#24). Change subject: [WIP] add i945G based mainboard ...................................................................... [WIP] add i945G based mainboard 82945GC - 82801Gx - W83627EHG CPU: CPUID 0f65.Mmicrocode loaded correctly. DDR2: Supports Up to 4 DIMM. S3: working properly. Issues: 1) It will not boot when using RAM 533MHz. I believe that there is a problem with time/clock or something related to clock when RAM 533 is used. 2) It will not boot if channel 0 is not populated at all. 3) Device 0:1e.2 and 0:1e.3 needs some fix. On dmsg, I'm getting plenty of "0000:00:1e.2: codec_read 0: semaphore is not ready for register.. 0000:00:1e.2: codec_write 0: semaphore is not ready for register .." Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- A src/mainboard/nec/945g-m4/Kconfig A src/mainboard/nec/945g-m4/Kconfig.name A src/mainboard/nec/945g-m4/Makefile.inc A src/mainboard/nec/945g-m4/acpi/ec.asl A src/mainboard/nec/945g-m4/acpi/ich7_pci_irqs.asl A src/mainboard/nec/945g-m4/acpi/mainboard.asl A src/mainboard/nec/945g-m4/acpi/platform.asl A src/mainboard/nec/945g-m4/acpi/superio.asl A src/mainboard/nec/945g-m4/acpi/thermal.asl A src/mainboard/nec/945g-m4/acpi/video.asl A src/mainboard/nec/945g-m4/acpi_tables.c A src/mainboard/nec/945g-m4/board_info.txt A src/mainboard/nec/945g-m4/cmos.default A src/mainboard/nec/945g-m4/cmos.layout A src/mainboard/nec/945g-m4/cstates.c A src/mainboard/nec/945g-m4/devicetree.cb A src/mainboard/nec/945g-m4/dsdt.asl A src/mainboard/nec/945g-m4/gpio.c A src/mainboard/nec/945g-m4/hda_verb.c A src/mainboard/nec/945g-m4/mainboard.c A src/mainboard/nec/945g-m4/romstage.c A src/mainboard/nec/945g-m4/superio_hwm.c A src/mainboard/nec/945g-m4/superio_hwm.h A src/mainboard/nec/Kconfig A src/mainboard/nec/Kconfig.name M src/northbridge/intel/i945/early_init.c 26 files changed, 1,423 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/25509/24 -- To view, visit https://review.coreboot.org/c/coreboot/+/25509 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5398b990c26d087afb20e4b1028a7a1cad4b3ee3 Gerrit-Change-Number: 25509 Gerrit-PatchSet: 24 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: cpu/intel/model_f6x: Add model F6x for i945 parallel MP init
by HAOUAS Elyes (Code Review) 12 Jan '19

12 Jan '19

Hello Patrick Rudolph, Angel Pons, Arthur Heymans, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/27558 to look at the new patch set (#13). Change subject: cpu/intel/model_f6x: Add model F6x for i945 parallel MP init ...................................................................... cpu/intel/model_f6x: Add model F6x for i945 parallel MP init Netburst CPUID F65 + 945G-M4 board boots fine. Change-Id: I62eedf2e6f1fd79fa3bf4e173e5317a7c775cdef Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/model_f6x/Makefile.inc M src/cpu/intel/model_f6x/model_f6x_init.c 2 files changed, 1 insertion(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/27558/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/27558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62eedf2e6f1fd79fa3bf4e173e5317a7c775cdef Gerrit-Change-Number: 27558 Gerrit-PatchSet: 13 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: cpu/intel/model_f6x: Add model F6x for i945 parallel MP init
by HAOUAS Elyes (Code Review) 12 Jan '19

12 Jan '19

Hello Patrick Rudolph, Angel Pons, Arthur Heymans, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/27558 to look at the new patch set (#12). Change subject: cpu/intel/model_f6x: Add model F6x for i945 parallel MP init ...................................................................... cpu/intel/model_f6x: Add model F6x for i945 parallel MP init Netburst CPUID F65 + 945G-M4 board boots fine. Change-Id: I62eedf2e6f1fd79fa3bf4e173e5317a7c775cdef Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/model_f6x/Makefile.inc M src/cpu/intel/model_f6x/model_f6x_init.c 2 files changed, 1 insertion(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/27558/12 -- To view, visit https://review.coreboot.org/c/coreboot/+/27558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62eedf2e6f1fd79fa3bf4e173e5317a7c775cdef Gerrit-Change-Number: 27558 Gerrit-PatchSet: 12 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: nb/intel/i945: Use parallel MP init
by HAOUAS Elyes (Code Review) 12 Jan '19

12 Jan '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25600 ) Change subject: nb/intel/i945: Use parallel MP init ...................................................................... Patch Set 37: (4 comments) https://review.coreboot.org/#/c/25600/37/src/cpu/intel/model_f3x/model_f3x_… File src/cpu/intel/model_f3x/model_f3x_init.c: https://review.coreboot.org/#/c/25600/37/src/cpu/intel/model_f3x/model_f3x_… PS37, Line 16: #include <cpu/x86/mtrr.h> to remove ? https://review.coreboot.org/#/c/25600/37/src/cpu/intel/model_f3x/model_f3x_… PS37, Line 18: #include <cpu/intel/microcode.h> : #include <cpu/intel/hyperthreading.h> maybe to remove https://review.coreboot.org/#/c/25600/37/src/cpu/intel/model_f3x/model_f3x_… PS37, Line 27: if (!IS_ENABLED(CONFIG_PARALLEL_MP) && !intel_ht_sibling()) { : /* MTRRs are shared between threads */ : x86_setup_mtrrs(); : x86_mtrr_check(); : : /* Update the microcode */ : intel_update_microcode_from_cbfs(); : } maybe to remove ? https://review.coreboot.org/#/c/25600/37/src/cpu/intel/model_f3x/model_f3x_… PS37, Line 39: /* Start up my CPU siblings */ : if (!IS_ENABLED(CONFIG_PARALLEL_MP)) : intel_sibling_init(cpu); this one also to remove? -- To view, visit https://review.coreboot.org/c/coreboot/+/25600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I955551b99e9cbc397f99c2a6bd355c6070390bcb Gerrit-Change-Number: 25600 Gerrit-PatchSet: 37 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Jan 2019 08:57:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: cpu/intel/model_f6x: Add model F6x for i945 parallel MP init
by HAOUAS Elyes (Code Review) 12 Jan '19

12 Jan '19

Hello Angel Pons, Arthur Heymans, Paul Menzel, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/27558 to look at the new patch set (#11). Change subject: cpu/intel/model_f6x: Add model F6x for i945 parallel MP init ...................................................................... cpu/intel/model_f6x: Add model F6x for i945 parallel MP init Netburst CPUID F65 + 945G-M4 board boots fine. Change-Id: I62eedf2e6f1fd79fa3bf4e173e5317a7c775cdef Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/intel/model_f6x/Makefile.inc M src/cpu/intel/model_f6x/model_f6x_init.c 2 files changed, 1 insertion(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/27558/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/27558 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I62eedf2e6f1fd79fa3bf4e173e5317a7c775cdef Gerrit-Change-Number: 27558 Gerrit-PatchSet: 11 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit January 2019