coreboot-gerrit September 2018

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Change in coreboot[master]: fsp_broadwell_de: Move DMAR table generation to corresponding VT-d de...
by Philipp Deppenwiese (Code Review) 20 Sep '18

20 Sep '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/28671 ) Change subject: fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/28671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I103257c73f5e745e996a441a2535b885270bc204 Gerrit-Change-Number: 28671 Gerrit-PatchSet: 4 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 12:38:00 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: sb/intel/bd82x6x: Don't use device_t
by build bot (Jenkins) (Code Review) 20 Sep '18

20 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28657 ) Change subject: sb/intel/bd82x6x: Don't use device_t ...................................................................... Patch Set 7: (4 comments) https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me.c File src/southbridge/intel/bd82x6x/me.c: https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me.c@… PS7, Line 739: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me.c@… PS7, Line 739: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me_8.… File src/southbridge/intel/bd82x6x/me_8.x.c: https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me_8.… PS7, Line 742: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me_8.… PS7, Line 742: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' -- To view, visit https://review.coreboot.org/28657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4909ebffc978f537bbf6269d9e27dbaca43daa10 Gerrit-Change-Number: 28657 Gerrit-PatchSet: 7 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 11:25:52 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: sb/intel/bd82x6x: Don't use device_t
by Elyes HAOUAS (Code Review) 20 Sep '18

20 Sep '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28657 to look at the new patch set (#7). Change subject: sb/intel/bd82x6x: Don't use device_t ...................................................................... sb/intel/bd82x6x: Don't use device_t Use of device_t is deprecated. Change-Id: I4909ebffc978f537bbf6269d9e27dbaca43daa10 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c M src/southbridge/intel/bd82x6x/pch.c M src/southbridge/intel/bd82x6x/pch.h 4 files changed, 20 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/28657/7 -- To view, visit https://review.coreboot.org/28657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I4909ebffc978f537bbf6269d9e27dbaca43daa10 Gerrit-Change-Number: 28657 Gerrit-PatchSet: 7 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: drivers/spi/winbond: Add function to lock flash's status register
by Patrick Rudolph (Code Review) 20 Sep '18

20 Sep '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/28697 ) Change subject: drivers/spi/winbond: Add function to lock flash's status register ...................................................................... Patch Set 1: Tested on Winbond W25Q128. Status register lock bits can be written multiple times until this method is called. All following calls will fail, as the status register bits won't change any more. -- To view, visit https://review.coreboot.org/28697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I90e0fcdcf531b53c0fc1ffcfdb3b5ab522f088f5 Gerrit-Change-Number: 28697 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 11:19:19 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: drivers/spi: Winbond specific write-protection enable
by build bot (Jenkins) (Code Review) 20 Sep '18

20 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25105 ) Change subject: drivers/spi: Winbond specific write-protection enable ...................................................................... Patch Set 18: (7 comments) https://review.coreboot.org/#/c/25105/18/src/drivers/spi/winbond.c File src/drivers/spi/winbond.c: https://review.coreboot.org/#/c/25105/18/src/drivers/spi/winbond.c@33 PS18, Line 33: #define CMD_VOLATILE_SREG_WREN 0x50 /* Write Enable for Volatile Status Register */ line over 80 characters https://review.coreboot.org/#/c/25105/18/src/drivers/spi/winbond.c@494 PS18, Line 494: val = (union status_reg1_bp3){ .bp = bp, .tb = tb, .sec = 0 }.u; space required after that close brace '}' https://review.coreboot.org/#/c/25105/18/src/drivers/spi/winbond.c@495 PS18, Line 495: mask = (union status_reg1_bp3){ .bp = ~0, .tb = 1, .sec = 1 }.u; space required after that close brace '}' https://review.coreboot.org/#/c/25105/18/src/drivers/spi/winbond.c@497 PS18, Line 497: val = (union status_reg1_bp4){ .bp = bp, .tb = tb }.u; space required after that close brace '}' https://review.coreboot.org/#/c/25105/18/src/drivers/spi/winbond.c@498 PS18, Line 498: mask = (union status_reg1_bp4){ .bp = ~0, .tb = 1 }.u; space required after that close brace '}' https://review.coreboot.org/#/c/25105/18/src/drivers/spi/winbond.c@505 PS18, Line 505: val = (union status_reg2){ .cmp = cmp }.u; space required after that close brace '}' https://review.coreboot.org/#/c/25105/18/src/drivers/spi/winbond.c@506 PS18, Line 506: mask = (union status_reg2){ .cmp = 1 }.u; space required after that close brace '}' -- To view, visit https://review.coreboot.org/25105 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie3765b013855538eca37bc7800d3f9d5d09b8402 Gerrit-Change-Number: 25105 Gerrit-PatchSet: 18 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 11:14:38 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: drivers/spi/winbond: Add function to lock flash's status register
by build bot (Jenkins) (Code Review) 20 Sep '18

20 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28697 ) Change subject: drivers/spi/winbond: Add function to lock flash's status register ...................................................................... Patch Set 1: (6 comments) https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c File src/drivers/spi/winbond.c: https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@552 PS1, Line 552: val = (union status_reg1_bp3){ .srp0 = !!(mode & 1) }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@553 PS1, Line 553: mask = (union status_reg1_bp3){ .srp0 = 1 }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@555 PS1, Line 555: val = (union status_reg1_bp4){ .srp0 = !!(mode & 1) }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@556 PS1, Line 556: mask = (union status_reg1_bp4){ .srp0 = 1 }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@563 PS1, Line 563: val = (union status_reg2){ .srp1 = !!(mode & 2) }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@564 PS1, Line 564: mask = (union status_reg2){ .srp1 = 1 }.u; space required after that close brace '}' -- To view, visit https://review.coreboot.org/28697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I90e0fcdcf531b53c0fc1ffcfdb3b5ab522f088f5 Gerrit-Change-Number: 28697 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 11:13:59 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: drivers/spi/winbond: Add function to lock flash's status register
by Patrick Rudolph (Code Review) 20 Sep '18

20 Sep '18

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/28697 Change subject: drivers/spi/winbond: Add function to lock flash's status register ...................................................................... drivers/spi/winbond: Add function to lock flash's status register Add a new function pointer to lock down the status register. Allows to enable various write-protection schemes. Change-Id: I90e0fcdcf531b53c0fc1ffcfdb3b5ab522f088f5 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/spi/spi_flash.c M src/drivers/spi/winbond.c M src/include/spi_flash.h 3 files changed, 107 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/28697/1 diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index 9127a5d..577ce4b 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -432,6 +432,27 @@ return -1; } +int spi_flash_enable_write_protect(const struct spi_flash *flash, + const enum spi_flash_status_reg_lockdown mode, + const bool non_volatile) +{ + int ret; + + if (!flash) + return -1; + + if (!flash->ops->enable_write_protect) { + printk(BIOS_WARNING, "SPI: Enabling write-protection is not " + "implemented for this vendor.\n"); + return 0; + } + + ret = flash->ops->enable_write_protect(flash, mode, non_volatile); + if (ret != 0) + printk(BIOS_ERR, "SPI: Failed to enable write-protection\n"); + return ret; +} + int spi_flash_is_write_protected(const struct spi_flash *flash, const struct region *region) { diff --git a/src/drivers/spi/winbond.c b/src/drivers/spi/winbond.c index 0272d5a..7b751f7 100644 --- a/src/drivers/spi/winbond.c +++ b/src/drivers/spi/winbond.c @@ -515,6 +515,63 @@ return ret; } +/* + * Available on all devices. + * Protect a region starting from start of flash or end of flash. + * The caller must provide a valid protected region size. + * SEC isn't supported and set to zero. + * Write block protect bits to Status/Status2 Reg and leave status register + * unlocked. + * + * @param flash The handle to flash working on + * @param region The region to write protect + * @param non_volatile Write status register non-volatile + * + * Returns: + * -1 on error + * 0 on success + */ + +static int +winbond_enable_write_protect(const struct spi_flash *flash, + const enum spi_flash_status_reg_lockdown mode, + const bool non_volatile) +{ + const struct winbond_spi_flash_params *params; + u8 mask, val; + int ret; + + params = (const struct winbond_spi_flash_params *)flash->driver_private; + if (!params) + return -1; + + if (mode > SPI_WRITE_PROTECTION_PERMANENT) + return -1; + + if (params->bp_bits == 3) { + val = (union status_reg1_bp3){ .srp0 = !!(mode & 1) }.u; + mask = (union status_reg1_bp3){ .srp0 = 1 }.u; + } else { + val = (union status_reg1_bp4){ .srp0 = !!(mode & 1) }.u; + mask = (union status_reg1_bp4){ .srp0 = 1 }.u; + } + + ret = winbond_flash_cmd_status(flash, 0, mask, val, non_volatile); + if (ret) + return ret; + + val = (union status_reg2){ .srp1 = !!(mode & 2) }.u; + mask = (union status_reg2){ .srp1 = 1 }.u; + + ret = winbond_flash_cmd_status(flash, 1, mask, val, non_volatile); + if (ret) + return ret; + + printk(BIOS_DEBUG, "WINBOND: locked flash status register, mode %u\n", + mode); + return 0; +} + static const struct spi_flash_ops spi_flash_ops = { .write = winbond_write, .erase = spi_flash_cmd_erase, @@ -526,6 +583,7 @@ #endif .get_write_protection = winbond_get_write_protection, .set_write_protection = winbond_set_write_protection, + .enable_write_protect = winbond_enable_write_protect, }; int spi_flash_probe_winbond(const struct spi_slave *spi, u8 *idcode, diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h index 3f0c0fa..55c7992 100644 --- a/src/include/spi_flash.h +++ b/src/include/spi_flash.h @@ -26,6 +26,13 @@ struct spi_flash; +enum spi_flash_status_reg_lockdown { + SPI_WRITE_PROTECTION_NONE = 0, + SPI_WRITE_PROTECTION_PIN, + SPI_WRITE_PROTECTION_REBOOT, + SPI_WRITE_PROTECTION_PERMANENT +}; + /* * Representation of SPI flash operations: * read: Flash read operation. @@ -63,6 +70,10 @@ int (*set_write_protection)(const struct spi_flash *flash, const struct region *region, const bool non_volatile); + + int (*enable_write_protect)(const struct spi_flash *flash, + const enum spi_flash_status_reg_lockdown mode, + const bool non_volatile); }; struct spi_flash { @@ -119,6 +130,23 @@ int spi_flash_status(const struct spi_flash *flash, u8 *reg); /* + * Lock down the the vendor dependent SPI flash status register. + * Call this after setting the flash write protection bits. + * + * @param flash : A SPI flash device + * @param mode: The lockdown-mode to apply + * @param non_volatile: Write status register non-volatile + * + * Returns: + * -1 on error + * 0 on success + */ + +int spi_flash_enable_write_protect(const struct spi_flash *flash, + const enum spi_flash_status_reg_lockdown mode, + const bool non_volatile); + +/* * Return the vendor dependent SPI flash write protection state. * @param flash : A SPI flash device * @param region: A subregion of the device's region -- To view, visit https://review.coreboot.org/28697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I90e0fcdcf531b53c0fc1ffcfdb3b5ab522f088f5 Gerrit-Change-Number: 28697 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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Change in coreboot[master]: sb/intel/bd82x6x: Don't use device_t
by build bot (Jenkins) (Code Review) 20 Sep '18

20 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28657 ) Change subject: sb/intel/bd82x6x: Don't use device_t ...................................................................... Patch Set 6: (4 comments) https://review.coreboot.org/#/c/28657/6/src/southbridge/intel/bd82x6x/me.c File src/southbridge/intel/bd82x6x/me.c: https://review.coreboot.org/#/c/28657/6/src/southbridge/intel/bd82x6x/me.c@… PS6, Line 739: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/6/src/southbridge/intel/bd82x6x/me.c@… PS6, Line 739: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/6/src/southbridge/intel/bd82x6x/me_8.… File src/southbridge/intel/bd82x6x/me_8.x.c: https://review.coreboot.org/#/c/28657/6/src/southbridge/intel/bd82x6x/me_8.… PS6, Line 742: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/6/src/southbridge/intel/bd82x6x/me_8.… PS6, Line 742: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' -- To view, visit https://review.coreboot.org/28657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4909ebffc978f537bbf6269d9e27dbaca43daa10 Gerrit-Change-Number: 28657 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 11:13:05 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: sb/intel/bd82x6x: Don't use device_t
by Elyes HAOUAS (Code Review) 20 Sep '18

20 Sep '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28657 to look at the new patch set (#6). Change subject: sb/intel/bd82x6x: Don't use device_t ...................................................................... sb/intel/bd82x6x: Don't use device_t Use of device_t is deprecated. Change-Id: I4909ebffc978f537bbf6269d9e27dbaca43daa10 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c M src/southbridge/intel/bd82x6x/pch.c M src/southbridge/intel/bd82x6x/pch.h 4 files changed, 20 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/28657/6 -- To view, visit https://review.coreboot.org/28657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I4909ebffc978f537bbf6269d9e27dbaca43daa10 Gerrit-Change-Number: 28657 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/skylake: Make usage of SMI optional where possible
by build bot (Jenkins) (Code Review) 20 Sep '18

20 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28696 ) Change subject: soc/intel/skylake: Make usage of SMI optional where possible ...................................................................... Patch Set 1: (2 comments) https://review.coreboot.org/#/c/28696/1/src/ec/google/chromeec/ec.c File src/ec/google/chromeec/ec.c: https://review.coreboot.org/#/c/28696/1/src/ec/google/chromeec/ec.c@491 PS1, Line 491: * stage and ACPI_DISABLE calls can explicitely disable it 'explicitely' may be misspelled - perhaps 'explicitly'? https://review.coreboot.org/#/c/28696/1/src/soc/intel/skylake/finalize.c File src/soc/intel/skylake/finalize.c: https://review.coreboot.org/#/c/28696/1/src/soc/intel/skylake/finalize.c@147 PS1, Line 147: if (!IS_ENABLED(CONFIG_REDUCED_SMI)){ space required before the open brace '{' -- To view, visit https://review.coreboot.org/28696 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3f0c64b15ed6d0854ff350fcd75d299e45c23f18 Gerrit-Change-Number: 28696 Gerrit-PatchSet: 1 Gerrit-Owner: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 09:49:31 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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coreboot-gerrit September 2018