coreboot-gerrit September 2018

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Change in coreboot[master]: include/device/pnp.h: Don't use device_t
by Jonathan Neuschäfer (Code Review) 20 Sep '18

20 Sep '18

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/28676 ) Change subject: include/device/pnp.h: Don't use device_t ...................................................................... Patch Set 3: Code-Review+2 Looks good to me -- To view, visit https://review.coreboot.org/28676 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9364c9681dd89f09480368a997f6d1f04cde1488 Gerrit-Change-Number: 28676 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 14:03:12 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: arch/riscv/include/arch: Don't use device_t
by Jonathan Neuschäfer (Code Review) 20 Sep '18

20 Sep '18

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/28691 ) Change subject: arch/riscv/include/arch: Don't use device_t ...................................................................... Patch Set 2: Code-Review+2 Thanks -- To view, visit https://review.coreboot.org/28691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If52de0d87b02419090b29a7cf1952905d3f975f6 Gerrit-Change-Number: 28691 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 13:33:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/solidrun/solidpc: Do initial commit
by build bot (Jenkins) (Code Review) 20 Sep '18

20 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/23027 ) Change subject: mb/solidrun/solidpc: Do initial commit ...................................................................... Patch Set 7: (262 comments) https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… File src/mainboard/solidrun/solidpc/gpio.c: https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 67: /*SE00 */ { .pad_conf0 = 0x00110380, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 69: /*SE02 */ { .pad_conf0 = 0x00110380, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 70: /*SE03 */ { .pad_conf0 = 0x00130300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 71: /*SE04 */ { .pad_conf0 = 0x00110380, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 73: /*SE06 */ { .pad_conf0 = 0x00130300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 74: /*SE07 */ { .pad_conf0 = 0x00110380, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 99: /*SE16 */ { .pad_conf0 = 0x00110380, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 100: /*SE17 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 103: /*SE20 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 106: /*SE23 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 107: /*SE24 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 109: /*SE26 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 124: /*SE30 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 125: /*SE31 */ { .pad_conf0 = 0x00110380, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 126: /*SE32 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 127: /*SE33 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 128: /*SE34 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 129: /*SE35 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 148: /*SE45 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 149: /*SE46 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 150: /*SE47 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 151: /*SE48 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 153: /*SE50 */ { .pad_conf0 = 0x00918102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 154: /*SE51 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 155: /*SE52 */ { .pad_conf0 = 0x00918102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 165: // GPI(trig_edge_low, L5, P_20K_H, non_maskable, en_rx_data, UNMASK_WAKE , NA), /* 60 SPI1_MISO */ /* PMIC_IRQ_1P8 */ /* Open drain? */ /* FIXME: InvRX_Enable - is this connected to the PMIC? */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 171: // GPIO_OUT_HIGH, /* 66 SPI1_CS1_B */ /* LAN P0 ISOLATE */ /* FIXME: check if this pin is actually used as P0 Isolate */ //FIXME: Find P1 isolate line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 176: /*SE60 */ { .pad_conf0 = 0x58918200, .pad_conf1 = 0x05C00019, .wake_mask = 1, .int_mask = 1, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 177: /*SE61 */ { .pad_conf0 = 0x00918102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 178: /*SE62 */ { .pad_conf0 = 0x4C918201, .pad_conf1 = 0x05C00001, .wake_mask = 0, .int_mask = 1, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 179: /*SE63 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 180: /*SE64 */ { .pad_conf0 = 0x00918102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 181: /*SE65 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 182: /*SE66 */ { .pad_conf0 = 0x00918102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 183: /*SE67 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 184: /*SE68 */ { .pad_conf0 = 0x00910381, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 196: // Native_M1, /* 75 USB_OC1_B */ /* USB_OC1_B */ /* FIXME: pulls? */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 197: // Native_M1, /* 76 PMU_RESETBUTTON_B */ /* PMU_RESETBUTTON_B */ /* FIXME: pulls? */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 199: // Native_M1, /* 78 SDMMC3_PWR_EN_B */ /* SD_CARD_PWRDN_N */ /* FIXME: pulls? */ //FIXME: Connected? line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 201: // Native_M1, /* 80 USB_OC0_B */ /* USB_OC0_B */ /* FIXME: pulls? */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 202: // NATIVE_INT_PU20K(1, L1), /* 81 SDMMC3_CD_B */ /* SD_CARD_DET_N */ /* FIXME: Native M1, no pull, trig_level, invert */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 205: // Native_M1, /* 84 SDMMC1_RCLK */ /* SDMMC1_RCLK */ /* FIXME: no SPARE_PIN!? check if NC */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 206: // Native_M1, /* 85 SDMMC3_1P8_EN */ /* SD_CARD_PWR_EN */ /* FIXME: check if NC */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 208: /*SE75 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 209: /*SE76 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 210: /*SE77 */ { .pad_conf0 = 0x14918201, .pad_conf1 = 0x05C00001, .wake_mask = 1, .int_mask = 1, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 211: /*SE78 */ { .pad_conf0 = 0x00110301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 212: /*SE79 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 213: /*SE80 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 214: /*SE81 */ { .pad_conf0 = 0x10910300, .pad_conf1 = 0x05C00004, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 216: /*SE83 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 217: /*SE84 */ { .pad_conf0 = 0x00110380, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 218: /*SE85 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 238: // Native_M1, /* 06 FST_SPI_CS0_B */ /* SPI_CS (SPI NOR on SOM) */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 241: /*SW00 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 242: /*SW01 */ { .pad_conf0 = 0x00910300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 243: /*SW02 */ { .pad_conf0 = 0x00910300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 244: /*SW03 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 245: /*SW04 */ { .pad_conf0 = 0x00918102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 246: /*SW05 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 247: /*SW06 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 248: /*SW07 */ { .pad_conf0 = 0x00218100, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 258: // Native_M2, /* 16 UART1_RXD */ /* UART1_RXD */ //NOTE: set to UART0 for debugging line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 262: // Native_M2, /* 20 UART1_TXD */ /* UART1_TXD */ //NOTE: set to UART0 for debugging line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 266: /*SW15 */ GPIO_SKIP, //{ .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 267: /*SW16 */ GPIO_SKIP, //{ .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 268: /*SW17 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 270: /*SW19 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 272: /*SW21 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 273: /*SW22 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 282: // Native_M2, /* 30 MF_HDA_CLK */ /* MF_HDA_CLK II GP_SSP_0_I2S_TXD */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 283: // Native_M2, /* 31 GPIO_SW31/MF_HDA_RSTB */ /* AUD_LINK_RST_N || I2S_0_CLK_R_AICO (AIC) */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 284: // Native_M2, /* 32 GPIO_SW32 /MF_HDA_SDI0 */ /* AUD_LINK_SDI0 (ALC282) || I2S_2_CLK_R_AICO (AIC) */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 285: // Native_M2, /* 33 MF_HDA_SDO */ /* AUD_LINK_SDO_R||I2S_0_RXD_R_AICO (AIC) */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 286: // GPIO_NC, /* 34 MF_HDA_DOCKRSTB */ /* I2S_2_TXD_R_AICO (AIC) */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 287: // Native_M2, /* 35 MF_HDA_SYNC */ /* AUD_LINKSYNC_R|| I2S_0_FS_R_AICO (AIC) */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 288: // GPIO_NC, /* 36 GPIO_SW36 MF_HDA_SDI1 */ /* I2S_2_FS_R_AICO */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 289: // GPIO_NC, /* 37 MF_HDA_DOCKENB */ /* I2S_2_RXD_R_AICO(AIC) */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 291: /*SW30 */ { .pad_conf0 = 0x00120300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 292: /*SW31 */ { .pad_conf0 = 0x00120300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 293: /*SW32 */ { .pad_conf0 = 0x00120300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 294: /*SW33 */ { .pad_conf0 = 0x00120300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 295: /*SW34 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 296: /*SW35 */ { .pad_conf0 = 0x00120300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 297: /*SW36 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 298: /*SW37 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 306: // GPIO_NC, /* 45 I2C5_SDA */ /* Touch Panel */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 307: // NATIVE_PU1K_CSEN_INVTX(1), /* 46 I2C4_SDA */ /* I2C Audio | Touch PAD */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 309: // GPIO_NC, /* 48 I2C5_SCL */ /* Touch Panel */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 311: // NATIVE_PU1K_CSEN_INVTX(1), /* 50 I2C4_SCL */ /* I2C Audio | Touch PAD */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 315: /*SW45 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 316: /*SW46 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 317: /*SW47 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 318: /*SW48 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 320: /*SW50 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 321: /*SW51 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 331: // GPIO_NC, /* 61 I2C0_SDA */ /* 3rd party Sensor Card */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 332: // GPIO_NC, /* 62 I2C2_SDA */ /* MIPI_CSI CAMERAS, FLASH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 334: // GPIO_NC, /* 64 I2C3_SDA */ /* MIPI_CSI CAMERAS, FLASH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 335: // GPIO_NC, /* 65 I2C0_SCL */ /* 3rd party Sensor Card */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 336: // GPIO_NC, /* 66 I2C2_SCL */ /* MIPI_CSI CAMERAS, FLASH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 337: // GPIO_NC, /* 67 I2C3_SCL */ /* MIPI_CSI CAMERAS, FLASH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 339: /*SW60 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 340: /*SW61 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 341: /*SW62 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 342: /*SW63 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 343: /*SW64 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 344: /*SW65 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 345: /*SW66 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 346: /*SW67 */ { .pad_conf0 = 0x00C10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 355: // GPIO_NC, /* 75 SATA_GP0 */ /* TOUCH_PNL_RST_N */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 356: // GPIO_NC, /* 76 SATA_GP1 */ /* TOUCH_INT_N */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 357: // Native_M1, /* 77 SATA_LEDN */ /* SATA_LED_N */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 358: // Native_M1, /* 78 SATA_GP2 */ /* SATA_DEVSLP_R */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 359: // GPIO_NC, /* 79 MF_SMB_ALERTB */ /* MF_SMB_ALERTB */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 360: // Native_M1, /* 80 SATA_GP3 */ /* eMMC_RST_N */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 361: // GPIO_NC, /* 81 NFC_DEV_WAKE , MF_SMB_CLK */ /* MF_SMB_CLK */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 362: // GPIO_NC, /* 82 NFC_FW_DOWNLOAD, MF_SMB_DATA */ /* MF_SMB_DATA */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 364: /*SW75 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 365: /*SW76 */ { .pad_conf0 = 0x0CC18200, .pad_conf1 = 0x05C00011, .wake_mask = 0, .int_mask = 1, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 366: /*SW77 */ { .pad_conf0 = 0x00110301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 367: /*SW78 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 369: /*SW80 */ { .pad_conf0 = 0x00110002, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 385: // Native_M1, /* 95 PCIE_CLKREQ3B */ /* Tied to Micro SD */ //FIXME: What does this pin do? Is it even a CLKREQ? line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 389: /*SW90 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 390: /*SW91 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 392: /*SW93 */ { .pad_conf0 = 0x00910300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 394: /*SW95 */ { .pad_conf0 = 0x00910300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 412: // GPIO_OUT_HIGH, /* 00 GPIO_DFX0 */ /* LAN P0 RESET */ //FIXME: Is this a reset? line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 422: /*N00 */ { .pad_conf0 = 0x00118102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 423: /*N01 */ { .pad_conf0 = 0x2C018200, .pad_conf1 = 0x05C00021, .wake_mask = 0, .int_mask = 1, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 425: /*N03 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 426: /*N04 */ { .pad_conf0 = 0x00918102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 427: /*N05 */ { .pad_conf0 = 0x00118102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 428: /*N06 */ { .pad_conf0 = 0x00918203, .pad_conf1 = 0x00918001, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 429: /*N07 */ { .pad_conf0 = 0x00918202, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 430: /*N08 */ { .pad_conf0 = 0x00918203, .pad_conf1 = 0x00918001, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 444: // GPI(trig_edge_low, L1, P_1K_H, non_maskable, NA, UNMASK_WAKE, NA), /* 18 GPIO_SUS7 */ /* GPIO_SUS7 */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 445: // Native_M6, /* 19 GPIO_SUS1 */ /* GPIO_SUS1 */ //NOTE: configured as PCI_WAKE1_N, but is just a pin on the headers line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 446: // Native_M1, /* 20 GPIO_SUS5 */ /* GPIO_SUS5 */ //FIXME: What's the native mode of this pin? docs only say strapping pin for Flash Descriptor Security Override line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 448: // Native_M6, /* 22 GPIO_SUS4 */ /* */ //NOTE: configured as PCI_WAKE4_N //FIXME: What's on this pin? line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 450: // Native_M6, /* 24 GPIO_SUS2 */ /* GPIO_SUS2 */ //NOTE: configured as PCI_WAKE2_N, but is just a pin on the headers line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 456: /*N15 */ { .pad_conf0 = 0x3C018200, .pad_conf1 = 0x05C00001, .wake_mask = 1, .int_mask = 1, .gpe = SCI }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 458: /*N17 */ { .pad_conf0 = 0x4C118200, .pad_conf1 = 0x05C00001, .wake_mask = 0, .int_mask = 1, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 459: /*N18 */ { .pad_conf0 = 0xFC918200, .pad_conf1 = 0x05C00001, .wake_mask = 0, .int_mask = 1, .gpe = SMI }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 460: /*N19 */ { .pad_conf0 = 0x00160301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 461: /*N20 */ { .pad_conf0 = 0x00910201, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 463: /*N22 */ { .pad_conf0 = 0x00960301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 465: /*N24 */ { .pad_conf0 = 0x00918102, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 466: /*N25 */ { .pad_conf0 = 0xEC918201, .pad_conf1 = 0x05C00001, .wake_mask = 0, .int_mask = 1, .gpe = SCI }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 493: /*N30 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 494: /*N31 */ { .pad_conf0 = 0x00210300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 495: /*N32 */ { .pad_conf0 = 0x00010301, .pad_conf1 = 0x05C00060, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 497: /*N34 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 498: /*N35 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 499: /*N36 */ { .pad_conf0 = 0x00010300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 500: /*N37 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 502: /*N39 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 504: /*N41 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 529: /*N45 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 530: /*N46 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 531: /*N47 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 532: /*N48 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 533: /*N49 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 534: /*N50 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 535: /*N51 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 536: /*N52 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 537: /*N53 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 538: /*N54 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 539: /*N55 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 540: /*N56 */ { .pad_conf0 = 0x00118000, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 555: // Native_M1, /* 62 HV_DDI2_DDC_SDA */ /* DDI2_SDA_1P8 */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 556: // Native_M1, /* 63 PANEL1_BKLTCTL */ /* PANEL1_BKLTCTL */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 559: // Native_M1, /* 66 HV_DDI0_DDC_SDA */ /* DDI0_1_SDA_1P8 */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 560: // Native_M1, /* 67 HV_DDI2_DDC_SCL */ /* DDI2_SCL_1P8 */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 562: // Native_M1, /* 69 PANEL1_VDDEN */ /* PANEL1_VDDEN */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 563: // Native_M1, /* 70 PANEL1_BKLTEN */ /* PANEL1_BKLTEN */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 564: // GPIO_NC, /* 71 HV_DDI0_DDC_SCL */ /* DDI0_1_SCL_1P8 */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 567: /*N60 */ { .pad_conf0 = 0x00010300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 568: /*N61 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 569: /*N62 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x04C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 570: /*N63 */ { .pad_conf0 = 0x00010300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 571: /*N64 */ { .pad_conf0 = 0x00110301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 572: /*N65 */ { .pad_conf0 = 0x00010300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 573: /*N66 */ { .pad_conf0 = 0x00920301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 574: /*N67 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x04C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 575: /*N68 */ { .pad_conf0 = 0x00110301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 576: /*N69 */ { .pad_conf0 = 0x00010300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 577: /*N70 */ { .pad_conf0 = 0x00010300, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 578: /*N71 */ { .pad_conf0 = 0x00920301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 595: // Native_M1, /* 00 PMU_SLP_S3_B */ /* PMU_SLP_S3_N */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 596: // Native_M1, /* 01 PMU_BATLOW_B */ /* PMU_BATLOW_B */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 599: // Native_M1, /* 04 PMU_AC_PRESENT */ /* PMU_AC_PRESENT */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 600: // Native_M1, /* 05 PMU_PLTRST_B */ /* PMU_PLTRST_B */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 601: // Native_M1, /* 06 PMU_SUSCLK */ /* PMU_SUSCLK_1P8 */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 603: // Native_M1, /* 08 PMU_PWRBTN_B */ /* PMU_PWRBTN_N */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 604: // Native_M1, /* 09 PMU_SLP_S4_B */ /* PMU_SLP_S4_N */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 605: // NATIVE_FUNC(M1, P_1K_H, NA), /* 10 PMU_WAKE_B */ /* PMU_WAKE_N */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 606: // GPIO_NC, /* 11 PMU_WAKE_LAN_B */ /* PMU_WAKE_LAN_N */ /* FIXME: Does this connect to onboard RTL8111? */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 608: /*E00 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 609: /*E01 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 610: /*E02 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 611: /*E03 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 612: /*E04 */ { .pad_conf0 = 0x00110301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 613: /*E05 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 614: /*E06 */ { .pad_conf0 = 0x00110301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 616: /*E08 */ { .pad_conf0 = 0X00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 617: /*E09 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 618: /*E10 */ { .pad_conf0 = 0X00C10301, .pad_conf1 = 0x05C00000, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 619: /*E11 */ { .pad_conf0 = 0X2C918201, .pad_conf1 = 0X05C00041, .wake_mask = 1, .int_mask = 1, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 630: // GPIO_NC, /* 15 MF_GPIO_3 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 631: // GPIO_NC, /* 16 MF_GPIO_7 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 632: // GPIO_NC, /* 17 MF_I2C1_SCL */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 633: // GPIO_NC, /* 18 MF_GPIO_1 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 634: // GPIO_NC, /* 19 MF_GPIO_5 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 635: // GPIO_NC, /* 20 MF_GPIO_9 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 636: // GPIO_NC, /* 21 MF_GPIO_0 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 637: // GPIO_NC, /* 22 MF_GPIO_4 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 638: // GPIO_NC, /* 23 MF_GPIO_8 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 639: // GPIO_NC, /* 24 MF_GPIO_2 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 640: // GPIO_NC, /* 25 MF_GPIO_6 */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 641: // GPIO_NC, /* 26 MF_I2C1_SDA */ /* */ /* FIXME: NC? Braswell doesn't have an ISH */ line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 643: /*E15 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 644: /*E16 */ { .pad_conf0 = 0x00118102, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 646: /*E18 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 647: /*E19 */ { .pad_conf0 = 0x00118100, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 648: /*E20 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 649: /*E21 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 650: /*E22 */ { .pad_conf0 = 0x08918201, .pad_conf1 = 0x05C00044, .wake_mask = 0, .int_mask = 1, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 651: /*E23 */ { .pad_conf0 = 0x00910301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 652: /*E24 */ { .pad_conf0 = 0x00A10301, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/gpio… PS7, Line 653: /*E25 */ { .pad_conf0 = 0x00110300, .pad_conf1 = 0x05C00020, .wake_mask = 0, .int_mask = 0, .gpe = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/irqr… File src/mainboard/solidrun/solidpc/irqroute.h: https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/irqr… PS7, Line 21: #define PCI_DEV_PIRQ_ROUTES \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/irqr… PS7, Line 36: #define PIRQ_PIC_ROUTES \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… File src/mainboard/solidrun/solidpc/ramstage.c: https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 25: /* N71:HV_DDI0_DDC_SCL >> 0 2 0 00 0xFED8D458 0x00920301 0xFED8D45C 0x05C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 26: N66:HV_DDI0_DDC_SDA >> 0 2 0 00 0xFED8D430 0x00920301 0xFED8D434 0x05C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 27: N61:HV_DDI0_HPD >> 0 1 0 00 0xFED8D408 0x00110300 0xFED8D40C 0x05C00020 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 28: N64:HV_DDI1_HPD >> 0 1 0 00 0xFED8D420 0x00110301 0xFED8D424 0x05C00020 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 29: N67:HV_DDI2_DDC_SCL >> 0 1 0 00 0xFED8D438 0x00910301 0xFED8D43C 0x04C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 30: N62:HV_DDI2_DDC_SDA >> 0 1 0 00 0xFED8D410 0x00910301 0xFED8D414 0x04C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 31: N68:HV_DDI2_HPD >> 0 1 0 00 0xFED8D440 0x00110301 0xFED8D444 0x05C00020 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 32: N65:PANEL0_BKLTCTL >> 0 1 0 00 0xFED8D428 0x00010300 0xFED8D42C 0x05C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 33: N60:PANEL0_BKLTEN >> 0 1 0 00 0xFED8D400 0x00010300 0xFED8D404 0x05C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 34: N72:PANEL0_VDDEN >> 0 1 0 00 0xFED8D460 0x00010300 0xFED8D464 0x05C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 35: N63:PANEL1_BKLTCTL >> 0 1 0 00 0xFED8D418 0x00010300 0xFED8D41C 0x05C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 36: N70:PANEL1_BKLTEN >> 0 1 0 00 0xFED8D450 0x00010300 0xFED8D454 0x05C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 37: N69:PANEL1_VDDEN >> 0 1 0 00 0xFED8D448 0x00010300 0xFED8D44C 0x05C00000 line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 43: { .Name = NULL /*L"N71:HV_DDI0_DDC_SCL"*/, .Confg0 = 0x00920301, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5458, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 44: { .Name = NULL /*L"N66:HV_DDI0_DDC_SDA"*/, .Confg0 = 0x00920301, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5430, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 45: { .Name = NULL /*L"N61:HV_DDI0_HPD"*/, .Confg0 = 0x00110300, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00020, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5408, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 46: { .Name = NULL /*L"N64:HV_DDI1_HPD"*/, .Confg0 = 0x00110301, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00020, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5420, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 46: { .Name = NULL /*L"N64:HV_DDI1_HPD"*/, .Confg0 = 0x00110301, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00020, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5420, .Misc = 0 }, please, no space before tabs https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 47: { .Name = NULL /*L"N67:HV_DDI2_DDC_SCL"*/, .Confg0 = 0x00910301, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x04C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5438, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 48: { .Name = NULL /*L"N62:HV_DDI2_DDC_SDA"*/, .Confg0 = 0x00910301, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x04C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5410, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 49: { .Name = NULL /*L"N68:HV_DDI2_HPD"*/, .Confg0 = 0x00110301, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00020, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5440, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 50: { .Name = NULL /*L"N65:PANEL0_BKLTCTL"*/, .Confg0 = 0x00010300, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5428, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 51: { .Name = NULL /*L"N60:PANEL0_BKLTEN"*/, .Confg0 = 0x00010300, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5400, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 52: { .Name = NULL /*L"N72:PANEL0_VDDEN"*/, .Confg0 = 0x00010300, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5460, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 53: { .Name = NULL /*L"N63:PANEL1_BKLTCTL"*/, .Confg0 = 0x00010300, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5418, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 54: { .Name = NULL /*L"N70:PANEL1_BKLTEN"*/, .Confg0 = 0x00010300, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5450, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 55: { .Name = NULL /*L"N69:PANEL1_VDDEN"*/, .Confg0 = 0x00010300, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0x05C00000, .Confg1Changes = 0xFFFFFFFF, .Community = NORTH, .MmioAddr = 0x5448, .Misc = 0 }, line over 80 characters https://review.coreboot.org/#/c/23027/7/src/mainboard/solidrun/solidpc/rams… PS7, Line 56: { .Name = NULL /*L""*/, .Confg0 = 0xFFFFFFFF, .Confg0Changes = 0xFFFFFFFF, .Confg1 = 0xFFFFFFFF, .Confg1Changes = 0xFFFFFFFF, .Community = 0xFFFFFFFF, .MmioAddr = 0xFFFFFFFF, .Misc = 0xFFFFFFFF }, line over 80 characters -- To view, visit https://review.coreboot.org/23027 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I00ff95313d74091e7411f6c8658d0d560a0e682b Gerrit-Change-Number: 23027 Gerrit-PatchSet: 7 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Thu, 20 Sep 2018 13:33:02 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: drivers/spi/winbond: Add function to lock flash's status register
by build bot (Jenkins) (Code Review) 20 Sep '18

20 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28697 ) Change subject: drivers/spi/winbond: Add function to lock flash's status register ...................................................................... Patch Set 1: (6 comments) https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c File src/drivers/spi/winbond.c: https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@552 PS1, Line 552: val = (union status_reg1_bp3){ .srp0 = !!(mode & 1) }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@553 PS1, Line 553: mask = (union status_reg1_bp3){ .srp0 = 1 }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@555 PS1, Line 555: val = (union status_reg1_bp4){ .srp0 = !!(mode & 1) }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@556 PS1, Line 556: mask = (union status_reg1_bp4){ .srp0 = 1 }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@563 PS1, Line 563: val = (union status_reg2){ .srp1 = !!(mode & 2) }.u; space required after that close brace '}' https://review.coreboot.org/#/c/28697/1/src/drivers/spi/winbond.c@564 PS1, Line 564: mask = (union status_reg2){ .srp1 = 1 }.u; space required after that close brace '}' -- To view, visit https://review.coreboot.org/28697 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I90e0fcdcf531b53c0fc1ffcfdb3b5ab522f088f5 Gerrit-Change-Number: 28697 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 13:31:56 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: sb/intel/bd82x6x: Don't use device_t
by build bot (Jenkins) (Code Review) 20 Sep '18

20 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28657 ) Change subject: sb/intel/bd82x6x: Don't use device_t ...................................................................... Patch Set 7: (4 comments) https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me.c File src/southbridge/intel/bd82x6x/me.c: https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me.c@… PS7, Line 739: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me.c@… PS7, Line 739: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me_8.… File src/southbridge/intel/bd82x6x/me_8.x.c: https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me_8.… PS7, Line 742: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' https://review.coreboot.org/#/c/28657/7/src/southbridge/intel/bd82x6x/me_8.… PS7, Line 742: static void set_subsystem(struct device *dev, unsigned vendor, unsigned device) Prefer 'unsigned int' to bare use of 'unsigned' -- To view, visit https://review.coreboot.org/28657 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4909ebffc978f537bbf6269d9e27dbaca43daa10 Gerrit-Change-Number: 28657 Gerrit-PatchSet: 7 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 13:31:33 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: arch/riscv/include/arch: Don't use device_t
by Jonathan Neuschäfer (Code Review) 20 Sep '18

20 Sep '18

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/28691 ) Change subject: arch/riscv/include/arch: Don't use device_t ...................................................................... Patch Set 2: > Build Failed > > https://qa.coreboot.org/job/coreboot-gerrit/79580/ : FAILURE > > https://qa.coreboot.org/job/coreboot-checkpatch/33295/ : SUCCESS > ERROR: Issue with creating launcher for agent terribleder. The agent is being disconnected Jenkins seems to be broken at the moment -- To view, visit https://review.coreboot.org/28691 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If52de0d87b02419090b29a7cf1952905d3f975f6 Gerrit-Change-Number: 28691 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Comment-Date: Thu, 20 Sep 2018 13:30:58 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/cannonlake: Correct ITSS port id.
by PraveenX Hodagatta Pranesh (Code Review) 20 Sep '18

20 Sep '18

PraveenX Hodagatta Pranesh has uploaded this change for review. ( https://review.coreboot.org/28698 Change subject: soc/intel/cannonlake: Correct ITSS port id. ...................................................................... soc/intel/cannonlake: Correct ITSS port id. According to cannon lake PCH BIOS specification document #570374 target port id for interrupt and timer subsystem(ITSS) is C4 instead of C2. BUG=None TEST=None Change-Id: I9f8783c682d2c4c4a86e1c9cf4b9c27a18fdf494 Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh(a)intel.com> --- M src/soc/intel/cannonlake/include/soc/pcr_ids.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/28698/1 diff --git a/src/soc/intel/cannonlake/include/soc/pcr_ids.h b/src/soc/intel/cannonlake/include/soc/pcr_ids.h index 891b187..c4a18e8 100644 --- a/src/soc/intel/cannonlake/include/soc/pcr_ids.h +++ b/src/soc/intel/cannonlake/include/soc/pcr_ids.h @@ -35,7 +35,7 @@ #define PID_PSF4 0xbd #define PID_SCS 0xc0 #define PID_RTC 0xc3 -#define PID_ITSS 0xc2 +#define PID_ITSS 0xc4 #define PID_LPC 0xc7 #define PID_SERIALIO 0xcb -- To view, visit https://review.coreboot.org/28698 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9f8783c682d2c4c4a86e1c9cf4b9c27a18fdf494 Gerrit-Change-Number: 28698 Gerrit-PatchSet: 1 Gerrit-Owner: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh(a)intel.com>

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Change in coreboot[master]: soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources
by Philipp Deppenwiese (Code Review) 20 Sep '18

20 Sep '18

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/28672 ) Change subject: soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources ...................................................................... soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources FSP initializes the VT-d feature on Broadwell-DE and assigns an address space to the MMIO range. coreboot's resource allocator needs to be aware of this fixed resource as otherwise the address can be assigned to a different PCI device. In this case addresses are overlapped and the VT-d range is not accessible any more. To deal with it the right way add a fixed MMIO resource to the resources list if VT-d BAR is enabled. TEST=Booted into Linux and checked coreboot log for resource assignment. Change-Id: I626ac17420eadc0b49031e850f0f40b3b221a098 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/28672 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h M src/soc/intel/fsp_broadwell_de/vtd.c 2 files changed, 17 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Philipp Deppenwiese: Looks good to me, approved diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h index 50a4022..edfeafc 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h @@ -3,7 +3,7 @@ * * Copyright (C) 2013 Google, Inc. * Copyright (C) 2015-2016 Intel Corp. - * Copyright (C) 2017 Siemens AG + * Copyright (C) 2017-2018 Siemens AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -21,6 +21,7 @@ #define VTBAR_OFFSET 0x180 #define VTBAR_MASK 0xffffe000 #define VTBAR_ENABLED 0x01 +#define VTBAR_SIZE 0x2000 #define SMM_FEATURE_CONTROL 0x58 #define SMM_CPU_SAVE_EN (1 << 1) diff --git a/src/soc/intel/fsp_broadwell_de/vtd.c b/src/soc/intel/fsp_broadwell_de/vtd.c index ad4a056..e584cfa 100644 --- a/src/soc/intel/fsp_broadwell_de/vtd.c +++ b/src/soc/intel/fsp_broadwell_de/vtd.c @@ -17,10 +17,24 @@ #include <device/pci_ids.h> #include <soc/pci_devs.h> #include <soc/acpi.h> +#include <soc/broadwell_de.h> +static void vtd_read_resources(struct device *dev) +{ + uint32_t vtbar; + + /* Add fixed MMIO resource for VT-d which was set up by the FSP. */ + vtbar = pci_read_config32(dev, VTBAR_OFFSET); + if (vtbar & VTBAR_ENABLED) { + mmio_resource(dev, VTBAR_OFFSET, + (vtbar & VTBAR_MASK) / KiB, VTBAR_SIZE / KiB); + } +} + static struct device_operations vtd_ops = { - .write_acpi_tables = vtd_write_acpi_tables, + .read_resources = vtd_read_resources, + .write_acpi_tables = vtd_write_acpi_tables, }; static const struct pci_driver vtd_driver __pci_driver = { -- To view, visit https://review.coreboot.org/28672 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I626ac17420eadc0b49031e850f0f40b3b221a098 Gerrit-Change-Number: 28672 Gerrit-PatchSet: 5 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources
by Philipp Deppenwiese (Code Review) 20 Sep '18

20 Sep '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/28672 ) Change subject: soc/intel/fsp_broadwell_de: Add fixed VT-d MMIO range to the resources ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/28672 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I626ac17420eadc0b49031e850f0f40b3b221a098 Gerrit-Change-Number: 28672 Gerrit-PatchSet: 4 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 20 Sep 2018 12:38:47 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: fsp_broadwell_de: Move DMAR table generation to corresponding VT-d de...
by Philipp Deppenwiese (Code Review) 20 Sep '18

20 Sep '18

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/28671 ) Change subject: fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device ...................................................................... fsp_broadwell_de: Move DMAR table generation to corresponding VT-d device The DMAR table generation depends on the VT-d feature which is implemented in its own PCI device located in PCI:00:05.0 for Broadwell-DE. Add a new PCI driver for this device and move DMAR table generation to this device driver. Change-Id: I103257c73f5e745e996a441a2535b885270bc204 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/28671 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/soc/intel/fsp_broadwell_de/Makefile.inc M src/soc/intel/fsp_broadwell_de/acpi.c M src/soc/intel/fsp_broadwell_de/include/soc/acpi.h M src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h M src/soc/intel/fsp_broadwell_de/northcluster.c A src/soc/intel/fsp_broadwell_de/vtd.c 6 files changed, 40 insertions(+), 10 deletions(-) Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Philipp Deppenwiese: Looks good to me, approved diff --git a/src/soc/intel/fsp_broadwell_de/Makefile.inc b/src/soc/intel/fsp_broadwell_de/Makefile.inc index 386adc1..9312663 100644 --- a/src/soc/intel/fsp_broadwell_de/Makefile.inc +++ b/src/soc/intel/fsp_broadwell_de/Makefile.inc @@ -34,6 +34,7 @@ ramstage-y += iou_complto.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smmrelocate.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c +ramstage-y += vtd.c smm-$(CONFIG_HAVE_SMI_HANDLER) += pmutil.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c index 5d65477..9c3cae0 100644 --- a/src/soc/intel/fsp_broadwell_de/acpi.c +++ b/src/soc/intel/fsp_broadwell_de/acpi.c @@ -4,7 +4,7 @@ * Copyright (C) 2007-2009 coresystems GmbH * Copyright (C) 2013 Google Inc. * Copyright (C) 2015-2016 Intel Corp. - * Copyright (C) 2016 Siemens AG + * Copyright (C) 2016-2018 Siemens AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -390,15 +390,14 @@ return current; } -unsigned long northcluster_write_acpi_tables(struct device *const dev, +unsigned long vtd_write_acpi_tables(struct device *const dev, unsigned long current, struct acpi_rsdp *const rsdp) { acpi_dmar_t *const dmar = (acpi_dmar_t *)current; - struct device *vtdev = dev_find_slot(0, PCI_DEVFN(5, 0)); /* Create DMAR table only if virtualization is enabled */ - if (!(pci_read_config32(vtdev, 0x180) & 0x01)) + if (!(pci_read_config32(dev, VTBAR_OFFSET) & VTBAR_ENABLED)) return current; printk(BIOS_DEBUG, "ACPI: * DMAR\n"); diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/acpi.h b/src/soc/intel/fsp_broadwell_de/include/soc/acpi.h index da552cc..da30252 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/acpi.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/acpi.h @@ -3,7 +3,7 @@ * * Copyright (C) 2013 Google, Inc. * Copyright (C) 2015-2016 Intel Corp. - * Copyright (C) 2016 Siemens AG + * Copyright (C) 2016-2018 Siemens AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -24,8 +24,8 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt); unsigned long acpi_madt_irq_overrides(unsigned long current); uint16_t get_pmbase(void); -unsigned long northcluster_write_acpi_tables(struct device *const dev, - unsigned long current, - struct acpi_rsdp *const rsdp); +unsigned long vtd_write_acpi_tables(struct device *const dev, + unsigned long current, + struct acpi_rsdp *const rsdp); #endif /* _SOC_ACPI_H_ */ diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h index dc1ec19..50a4022 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/broadwell_de.h @@ -20,6 +20,7 @@ #define VTBAR_OFFSET 0x180 #define VTBAR_MASK 0xffffe000 +#define VTBAR_ENABLED 0x01 #define SMM_FEATURE_CONTROL 0x58 #define SMM_CPU_SAVE_EN (1 << 1) diff --git a/src/soc/intel/fsp_broadwell_de/northcluster.c b/src/soc/intel/fsp_broadwell_de/northcluster.c index 7090370..2e27d37 100644 --- a/src/soc/intel/fsp_broadwell_de/northcluster.c +++ b/src/soc/intel/fsp_broadwell_de/northcluster.c @@ -3,7 +3,7 @@ * * Copyright (C) 2013 Google Inc. * Copyright (C) 2015-2016 Intel Corp. - * Copyright (C) 2016 Siemens AG + * Copyright (C) 2016-2018 Siemens AG * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -137,7 +137,6 @@ static struct device_operations nc_ops = { .read_resources = nc_read_resources, .acpi_fill_ssdt_generator = generate_cpu_entries, - .write_acpi_tables = northcluster_write_acpi_tables, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, .init = NULL, diff --git a/src/soc/intel/fsp_broadwell_de/vtd.c b/src/soc/intel/fsp_broadwell_de/vtd.c new file mode 100644 index 0000000..ad4a056 --- /dev/null +++ b/src/soc/intel/fsp_broadwell_de/vtd.c @@ -0,0 +1,30 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Siemens AG + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <device/pci.h> +#include <device/pci_ids.h> +#include <soc/pci_devs.h> +#include <soc/acpi.h> + + +static struct device_operations vtd_ops = { + .write_acpi_tables = vtd_write_acpi_tables, +}; + +static const struct pci_driver vtd_driver __pci_driver = { + .ops = &vtd_ops, + .vendor = PCI_VENDOR_ID_INTEL, + .device = VTD_DEVID, +}; -- To view, visit https://review.coreboot.org/28671 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I103257c73f5e745e996a441a2535b885270bc204 Gerrit-Change-Number: 28671 Gerrit-PatchSet: 5 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit September 2018