coreboot-gerrit September 2018

coreboot-gerrit@coreboot.org

1 participants
886 discussions

Change in coreboot[master]: siemens/mc_apl1: Activate clock spreading depth for PTN3460
by Werner Zeh (Code Review) 27 Sep '18

27 Sep '18

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/28761 ) Change subject: siemens/mc_apl1: Activate clock spreading depth for PTN3460 ...................................................................... Patch Set 2: > Patch Set 1: > > (7 comments) You still have depth for ratio in the commit headline... -- To view, visit https://review.coreboot.org/28761 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie457fcdbb6239dc0b25e2c35ad7a310ee80383f9 Gerrit-Change-Number: 28761 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 27 Sep 2018 12:28:11 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: siemens/mc_apl1: Activate clock spreading depth for PTN3460
by Mario Scheithauer (Code Review) 27 Sep '18

27 Sep '18

Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/28761 ) Change subject: siemens/mc_apl1: Activate clock spreading depth for PTN3460 ...................................................................... Patch Set 2: (3 comments) https://review.coreboot.org/#/c/28761/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@7 PS1, Line 7: spread > clock spreading is a more common wording for that feature. changed https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@9 PS1, Line 9: on the LVDS : interface dri > on the LVDS interface driven by PTN3460 changed https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@12 PS1, Line 12: frequency. > change to"nominal" here as the clock is modulated... […] changed -- To view, visit https://review.coreboot.org/28761 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie457fcdbb6239dc0b25e2c35ad7a310ee80383f9 Gerrit-Change-Number: 28761 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 27 Sep 2018 11:34:59 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: siemens/mc_apl1: Activate clock spreading depth for PTN3460
by Mario Scheithauer (Code Review) 27 Sep '18

27 Sep '18

Hello Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28761 to look at the new patch set (#2). Change subject: siemens/mc_apl1: Activate clock spreading depth for PTN3460 ...................................................................... siemens/mc_apl1: Activate clock spreading depth for PTN3460 In order to minimize Electromagnetic Interference (EMI) on the LVDS interface driven by PTN3460, clock spreading must be activated for mc_apl1 mainboard. The modulation ratio is set to 1 % of the nominal frequency. Change-Id: Ie457fcdbb6239dc0b25e2c35ad7a310ee80383f9 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/28761/2 -- To view, visit https://review.coreboot.org/28761 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ie457fcdbb6239dc0b25e2c35ad7a310ee80383f9 Gerrit-Change-Number: 28761 Gerrit-PatchSet: 2 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in coreboot[master]: siemens/mc_apl1: Activate clock center spreading depth for PTN3460
by Werner Zeh (Code Review) 27 Sep '18

27 Sep '18

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/28761 ) Change subject: siemens/mc_apl1: Activate clock center spreading depth for PTN3460 ...................................................................... Patch Set 1: (7 comments) https://review.coreboot.org/#/c/28761/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@7 PS1, Line 7: center clock spreading is a more common wording for that feature. https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@7 PS1, Line 7: depth ratio https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@10 PS1, Line 10: depth ratio https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@10 PS1, Line 10: clock frequency center spreading I would prefere "clock spreading" here https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@9 PS1, Line 9: from PTN3460 : bridge device on the LVDS interface driven by PTN3460 https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@11 PS1, Line 11: depth ratio https://review.coreboot.org/#/c/28761/1//COMMIT_MSG@12 PS1, Line 12: modulation change to"nominal" here as the clock is modulated...and the modulation ratio is 1% of the nominal frequency. -- To view, visit https://review.coreboot.org/28761 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie457fcdbb6239dc0b25e2c35ad7a310ee80383f9 Gerrit-Change-Number: 28761 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 27 Sep 2018 10:33:13 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: siemens/mc_apl1: Activate clock center spreading depth for PTN3460
by Mario Scheithauer (Code Review) 27 Sep '18

27 Sep '18

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/28761 Change subject: siemens/mc_apl1: Activate clock center spreading depth for PTN3460 ...................................................................... siemens/mc_apl1: Activate clock center spreading depth for PTN3460 In order to minimize Electromagnetic Interference (EMI) from PTN3460 bridge device, clock frequency center spreading depth must be activated for mc_apl1 mainboard. The clock spreading depth is set to 1 % of the modulation frequency. Change-Id: Ie457fcdbb6239dc0b25e2c35ad7a310ee80383f9 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/28761/1 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c index f1cbf0f..ed03cf3 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/ptn3460.c @@ -84,8 +84,8 @@ /* Use 18 bits per pixel. */ cfg.lvds_interface_ctrl1 |= 0x20; - /* No clock spreading, 300 mV LVDS swing. */ - cfg.lvds_interface_ctrl2 = 0x03; + /* 1 % clock center spreading, 300 mV LVDS swing. */ + cfg.lvds_interface_ctrl2 = 0x13; /* No LVDS signal swap. */ cfg.lvds_interface_ctrl3 = 0x00; /* Delay T2 (VDD to LVDS active) by 16 ms. */ -- To view, visit https://review.coreboot.org/28761 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie457fcdbb6239dc0b25e2c35ad7a310ee80383f9 Gerrit-Change-Number: 28761 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com>

1 0

Change in coreboot[master]: mb/google/octopus: Touchpad I2C CLK over spec
by Chris Zhou (Code Review) 27 Sep '18

27 Sep '18

Chris Zhou has uploaded this change for review. ( https://review.coreboot.org/28760 Change subject: mb/google/octopus: Touchpad I2C CLK over spec ...................................................................... mb/google/octopus: Touchpad I2C CLK over spec Need to tune I2C bus 6 clock frequency under the 400K Hz Bug=b:115600671 TEST=flash coreboot to the DUT and measure I2C bus 6 clock frequency whether arrive to 398.07K Hz Change-Id: I5cc1f67f0db0553cb8424f81408ed4686cddb2fb Signed-off-by: Chris Zhou <chris_zhou(a)compal.corp-partner.google.com> --- M src/mainboard/google/octopus/variants/fleex/overridetree.cb 1 file changed, 41 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/28760/1 diff --git a/src/mainboard/google/octopus/variants/fleex/overridetree.cb b/src/mainboard/google/octopus/variants/fleex/overridetree.cb index 179b8f4..792e057 100644 --- a/src/mainboard/google/octopus/variants/fleex/overridetree.cb +++ b/src/mainboard/google/octopus/variants/fleex/overridetree.cb @@ -1,5 +1,46 @@ chip soc/intel/apollolake + # Intel Common SoC Config + #+-------------------+---------------------------+ + #| Field | Value | + #+-------------------+---------------------------+ + #| GSPI0 | cr50 TPM. Early init is | + #| | required to set up a BAR | + #| | for TPM communication | + #| | before memory is up | + #| I2C5 | Audio | + #| I2C6 | Trackpad | + #| I2C7 | Touchscreen | + #+-------------------+---------------------------+ + + register "common_soc_config" = "{ + .gspi[0] = { + .speed_mhz = 1, + .early_init = 1, + }, + .i2c[0] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 152, + .fall_time_ns = 30, + }, + .i2c[5] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 104, + .fall_time_ns = 52, + }, + .i2c[6] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 66, + .fall_time_ns = 90, + .data_hold_time_ns = 350, + }, + .i2c[7] = { + .speed = I2C_SPEED_FAST, + .rise_time_ns = 76, + .fall_time_ns = 164, + }, + }" + device domain 0 on device pci 16.1 off end # - I2C 1 device pci 17.1 on -- To view, visit https://review.coreboot.org/28760 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I5cc1f67f0db0553cb8424f81408ed4686cddb2fb Gerrit-Change-Number: 28760 Gerrit-PatchSet: 1 Gerrit-Owner: Chris Zhou <chris_zhou(a)compal.corp-partner.google.com>

1 0

Change in coreboot[master]: siemens/mc_apl1: Add new mainboard variant mc_apl2
by Werner Zeh (Code Review) 27 Sep '18

27 Sep '18

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/28735 ) Change subject: siemens/mc_apl1: Add new mainboard variant mc_apl2 ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/28735 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0af60ab0dfe556dd95da2cf1a49c685a8f0ae4eb Gerrit-Change-Number: 28735 Gerrit-PatchSet: 3 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 27 Sep 2018 07:10:55 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: siemens/mc_apl1: Add new mainboard variant mc_apl2
by Mario Scheithauer (Code Review) 27 Sep '18

27 Sep '18

Hello Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28735 to look at the new patch set (#3). Change subject: siemens/mc_apl1: Add new mainboard variant mc_apl2 ...................................................................... siemens/mc_apl1: Add new mainboard variant mc_apl2 This mainboard is based on mc_apl1. In a first step, it contains a copy of mc_apl1 directory with minimum changes. Special adaptations for mc_apl2 mainboard will follow in separate commits. Change-Id: I0af60ab0dfe556dd95da2cf1a49c685a8f0ae4eb Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/Kconfig M src/mainboard/siemens/mc_apl1/Kconfig.name A src/mainboard/siemens/mc_apl1/variants/mc_apl2/Kconfig A src/mainboard/siemens/mc_apl1/variants/mc_apl2/Makefile.inc A src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb A src/mainboard/siemens/mc_apl1/variants/mc_apl2/mainboard.c 6 files changed, 197 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/28735/3 -- To view, visit https://review.coreboot.org/28735 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I0af60ab0dfe556dd95da2cf1a49c685a8f0ae4eb Gerrit-Change-Number: 28735 Gerrit-PatchSet: 3 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in coreboot[master]: mb/google/nocturne: Define GPP_D17 as EC_SYNC_IRQ
by Furquan Shaikh (Code Review) 26 Sep '18

26 Sep '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/28759 ) Change subject: mb/google/nocturne: Define GPP_D17 as EC_SYNC_IRQ ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28759 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie2b33692367b5d9ecc2b128180d8cfe4f6b347b1 Gerrit-Change-Number: 28759 Gerrit-PatchSet: 1 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 26 Sep 2018 22:59:39 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: ec/google/chromeec: Define a sync IRQ if needed
by Furquan Shaikh (Code Review) 26 Sep '18

26 Sep '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/28758 ) Change subject: ec/google/chromeec: Define a sync IRQ if needed ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28758 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I49a11363ce82882e572bcb8923fd114ab6593fea Gerrit-Change-Number: 28758 Gerrit-PatchSet: 1 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 26 Sep 2018 22:58:36 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

← Newer
1
...
12
13
14
15
16
17
18
...
89
Older →

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit September 2018