coreboot-gerrit August 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/intel/coffeelake_rvp: Enable GbE support
by Lijian Zhao (Code Review) 08 Aug '18

08 Aug '18

Hello Pratikkumar V Prajapati, Bora Guvendik, build bot (Jenkins), Krzysztof M Sywula, I'd like you to reexamine a change. Please visit https://review.coreboot.org/27848 to look at the new patch set (#4). Change subject: mb/intel/coffeelake_rvp: Enable GbE support ...................................................................... mb/intel/coffeelake_rvp: Enable GbE support Enable Gigabit Ethernet network controller on whiskey lake rvp platform, add NVM bin file as well. BUG=N/A TEST=Build and boot up into chromeos on whiskey lake rvp platform, and check eth0 can get IP address assigned, Change-Id: Ia299a2aa78108175074e084cc34a7d2b38cf1c72 Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/mainboard/intel/coffeelake_rvp/Kconfig M src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb A src/soc/intel/cannonlake/acpi/pch_glan.asl M src/soc/intel/cannonlake/acpi/southbridge.asl 4 files changed, 39 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/27848/4 -- To view, visit https://review.coreboot.org/27848 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ia299a2aa78108175074e084cc34a7d2b38cf1c72 Gerrit-Change-Number: 27848 Gerrit-PatchSet: 4 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: security/vboot: Split fwid.region build target
by Martin Roth (Code Review) 08 Aug '18

08 Aug '18

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/27884 ) Change subject: security/vboot: Split fwid.region build target ...................................................................... security/vboot: Split fwid.region build target Add the ability to specify the fwid version via a file instead of via config. This makes it so when doing an incremental build all objects are not invalidated when bumping the fwid. The coreboot ebuild will create this file to pass the latest version. BUG=b:112267918 TEST=ran dmidecide -t 0 and verified version was present Change-Id: I955106efd648a75a1311f24ede46bd238d1517e0 Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Reviewed-on: https://review.coreboot.org/27884 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Julius Werner <jwerner(a)chromium.org> --- M src/security/vboot/Makefile.inc 1 file changed, 7 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Julius Werner: Looks good to me, approved diff --git a/src/security/vboot/Makefile.inc b/src/security/vboot/Makefile.inc index b542425..7d40428 100644 --- a/src/security/vboot/Makefile.inc +++ b/src/security/vboot/Makefile.inc @@ -223,8 +223,13 @@ endif mv $@.tmp $@ -$(obj)/fwid.region: - printf "$(CONFIG_VBOOT_FWID_MODEL)$(CONFIG_VBOOT_FWID_VERSION)\0" > $@ +$(obj)/fwid.version: + echo -n "$(CONFIG_VBOOT_FWID_VERSION)" > $@ + +$(obj)/fwid.region: $(obj)/fwid.version + printf "%s%s\0" \ + "$(CONFIG_VBOOT_FWID_MODEL)" \ + "$(file < $(obj)/fwid.version)" > $@ build_complete:: $(obj)/gbb.region $(obj)/fwid.region @printf " WRITE GBB\n" -- To view, visit https://review.coreboot.org/27884 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I955106efd648a75a1311f24ede46bd238d1517e0 Gerrit-Change-Number: 27884 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mainboard/google/kahlee: Set SYSTEM_TYPE_LAPTOP
by Martin Roth (Code Review) 08 Aug '18

08 Aug '18

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/27930 ) Change subject: mainboard/google/kahlee: Set SYSTEM_TYPE_LAPTOP ...................................................................... mainboard/google/kahlee: Set SYSTEM_TYPE_LAPTOP This configures the ACPI FADT perferred power management profile to PM_MOBILE instead of PM_DESKTOP. I'm not sure what impact this actually has. I just noticed the other boards have it set. BUG=b:110971913 TEST=Made sure SYSTEM_TYPE_LAPTOP shows up in coreboot.config Change-Id: Iea1b8359b80d167e69745358f543f025713294ba Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Reviewed-on: https://review.coreboot.org/27930 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martinroth(a)google.com> --- M src/mainboard/google/kahlee/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig index 5565d57..fbd1fb0 100644 --- a/src/mainboard/google/kahlee/Kconfig +++ b/src/mainboard/google/kahlee/Kconfig @@ -43,6 +43,7 @@ select PCIEXP_COMMON_CLOCK select PCIEXP_L1_SUB_STATE select HAVE_EM100_SUPPORT + select SYSTEM_TYPE_LAPTOP if BOARD_GOOGLE_BASEBOARD_KAHLEE -- To view, visit https://review.coreboot.org/27930 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Iea1b8359b80d167e69745358f543f025713294ba Gerrit-Change-Number: 27930 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: arm64: Turn architectural register accessors into inline functions
by build bot (Jenkins) (Code Review) 08 Aug '18

08 Aug '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27881 ) Change subject: arm64: Turn architectural register accessors into inline functions ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/#/c/27881/5/src/arch/arm64/include/armv8/arch/l… File src/arch/arm64/include/armv8/arch/lib_helpers.h: https://review.coreboot.org/#/c/27881/5/src/arch/arm64/include/armv8/arch/l… PS5, Line 162: #define MAKE_REGISTER_ACCESSORS_EL123(reg) \ Macros with complex values should be enclosed in parentheses -- To view, visit https://review.coreboot.org/27881 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2c41cc3ce49ee26bf12cd34e3d0509d8e61ffc63 Gerrit-Change-Number: 27881 Gerrit-PatchSet: 5 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 08 Aug 2018 21:25:14 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: drivers/intel/wifi: Get rid of unused wrdd.asl
by Furquan Shaikh (Code Review) 08 Aug '18

08 Aug '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27963 Change subject: drivers/intel/wifi: Get rid of unused wrdd.asl ...................................................................... drivers/intel/wifi: Get rid of unused wrdd.asl This change gets rid of unused wrdd.asl in intel wifi driver. This file became redundant when all boards moved to using SSDT for wifi device. Change-Id: I8b5b3816d77c90e75052c58a3120ab62185873a7 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- D src/drivers/intel/wifi/acpi/wrdd.asl 1 file changed, 0 insertions(+), 37 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/27963/1 diff --git a/src/drivers/intel/wifi/acpi/wrdd.asl b/src/drivers/intel/wifi/acpi/wrdd.asl deleted file mode 100644 index 6f071ad..0000000 --- a/src/drivers/intel/wifi/acpi/wrdd.asl +++ /dev/null @@ -1,37 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Google Inc. - * Copyright (C) 2016 Intel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* - * This method is used by the Intel wireless kernel drivers to determine - * the proper country code for regulatory domain configuration. - * - * It requires an NVS field called CID1 to be present that provides the - * ISO-3166-2 alpha-2 country code. - */ -Method (WRDD, 0, Serialized) -{ - Name (WRDX, Package () { - 0, /* Revision */ - Package () { - 0x00000007, /* Domain Type, 0x7:WiFi */ - 0x00000000, /* No Default Country Identifier */ - } - }) - - /* Replace Country Identifier with value from NVS */ - Store (\CID1, Index (DeRefOf (Index (WRDX, 1)), 1)) - Return (WRDX) -} -- To view, visit https://review.coreboot.org/27963 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I8b5b3816d77c90e75052c58a3120ab62185873a7 Gerrit-Change-Number: 27963 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: Added multiboot support to cbfstool and made changes to behaviour for...
by build bot (Jenkins) (Code Review) 08 Aug '18

08 Aug '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27957 ) Change subject: Added multiboot support to cbfstool and made changes to behaviour for cbfs add-payload ...................................................................... Patch Set 2: (10 comments) https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-mkpayload.c File util/cbfstool/cbfs-mkpayload.c: https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-mkpayload.c@552 PS2, Line 552: " 0x%x entry: 0x%x\n",mboot_hdr.load_addr,mboot_hdr.entry_addr); space required after that ',' (ctx:VxV) https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-mkpayload.c@552 PS2, Line 552: " 0x%x entry: 0x%x\n",mboot_hdr.load_addr,mboot_hdr.entry_addr); space required after that ',' (ctx:VxV) https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-payload-linux.c File util/cbfstool/cbfs-payload-linux.c: https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-payload-linux.c@… PS2, Line 247: if ( hdr->boot_sector_magic != 0xAA55 ) { space prohibited after that open parenthesis '(' https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-payload-linux.c@… PS2, Line 247: if ( hdr->boot_sector_magic != 0xAA55 ) { space prohibited before that close parenthesis ')' https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-payload-linux.c@… PS2, Line 251: if ( (hdr->header_magic[0] != 'H')|| spaces required around that '||' (ctx:VxE) https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-payload-linux.c@… PS2, Line 251: if ( (hdr->header_magic[0] != 'H')|| space prohibited after that open parenthesis '(' https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-payload-linux.c@… PS2, Line 252: (hdr->header_magic[1] != 'd')|| spaces required around that '||' (ctx:VxE) https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-payload-linux.c@… PS2, Line 253: (hdr->header_magic[2] != 'r')|| spaces required around that '||' (ctx:VxE) https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfs-payload-linux.c@… PS2, Line 254: (hdr->header_magic[3] != 'S')){ space required before the open brace '{' https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfstool.c File util/cbfstool/cbfstool.c: https://review.coreboot.org/#/c/27957/2/util/cbfstool/cbfstool.c@768 PS2, Line 768: ERROR("Not a supported payload type (ELF / FV / bzImage / Multiboot).\n"); line over 80 characters -- To view, visit https://review.coreboot.org/27957 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iaeb808e8750ad81bdf8c4daedb0d91e961eebb70 Gerrit-Change-Number: 27957 Gerrit-PatchSet: 2 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 08 Aug 2018 20:45:24 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: drivers/intel/wifi: Skip adding SSDT entry if device is disabled
by Furquan Shaikh (Code Review) 08 Aug '18

08 Aug '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27962 Change subject: drivers/intel/wifi: Skip adding SSDT entry if device is disabled ...................................................................... drivers/intel/wifi: Skip adding SSDT entry if device is disabled This change checks to ensure that device is enabled before adding entry into SSDT. BUG=b:112371978 Change-Id: Ibe4811bef8cf0978b7a82d66a32f96247b9c823d Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/drivers/intel/wifi/wifi.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/27962/1 diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c index 4b96a02..df425fa 100644 --- a/src/drivers/intel/wifi/wifi.c +++ b/src/drivers/intel/wifi/wifi.c @@ -198,7 +198,7 @@ const char *path = acpi_device_path(dev->bus->dev); u32 address; - if (!path) + if (!path || !dev->enabled) return; /* Device */ -- To view, visit https://review.coreboot.org/27962 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ibe4811bef8cf0978b7a82d66a32f96247b9c823d Gerrit-Change-Number: 27962 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: mb/google/octopus: Dynamically disable CNVi/PCIe device
by Furquan Shaikh (Code Review) 08 Aug '18

08 Aug '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27961 Change subject: mb/google/octopus: Dynamically disable CNVi/PCIe device ...................................................................... mb/google/octopus: Dynamically disable CNVi/PCIe device This change checks to see if CNVi module is out of reset: 1. If yes, then PCIe device for WiFi is disabled. 2. If no, then CNVi device is disabled. BUG=b:112371978 Change-Id: I6e6cf2e646c897df017913056db87ac0cffa1a8e Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/octopus/mainboard.c 1 file changed, 28 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/27961/1 diff --git a/src/mainboard/google/octopus/mainboard.c b/src/mainboard/google/octopus/mainboard.c index 5c10d94..344596f 100644 --- a/src/mainboard/google/octopus/mainboard.c +++ b/src/mainboard/google/octopus/mainboard.c @@ -19,6 +19,8 @@ #include <compiler.h> #include <console/console.h> #include <device/device.h> +#include <device/pci_def.h> +#include <device/pci_ops.h> #include <ec/google/chromeec/ec.h> #include <ec/ec.h> #include <nhlt.h> @@ -26,6 +28,7 @@ #include <soc/cpu.h> #include <soc/gpio.h> #include <soc/nhlt.h> +#include <soc/pci_devs.h> #include <string.h> #include <vendorcode/google/chromeos/chromeos.h> #include <variant/ec.h> @@ -122,8 +125,33 @@ /* Place holder for common updates. */ } +/* + * Check if CNVi PCI device is released from reset. If yes, then the system is + * booting with CNVi module. In this case, the PCIe device for WiFi needs to + * be disabled. If CNVi device is held in reset, then disable it. + */ +static void wifi_device_update(void) +{ + struct device *dev = dev_find_slot(0, PCH_DEVFN_CNVI); + uint32_t reg = pci_read_config32(dev, PCI_VENDOR_ID); + + /* + * If vendor/device ID for CNVi reads as 0xffffffff, then it is safe to + * assume that it is being held in reset. + */ + if (reg == 0xffffffff) + dev->enabled = 0; + else { + dev = dev_find_slot(0, PCH_DEVFN_PCIE1); + dev->enabled = 0; + } +} + void mainboard_devtree_update(struct device *dev) { + /* Apply common devtree updates. */ + wifi_device_update(); + /* Defer to variant for board-specific updates. */ variant_update_devtree(dev); } -- To view, visit https://review.coreboot.org/27961 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6e6cf2e646c897df017913056db87ac0cffa1a8e Gerrit-Change-Number: 27961 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: soc/intel/apollolake: Add CNVi device to list of PCI devs
by Furquan Shaikh (Code Review) 08 Aug '18

08 Aug '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27960 Change subject: soc/intel/apollolake: Add CNVi device to list of PCI devs ...................................................................... soc/intel/apollolake: Add CNVi device to list of PCI devs This change adds CNVi device to list of PCI devs. BUG=b:112371978 Change-Id: I6def98db3846c2244812a9a2ce84340bd2149b48 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/soc/intel/apollolake/include/soc/pci_devs.h 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/27960/1 diff --git a/src/soc/intel/apollolake/include/soc/pci_devs.h b/src/soc/intel/apollolake/include/soc/pci_devs.h index 25b74ba..37d0fab 100644 --- a/src/soc/intel/apollolake/include/soc/pci_devs.h +++ b/src/soc/intel/apollolake/include/soc/pci_devs.h @@ -52,6 +52,10 @@ #define PCH_DEVFN_NPK _PCH_DEVFN(NPK, 2) #define PCH_DEV_NPK _PCH_DEV(NPK,2) +#define PCH_DEV_SLOT_CNVI 0x0c +#define PCH_DEVFN_CNVI _PCH_DEVFN(CNVI, 0) +#define PCH_DEV_CNVI _PCH_DEV(CNVI, 0) + #define PCH_DEV_SLOT_P2SB 0x0d #define PCH_DEVFN_P2SB _PCH_DEVFN(P2SB, 0) #define PCH_DEVFN_PMC _PCH_DEVFN(P2SB, 1) -- To view, visit https://review.coreboot.org/27960 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6def98db3846c2244812a9a2ce84340bd2149b48 Gerrit-Change-Number: 27960 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: arch/x86/tables.c: Avoid static analysis error for unused value
by Richard Spiegel (Code Review) 08 Aug '18

08 Aug '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/27958 Change subject: arch/x86/tables.c: Avoid static analysis error for unused value ...................................................................... arch/x86/tables.c: Avoid static analysis error for unused value Within procedure arch_write_tables, the pointer "rom_table_end" is updated every time a table is created. However, after creating last table, pointer rom_table_end is not used, though it is updated. Add a "(void)rom_table_end;" at the end to avoid the static analysis error. BUG=b:112253891 TEST=Build and boot grunt. Change-Id: I8a34026795c7f0d1bb86c5f5c0469d40aa53994a Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M src/arch/x86/tables.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/27958/1 diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c index 0a9a3d5..b0c02c2 100644 --- a/src/arch/x86/tables.c +++ b/src/arch/x86/tables.c @@ -259,6 +259,7 @@ forwarding_table += sz; /* Align up to page boundary for historical consistency. */ forwarding_table = ALIGN_UP(forwarding_table, 4*KiB); + (void)rom_table_end; } void bootmem_arch_add_ranges(void) -- To view, visit https://review.coreboot.org/27958 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I8a34026795c7f0d1bb86c5f5c0469d40aa53994a Gerrit-Change-Number: 27958 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

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coreboot-gerrit August 2018