Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/27987
Change subject: spi/flash: Add interface to check software write protection
......................................................................
spi/flash: Add interface to check software write protection
* Add a common function to check if the region is write protected by
** SPI controller's "flash protected regions"
** flash status register protection bits
The state of a possible hardware write protection doesn't matter here.
Change-Id: I1a2b75f5c0f183a74d42180dfc0c12d50b9780bb
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/drivers/spi/spi_flash.c
M src/include/spi-generic.h
M src/include/spi_flash.h
3 files changed, 50 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/27987/1
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 87049460..0e8ebd9 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -538,6 +538,36 @@
}
}
+int spi_flash_ctrlr_is_region_protected(const struct spi_flash *flash,
+ const struct region *region)
+{
+ const struct spi_ctrlr *ctrlr;
+ const struct spi_flash_ops *ops;
+ struct region flash_region = { 0 };
+
+ if (!flash)
+ return -1;
+
+ flash_region.size = flash->size;
+
+ if (!region_is_subregion(&flash_region, region))
+ return -1;
+
+ ctrlr = flash->spi.ctrlr;
+ ops = flash->ops;
+
+ /* Check controller's "Protected Regions" */
+ if (ctrlr && ctrlr->is_flash_write_protected)
+ return ctrlr->is_flash_write_protected(flash, region);
+
+ /*
+ * Try to directly check the status register lock-bits in flash.
+ */
+ if (ops && ops->get_write_protection)
+ return ops->get_write_protection(flash, region) > 0;
+
+ return -1;
+}
int spi_flash_ctrlr_protect_region(const struct spi_flash *flash,
const struct region *region)
diff --git a/src/include/spi-generic.h b/src/include/spi-generic.h
index e3e7f82..c95b4ae 100644
--- a/src/include/spi-generic.h
+++ b/src/include/spi-generic.h
@@ -145,6 +145,8 @@
struct spi_flash *flash);
int (*flash_protect)(const struct spi_flash *flash,
const struct region *region);
+ int (*is_flash_write_protected)(const struct spi_flash *flash,
+ const struct region *region);
};
/*-----------------------------------------------------------------------
diff --git a/src/include/spi_flash.h b/src/include/spi_flash.h
index f33b59a..b8bb7bd 100644
--- a/src/include/spi_flash.h
+++ b/src/include/spi_flash.h
@@ -198,6 +198,24 @@
const struct region *region);
/*
+ * Check if provided region is write protected.
+ * It first tries to use its controller, if available.
+ * If the controller doesn't support flash protections, try to query the lock
+ * bits in the status register of the flash device (requires flash vendor
+ * specific support).
+ *
+ * @param flash The flash device to operate on
+ * @param region The region to lock
+ * @Return < 0 on error, 0 if region isn't fully protected else 1 on success.
+ *
+ * Possible errors:
+ * * Invalid region specified
+ * * Requested region layout can't be directly applied on flash
+ * * SPI bus error
+ */
+int spi_flash_ctrlr_is_region_protected(const struct spi_flash *flash,
+ const struct region *region);
+/*
* This function is provided to support spi flash command-response transactions.
* Only 2 vectors are supported and the 'func' is called with appropriate
* write and read buffers together. This can be used for chipsets that
--
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Gerrit-Change-Id: I1a2b75f5c0f183a74d42180dfc0c12d50b9780bb
Gerrit-Change-Number: 27987
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/27681 )
Change subject: Remove use of coreboot/src/vendorcode/amd/pi/00670F00/Proc/Psp
......................................................................
Patch Set 3:
Which of the 2 patches are you using? Please abandon the other. Since the other has gotten the reviews, I'd recommend abandoning this one.
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Gerrit-Change-Id: Ib21954a82827b5bb5854fa9a6672376c9bbb6539
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/26164 )
Change subject: soc/intel/common/block: Move common uart function to block/uart
......................................................................
Patch Set 62:
(1 comment)
https://review.coreboot.org/#/c/26164/62/src/soc/intel/common/block/uart/ua…
File src/soc/intel/common/block/uart/uart.c:
https://review.coreboot.org/#/c/26164/62/src/soc/intel/common/block/uart/ua…
PS62, Line 99: } else {
else is not generally useful after a break or return
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Gerrit-Change-Id: I109d0e5c942e499cb763bde47cb7d53dfbf5cef6
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Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com>
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Raul Rangel has posted comments on this change. ( https://review.coreboot.org/27884 )
Change subject: security/vboot: Split fwid.region build target
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/27884/1/src/security/vboot/Makefile.inc
File src/security/vboot/Makefile.inc:
https://review.coreboot.org/#/c/27884/1/src/security/vboot/Makefile.inc@232
PS1, Line 232: file
> This function will only work for make version 4.2 and higher.For lower version it'll give an error. […]
I wasn't aware. I'll change it to use what Julius suggested.
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25105 )
Change subject: drivers/spi: Winbond specific write-protection enable
......................................................................
Patch Set 17:
(1 comment)
https://review.coreboot.org/#/c/25105/17/src/drivers/spi/winbond.c
File src/drivers/spi/winbond.c:
https://review.coreboot.org/#/c/25105/17/src/drivers/spi/winbond.c@32
PS17, Line 32: #define CMD_VOLTILE_SREG_WREN 0x50 /* Write Enable for Volatile Status Register */
line over 80 characters
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Maulik V Vaghela has posted comments on this change. ( https://review.coreboot.org/27884 )
Change subject: security/vboot: Split fwid.region build target
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/27884/1/src/security/vboot/Makefile.inc
File src/security/vboot/Makefile.inc:
https://review.coreboot.org/#/c/27884/1/src/security/vboot/Makefile.inc@232
PS1, Line 232: file
> Oh, right, carry on then.
This function will only work for make version 4.2 and higher.For lower version it'll give an error. Can we capture this somewhere?
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Maulik V Vaghela has abandoned this change. ( https://review.coreboot.org/27986 )
Change subject: vboot/Makefie: fix compilation error
......................................................................
Abandoned
Errors were due to make version. Need to update to v4.2 or higher
--
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Arthur Heymans has uploaded a new patch set (#2). ( https://review.coreboot.org/27985 )
Change subject: [TESTONLY]nb/intel/i945: Only disable VGA decode on IGD
......................................................................
[TESTONLY]nb/intel/i945: Only disable VGA decode on IGD
Could be some targets don't have enough pci_mmio_size...
Change-Id: I4f1e1ab349b3e4bcb4d49da4b6d091e57243ee8f
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/northbridge/intel/i945/gma.c
1 file changed, 1 insertion(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/27985/2
--
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Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>