Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/27782
to look at the new patch set (#4).
Change subject: mb/lenovo/x1_carbon_gen1: add vbt
......................................................................
mb/lenovo/x1_carbon_gen1: add vbt
Extracted from live running Thinkpad x1 carbon gen1 with vendor firmware.
Thanks to Igor Lee.
Change-Id: Id59517d9040c98e67a42fbce537f42f6b0c6db2d
Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu>
Tested-by: Igor Lee <getrun(a)gmail.com>
---
M src/mainboard/lenovo/x1_carbon_gen1/Kconfig
A src/mainboard/lenovo/x1_carbon_gen1/data.vbt
2 files changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/27782/4
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Id59517d9040c98e67a42fbce537f42f6b0c6db2d
Gerrit-Change-Number: 27782
Gerrit-PatchSet: 4
Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Marc Jones has uploaded this change for review. ( https://review.coreboot.org/27785
Change subject: soc/amd/stoneyridge: Call AMD ALIB method with AC/DC state
......................................................................
soc/amd/stoneyridge: Call AMD ALIB method with AC/DC state
AMD ALIB Function 1 accepts the AC/DC startup state. This
is reported to be required for AMD PSPP settings.
BUG=b:112020107
TEST= build test
Change-Id: Ibb6c872d84745217912956c15d6ca2e8ba387561
Signed-off-by: Marc Jones <marcj303(a)gmail.com>
---
M src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
1 file changed, 14 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/27785/1
diff --git a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
index 81964ba..2855b23 100644
--- a/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
+++ b/src/soc/amd/stoneyridge/acpi/sb_pci0_fch.asl
@@ -14,6 +14,8 @@
* GNU General Public License for more details.
*/
+External(\_SB.ALIB, MethodObj)
+
/* System Bus */
/* _SB.PCI0 */
@@ -138,7 +140,7 @@
* 2. Get PCI Interrupt routing from ACPI VSM, this
* value is based on user choice in BIOS setup.
*/
-Method(_INI, 0) {
+Method(_INI, 0, Serialized) {
/* DBGO("\\_SB\\_INI\n") */
/* DBGO(" DSDT.ASL code from ") */
/* DBGO(__DATE__) */
@@ -154,6 +156,17 @@
/* Determine the OS we're running on */
OSFL()
+
+ /* Send ALIB Function 1 the AC/DC state */
+ Name(F1BF, Buffer(0x03){})
+ CreateWordField(F1BF, 0, F1SZ)
+ CreateByteField(F1BF, 2, F1DA)
+
+ Store(3, F1SZ)
+ Store(\PWRS, F1DA)
+
+ \_SB.ALIB(1, F1BF)
+
} /* End Method(_SB._INI) */
Method(OSFL, 0){
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ibb6c872d84745217912956c15d6ca2e8ba387561
Gerrit-Change-Number: 27785
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com>
Marc Jones has uploaded this change for review. ( https://review.coreboot.org/27783
Change subject: soc/amd/common: Remove PSPP override setting
......................................................................
soc/amd/common: Remove PSPP override setting
For some reason the PSPP setting was being overwritten in the common
code. Remove the setting and allow the oem customize function to
make the setting.
BUG=b:112020107
TEST= build test
Change-Id: If7f4511a71f725fedd60d33552656850e50d955d
Signed-off-by: Marc Jones <marcj303(a)gmail.com>
---
M src/soc/amd/common/block/pi/agesawrapper.c
1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/27783/1
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index c2a799a..c464b29 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -130,8 +130,6 @@
OemCustomizeInitEarly(EarlyParams);
- EarlyParams->GnbConfig.PsppPolicy = PsppDisabled;
-
timestamp_add_now(TS_AGESA_INIT_EARLY_START);
status = AmdInitEarly(EarlyParams);
timestamp_add_now(TS_AGESA_INIT_EARLY_DONE);
--
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Gerrit-Project: coreboot
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Gerrit-MessageType: newchange
Gerrit-Change-Id: If7f4511a71f725fedd60d33552656850e50d955d
Gerrit-Change-Number: 27783
Gerrit-PatchSet: 1
Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/27782
to look at the new patch set (#3).
Change subject: mb/lenovo/x1_carbon_gen1: add vbt
......................................................................
mb/lenovo/x1_carbon_gen1: add vbt
Extracted from live running Thinkpad x1 cargon gen1 with vendor firmware.
Thanks to Igor Lee.
Change-Id: Id59517d9040c98e67a42fbce537f42f6b0c6db2d
Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu>
Tested-by: Igor Lee <getrun(a)gmail.com>
---
M src/mainboard/lenovo/x1_carbon_gen1/Kconfig
A src/mainboard/lenovo/x1_carbon_gen1/data.vbt
2 files changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/27782/3
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Id59517d9040c98e67a42fbce537f42f6b0c6db2d
Gerrit-Change-Number: 27782
Gerrit-PatchSet: 3
Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/27781
to look at the new patch set (#3).
Change subject: mb/lenovo/x1_carbon_gen1: add support for hynix memory
......................................................................
mb/lenovo/x1_carbon_gen1: add support for hynix memory
All different memory configuration should be supported by now.
Thanks to Igor Lee.
Change-Id: Ib93c0e3cbdc29cbf6cff26292df4fbbb8208082f
Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu>
Tested-by: Igor Lee <getrun(a)gmail.com>
---
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/spd/Makefile.inc
A src/mainboard/lenovo/x1_carbon_gen1/spd/hynix.hex
3 files changed, 20 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/27781/3
--
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Gerrit-Change-Id: Ib93c0e3cbdc29cbf6cff26292df4fbbb8208082f
Gerrit-Change-Number: 27781
Gerrit-PatchSet: 3
Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27781 )
Change subject: mb/lenovo/x1_carbon_gen1: add support for hynix memory
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/27781/2/src/mainboard/lenovo/x1_carbon_gen1…
File src/mainboard/lenovo/x1_carbon_gen1/romstage.c:
https://review.coreboot.org/#/c/27781/2/src/mainboard/lenovo/x1_carbon_gen1…
PS2, Line 112: die("Unsupported Memory. (detected 'reserved' memory configuration).");
line over 80 characters
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Gerrit-Change-Id: Ib93c0e3cbdc29cbf6cff26292df4fbbb8208082f
Gerrit-Change-Number: 27781
Gerrit-PatchSet: 2
Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-Comment-Date: Wed, 01 Aug 2018 18:48:44 +0000
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Alexander Couzens has uploaded a new patch set (#2). ( https://review.coreboot.org/27781 )
Change subject: mb/lenovo/x1_carbon_gen1: add support for hynix memory
......................................................................
mb/lenovo/x1_carbon_gen1: add support for hynix memory
All different memory configuration should be supported by now.
Thanks to Igor Lee.
Change-Id: Ib93c0e3cbdc29cbf6cff26292df4fbbb8208082f
Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu>
Tested-by: Igor Lee <gerun(a)gmail.com>
---
M src/mainboard/lenovo/x1_carbon_gen1/romstage.c
M src/mainboard/lenovo/x1_carbon_gen1/spd/Makefile.inc
A src/mainboard/lenovo/x1_carbon_gen1/spd/hynix.hex
3 files changed, 20 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/27781/2
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: Ib93c0e3cbdc29cbf6cff26292df4fbbb8208082f
Gerrit-Change-Number: 27781
Gerrit-PatchSet: 2
Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu>
Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org>
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27781 )
Change subject: mb/lenovo/x1_carbon_gen1: add support for hynix memory
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/27781/1/src/mainboard/lenovo/x1_carbon_gen1…
File src/mainboard/lenovo/x1_carbon_gen1/romstage.c:
https://review.coreboot.org/#/c/27781/1/src/mainboard/lenovo/x1_carbon_gen1…
PS1, Line 112: die("Unsupported Memory. (detected 'reserved' memory configuration).");
line over 80 characters
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Gerrit-Change-Id: Ib93c0e3cbdc29cbf6cff26292df4fbbb8208082f
Gerrit-Change-Number: 27781
Gerrit-PatchSet: 1
Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu>
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Gerrit-Comment-Date: Wed, 01 Aug 2018 18:46:56 +0000
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