Gaggery Tsai has posted comments on this change. ( https://review.coreboot.org/27791 )
Change subject: mb/google/poppy/variants/atlas: Do not override icc_max
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/27791/2/src/mainboard/google/poppy/variants…
File src/mainboard/google/poppy/variants/atlas/devicetree.cb:
https://review.coreboot.org/#/c/27791/2/src/mainboard/google/poppy/variants…
PS2, Line 103: 0
I think 0 is confusing. Suggest to completely removing this line. Also, add one line comment above saying the icc max setting is covered in soc code for different CPU sku.
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Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/27793
Change subject: sandybridge/raminit_mrc: remove reference to report_platform_info()
......................................................................
sandybridge/raminit_mrc: remove reference to report_platform_info()
Commit ef8c559e537ed10d8054ca6a72ca50e0531fde95
[nb/intel/sandybridge/report_platform: Move remaining code to sb folder]
moved reporting code to the southbridge, but missed a reference in the
non-default MRC raminit path (so testing missed it).
Remove invalid reference to fix compilation error.
Test: build google/link with MRC raminit option selected
Change-Id: I270a95ac53fbc9f8792f375908cf91585261f6a1
Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com>
---
M src/northbridge/intel/sandybridge/raminit_mrc.c
1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/27793/1
diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c
index c7e6e1f..39b540c 100644
--- a/src/northbridge/intel/sandybridge/raminit_mrc.c
+++ b/src/northbridge/intel/sandybridge/raminit_mrc.c
@@ -190,8 +190,6 @@
struct sys_info sysinfo;
int (*entry) (struct pei_data *pei_data) __attribute__((regparm(1)));
- report_platform_info();
-
/* Wait for ME to be ready */
intel_early_me_init();
intel_early_me_uma_size();
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Hello caveh jalali, Gaggery Tsai,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/27791
to look at the new patch set (#2).
Change subject: mb/google/poppy/variants/atlas: Do not override icc_max
......................................................................
mb/google/poppy/variants/atlas: Do not override icc_max
Skylake SoC code now sets the icc_max based on the CPU SKU, so we
should not hard-code it in the device tree.
BUG=b:110890675
BRANCH=None
TEST=boots on atlas
Change-Id: I7eb3499b7bea9ab2c49e1f299e2dbb688c8d1c33
Signed-off-by: Caveh Jalali <caveh(a)chromium.org>
---
M src/mainboard/google/poppy/variants/atlas/devicetree.cb
1 file changed, 5 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/27791/2
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caveh jalali has posted comments on this change. ( https://review.coreboot.org/27791 )
Change subject: mb/google/poppy/variants/atlas: Not not override icc_max
......................................................................
Patch Set 1: Code-Review-1
need to wait for
https://review.coreboot.org/#/c/coreboot/+/27610/
to land.
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Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/27788 )
Change subject: src/mb/google/poppy/variants/atlas: Apply correct AC/DC loadlines
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/27788/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/27788/1//COMMIT_MSG@7
PS1, Line 7: src
oh, and you can drop the "src/" component.
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Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/22872 )
Change subject: security/crypto: Add crypto primitives for hashing data
......................................................................
Patch Set 27:
Main issue here is the problem that not all people using vboot and hash algorithm/security can work and are used without vboot support. Just saying mrc cache...
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