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Change subject: northbridge/amd/lx: Fix function setShadowRCONF
......................................................................
Patch Set 8:
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/26703 )
Change subject: util/lint: use a more compact output format
......................................................................
Patch Set 2: Code-Review+2
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Change subject: util/lint: use a more compact output format
......................................................................
Patch Set 2: Verified+1
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Change subject: checkpatch: exclude util/crossgcc/patches
......................................................................
Patch Set 3: Verified+1
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Change subject: util/lint: use a more compact output format
......................................................................
Patch Set 1: Verified-1
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Hello Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/26703
to look at the new patch set (#2).
Change subject: util/lint: use a more compact output format
......................................................................
util/lint: use a more compact output format
It now looks like this:
Check that files have license headers (lint-stable-000-license-headers): success
Check for superfluous whitespace in the tree (lint-stable-003-whitespace): success
Check that C labels begin at start-of-line (lint-stable-004-style-labels): success
Change-Id: I9d1f6adebae5b68a51e89c2833f8713f0ffcb616
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
M util/lint/lint
1 file changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/26703/2
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Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/26703
Change subject: util/lint: use a more compact output format
......................................................................
util/lint: use a more compact output format
Change-Id: I9d1f6adebae5b68a51e89c2833f8713f0ffcb616
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
M util/lint/lint
1 file changed, 2 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/26703/1
diff --git a/util/lint/lint b/util/lint/lint
index 253a6e6..fcce45f 100755
--- a/util/lint/lint
+++ b/util/lint/lint
@@ -49,9 +49,8 @@
#run all scripts of the requested type
for script in "$(dirname "$0")/${1}-"*; do
- printf "\n%s\n" "$(basename "$script")"
- grep "^# DESCR:" "$script" | sed "s,.*DESCR: *,,"
- echo "========"
+ printf "%s " "$(grep '^# DESCR:' "$script" | sed 's,.*DESCR: *,,')"
+ printf "(%s): " "$(basename "$script")"
junit_write " <testcase classname='lint' name='$(basename "$script")'>"
$script | tee "$LINTLOG"
@@ -67,7 +66,6 @@
rm -f "$LINTLOG"
FAILED=$(( FAILED + 1 ))
fi
- echo "========"
junit_write ' </testcase>'
done
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Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/26702
Change subject: kahlee: Set the SMI mask when initializing the ec
......................................................................
kahlee: Set the SMI mask when initializing the ec
Before this fix, the SMI mask would always be 0 when in depthcharge.
This is what rambi does: https://github.com/coreboot/coreboot/blob/master/src/mainboard/google/rambi…
I'm not sure why other boards don't need to do this.
DO NOT MERGE
There is an issue with entering S5 from an SMI handler. Merging this
will cause a reboot instead of a shutdown in depthcharge.
BUG=b:80295434
TEST=Built and observed the SMI mask while depthcharge is loading
SMI mask: 0x0000000000000001
SCI mask: 0x0000000000000000
Change-Id: Iad0ee76e289b6bbeb6d272df5ce6cfb2079c5647
Signed-off-by: Raul E Rangel <rrangel(a)chromium.org>
---
M src/mainboard/google/kahlee/ec.c
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/26702/1
diff --git a/src/mainboard/google/kahlee/ec.c b/src/mainboard/google/kahlee/ec.c
index d2933a6..4cdb391 100644
--- a/src/mainboard/google/kahlee/ec.c
+++ b/src/mainboard/google/kahlee/ec.c
@@ -22,6 +22,7 @@
static void ramstage_ec_init(void)
{
+ bool s3_wakeup = acpi_is_wakeup_s3();
const struct google_chromeec_event_info info = {
.log_events = MAINBOARD_EC_LOG_EVENTS,
.sci_events = MAINBOARD_EC_SCI_EVENTS,
@@ -32,6 +33,9 @@
printk(BIOS_DEBUG, "mainboard: EC init\n");
google_chromeec_events_init(&info, acpi_is_wakeup_s3());
+
+ if (!s3_wakeup)
+ google_chromeec_set_smi_mask(MAINBOARD_EC_SMI_EVENTS);
}
static void early_ec_init(void)
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