coreboot-gerrit March 2018

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by build bot (Jenkins) (Code Review) 17 Mar '18

17 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25258 ) Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/68724/ : SUCCESS -- To view, visit https://review.coreboot.org/25258 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 Gerrit-Change-Number: 25258 Gerrit-PatchSet: 3 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 17 Mar 2018 00:21:38 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by build bot (Jenkins) (Code Review) 17 Mar '18

17 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25258 ) Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... Patch Set 2: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-checkpatch/23116/ : ABORTED https://qa.coreboot.org/job/coreboot-gerrit/68723/ : FAILURE -- To view, visit https://review.coreboot.org/25258 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 Gerrit-Change-Number: 25258 Gerrit-PatchSet: 2 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 17 Mar 2018 00:17:37 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by Zhongze Hu (Code Review) 17 Mar '18

17 Mar '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/25258 to look at the new patch set (#3). Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... mb/google/fizz: Enable I2C bus 2 I2C bus 2 goes to the custom add-in card slot and it was disalbed cuase it was idle. Google CFM add-in card is going to use this I2C bus so it needs to be re-enabled. BUG=b:73006317 TEST=Tested with add-in card on fizz hardware and verified I2C bus 2 is working properly. Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 Signed-off-by: Zhongze Hu <frankhu(a)chromium.org> --- M src/mainboard/google/fizz/devicetree.cb 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/25258/3 -- To view, visit https://review.coreboot.org/25258 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 Gerrit-Change-Number: 25258 Gerrit-PatchSet: 3 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by build bot (Jenkins) (Code Review) 17 Mar '18

17 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25258 ) Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-checkpatch/23115/ : ABORTED https://qa.coreboot.org/job/coreboot-gerrit/68722/ : FAILURE -- To view, visit https://review.coreboot.org/25258 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 Gerrit-Change-Number: 25258 Gerrit-PatchSet: 1 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 17 Mar 2018 00:14:22 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by Zhongze Hu (Code Review) 17 Mar '18

17 Mar '18

Zhongze Hu has uploaded a new patch set (#2). ( https://review.coreboot.org/25258 ) Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... mb/google/fizz: Enable I2C bus 2 I2C bus 2 goes to the custom add-in card slot and it was disalbed cuase it was idle. Google CFM add-in card is going to use this I2C bus so it needs to be re-enabled. BUG=b:73006317 TEST=Tested with add-in card on fizz hardware and verified I2C bus 2 is working properly. Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 --- M src/mainboard/google/fizz/devicetree.cb 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/25258/2 -- To view, visit https://review.coreboot.org/25258 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 Gerrit-Change-Number: 25258 Gerrit-PatchSet: 2 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org>

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by Zhongze Hu (Code Review) 17 Mar '18

17 Mar '18

Zhongze Hu has uploaded this change for review. ( https://review.coreboot.org/25258 Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... mb/google/fizz: Enable I2C bus 2 I2C bus 2 goes to the custom add-in card slot and it was disalbed cuase it was idle. Google CFM add-in card is going to use this I2C bus so it needs to be re-enabled. BUG=b:73006317 TEST=Tested with add-in card on fizz hardware and verified I2C bus 2 is working properly. Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 --- M src/mainboard/google/fizz/devicetree.cb 1 file changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/25258/1 diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb index e7654cf..2b87e31 100644 --- a/src/mainboard/google/fizz/devicetree.cb +++ b/src/mainboard/google/fizz/devicetree.cb @@ -296,9 +296,9 @@ # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoDisabled, + [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoDisabled, - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, + [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoDisabled, [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoPci, @@ -329,9 +329,9 @@ device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem - device pci 15.0 off end # I2C #0 + device pci 15.0 on end # I2C #0 device pci 15.1 off end # I2C #1 - device pci 15.2 off end # I2C #2 + device pci 15.2 on end # I2C #2 device pci 15.3 off end # I2C #3 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 -- To view, visit https://review.coreboot.org/25258 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2c9b5a9323fd51872e340c35005c4a3432716808 Gerrit-Change-Number: 25258 Gerrit-PatchSet: 1 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org>

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by Zhongze Hu (Code Review) 17 Mar '18

17 Mar '18

Zhongze Hu has abandoned this change. ( https://review.coreboot.org/25257 ) Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/25257 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: Id5981a6cfc77cdeaea04dc505d77ca94eef98c37 Gerrit-Change-Number: 25257 Gerrit-PatchSet: 1 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by build bot (Jenkins) (Code Review) 17 Mar '18

17 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25257 ) Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/68721/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/23114/ : SUCCESS -- To view, visit https://review.coreboot.org/25257 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id5981a6cfc77cdeaea04dc505d77ca94eef98c37 Gerrit-Change-Number: 25257 Gerrit-PatchSet: 1 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 17 Mar 2018 00:00:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/zoombini: Enable NVMe
by build bot (Jenkins) (Code Review) 16 Mar '18

16 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25256 ) Change subject: mb/google/zoombini: Enable NVMe ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23113/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68720/ : SUCCESS -- To view, visit https://review.coreboot.org/25256 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I64ab38dda78345c1f3d7d3f2bf3cb04c19290ceb Gerrit-Change-Number: 25256 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 16 Mar 2018 23:53:05 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/fizz: Enable I2C bus 2
by Zhongze Hu (Code Review) 16 Mar '18

16 Mar '18

Zhongze Hu has uploaded this change for review. ( https://review.coreboot.org/25257 Change subject: mb/google/fizz: Enable I2C bus 2 ...................................................................... mb/google/fizz: Enable I2C bus 2 I2C bus 2 goes to the custom add-in card slot and it was disalbed cuase it was idle. Google CFM add-in card is going to use this I2C bus so it needs to be re-enabled. BUG=b:73006317 TEST=Tested with add-in card on fizz hardware and verified I2C bus 2 is working properly. BRANCH=fizz Change-Id: Id5981a6cfc77cdeaea04dc505d77ca94eef98c37 --- M 3rdparty/blobs M 3rdparty/chromeec M src/mainboard/google/fizz/devicetree.cb 3 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/25257/1 diff --git a/3rdparty/blobs b/3rdparty/blobs index a4b5613..19dea8d 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit a4b561391f59e09059ce851fa19b64ca945672d5 +Subproject commit 19dea8d171544f01f12ee6b78af0cc356ab994aa diff --git a/3rdparty/chromeec b/3rdparty/chromeec index 927b64a..9fb1038 160000 --- a/3rdparty/chromeec +++ b/3rdparty/chromeec @@ -1 +1 @@ -Subproject commit 927b64a0ba8f6362daf2e9a6c7eabf23815ae95a +Subproject commit 9fb10386a720d270e37ce61da3ff3a6d5a69951e diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb index e7654cf..2b87e31 100644 --- a/src/mainboard/google/fizz/devicetree.cb +++ b/src/mainboard/google/fizz/devicetree.cb @@ -296,9 +296,9 @@ # Must leave UART0 enabled or SD/eMMC will not work as PCI register "SerialIoDevMode" = "{ - [PchSerialIoIndexI2C0] = PchSerialIoDisabled, + [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoDisabled, - [PchSerialIoIndexI2C2] = PchSerialIoDisabled, + [PchSerialIoIndexI2C2] = PchSerialIoPci, [PchSerialIoIndexI2C3] = PchSerialIoDisabled, [PchSerialIoIndexI2C4] = PchSerialIoDisabled, [PchSerialIoIndexI2C5] = PchSerialIoPci, @@ -329,9 +329,9 @@ device pci 14.0 on end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) device pci 14.2 on end # Thermal Subsystem - device pci 15.0 off end # I2C #0 + device pci 15.0 on end # I2C #0 device pci 15.1 off end # I2C #1 - device pci 15.2 off end # I2C #2 + device pci 15.2 on end # I2C #2 device pci 15.3 off end # I2C #3 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 -- To view, visit https://review.coreboot.org/25257 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Id5981a6cfc77cdeaea04dc505d77ca94eef98c37 Gerrit-Change-Number: 25257 Gerrit-PatchSet: 1 Gerrit-Owner: Zhongze Hu <frankhu(a)chromium.org>

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coreboot-gerrit March 2018