Zhuohao Lee has uploaded this change for review. ( https://review.coreboot.org/25252
Change subject: mb/google/poppy/variants/nami: change type of board_sku_id() to uint32_t
......................................................................
mb/google/poppy/variants/nami: change type of board_sku_id() to uint32_t
Tools/scripts, like mosys/arc-setup, use int(4 bytes) to
read the sku id. In order to support "-1", we need to use
uint32_t(4 bytes) instead of using uint16_t(2 bytes) data type.
Otherwise, tools/scripts will read 65535 instead of -1.
Another reason to change this is that sku_id can be
supported by ec up to 4 bytes.
BUG=b:73792190
TEST=mosys output "Platform not Supported" for -1 sku id
arc-setup read -1 sku id
Change-Id: Ib3baa8419f138abeb412ac09c2e7dc608e3b758b
Signed-off-by: Zhuohao Lee <zhuohao(a)chromium.org>
---
M src/mainboard/google/poppy/variants/nami/mainboard.c
1 file changed, 8 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/25252/1
diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c
index e2bc895..191267b 100644
--- a/src/mainboard/google/poppy/variants/nami/mainboard.c
+++ b/src/mainboard/google/poppy/variants/nami/mainboard.c
@@ -23,20 +23,22 @@
#include <soc/ramstage.h>
#include <string.h>
-#define SKU_UNKNOWN 0xFFFF
+#define SKU_UNKNOWN 0xFFFFFFFF
#define SKU_0_NAMI 0x3A7B
#define SKU_1_VAYNE 0x3A63
#define SKU_2_VAYNE 0x3A7F
-static uint16_t board_sku_id(void)
+static uint32_t board_sku_id(void)
{
- static int sku_id = -1;
+ static uint32_t sku_id = SKU_UNKNOWN;
uint32_t id;
- if (sku_id >= 0)
+
+ if (sku_id != SKU_UNKNOWN)
return sku_id;
if (google_chromeec_cbi_get_sku_id(&id))
return SKU_UNKNOWN;
sku_id = id;
+
return sku_id;
}
@@ -57,9 +59,9 @@
const char *smbios_mainboard_sku(void)
{
- static char sku_str[9]; /* sku{0..65535} (basically up to FFFF) */
+ static char sku_str[14]; /* sku{0..4294967295} */
- snprintf(sku_str, sizeof(sku_str), "sku%d", board_sku_id());
+ snprintf(sku_str, sizeof(sku_str), "sku%u", board_sku_id());
return sku_str;
}
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Ib3baa8419f138abeb412ac09c2e7dc608e3b758b
Gerrit-Change-Number: 25252
Gerrit-PatchSet: 1
Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org>
Shelley Chen has uploaded this change for review. ( https://review.coreboot.org/25251
Change subject: mb/google/fizz: Enable VMX
......................................................................
mb/google/fizz: Enable VMX
We are enabling at the kernel level, but that is triggering an issue
where FSP expects it to be disabled so it forces a cold reboot on
every warm reboot, clearing the ramoops logs. Enabling in BIOS so it
matches what the kernel expects.
This is the same change that were done for eve:
https://review.coreboot.org/#/c/22449/
BUG=None
BRANCH=None
TEST=echo PANIC > /sys/kernel/debug/provoke-crash/DIRECT
check for /dev/pstore/console-ramoops
Change-Id: Icd0bd01f5aee4c89f503eebba0808a1f3059e739
Signed-off-by: Shelley Chen <shchen(a)chromium.org>
---
M src/mainboard/google/fizz/devicetree.cb
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/25251/1
diff --git a/src/mainboard/google/fizz/devicetree.cb b/src/mainboard/google/fizz/devicetree.cb
index e7654cf..d5ee04f 100644
--- a/src/mainboard/google/fizz/devicetree.cb
+++ b/src/mainboard/google/fizz/devicetree.cb
@@ -89,6 +89,7 @@
register "PmConfigSlpAMinAssert" = "3" # 2s
register "PmTimerDisabled" = "1"
register "SendVrMbxCmd" = "1" # IMVP8 workaround
+ register "VmxEnable" = "1"
# Intersil VR c-state issue workaround
# send VR mailbox command for IA/GT/SA rails
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: Icd0bd01f5aee4c89f503eebba0808a1f3059e739
Gerrit-Change-Number: 25251
Gerrit-PatchSet: 1
Gerrit-Owner: Shelley Chen <shchen(a)google.com>