coreboot-gerrit November 2018

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Change in coreboot[master]: src: Add required space after "switch"
by Patrick Georgi (Code Review) 19 Nov '18

19 Nov '18

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/29623 ) Change subject: src: Add required space after "switch" ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29623 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I85cf93e30606bc7838852bd300a369e79370629a Gerrit-Change-Number: 29623 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Nov 2018 08:17:05 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: Documentation: Add W530 / T530
by Patrick Georgi (Code Review) 19 Nov '18

19 Nov '18

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/29685 ) Change subject: Documentation: Add W530 / T530 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29685 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib253308737f8c7a497c6ca13eab88220b1ac27ad Gerrit-Change-Number: 29685 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Marcello Sylvester Bauer <marcello.bauer(a)9elements.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Evgeny Zinoviev <me(a)ch1p.com> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Mon, 19 Nov 2018 08:15:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support
by Frans Hendriks (Code Review) 19 Nov '18

19 Nov '18

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/29662 ) Change subject: soc/intel/braswell: Add C_ENVIRONMENT_BOOTBLOCK support ...................................................................... Patch Set 2: > Patch Set 2: > > (2 comments) > > I don't see where C_ENVIRONMENT_BOOTBLOCK is selected. Is it part of another commit ? Used it in portwell M107 configuration. Initial version of this board is waiting for review/commit. Updated version will contain support C_ENVIRONMENT_BOOTBLOCK. -- To view, visit https://review.coreboot.org/29662 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iab48ad72f1514c93f20d70db5ef4fd8fa2383e8c Gerrit-Change-Number: 29662 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Mon, 19 Nov 2018 08:05:45 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/braswell: Disable OS use of HPET
by Frans Hendriks (Code Review) 19 Nov '18

19 Nov '18

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/29655 ) Change subject: soc/intel/braswell: Disable OS use of HPET ...................................................................... Patch Set 3: > Patch Set 3: > > with what payload/distro/kernel(s) are you seeing the 'MP-BIOS bug: 8254 timer not connected to IO-APIC' issue? I'm not seeing that with Braswell ChromeOS devices using Tianocore and booting Ubuntu (and derivatives) w/kernels 4.9+. Linux reports the HPET is the current clock source, and no error in dmesg. This occurs with Embedded Linux Ubuntu 4.15. In Intel EDS is mentioned that HPET does not work with 25MHz LPC clock. Please not that actual coreboot does not enable Local APIC and IO-APIC! -- To view, visit https://review.coreboot.org/29655 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie9a78dcc736eb057c040a0a303c812adb1f76f3c Gerrit-Change-Number: 29655 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Nov 2018 07:43:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: nb/intel/haswell: Move MMCONF_BASE_ADDRESS to northbridge Kconfig
by Tristan Corrick (Code Review) 19 Nov '18

19 Nov '18

Tristan Corrick has posted comments on this change. ( https://review.coreboot.org/28603 ) Change subject: nb/intel/haswell: Move MMCONF_BASE_ADDRESS to northbridge Kconfig ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/28603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I44f27405fc8ccbe54c7d19b70327da866390a156 Gerrit-Change-Number: 28603 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Tristan Corrick <tristan(a)corrick.kiwi> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 19 Nov 2018 02:03:17 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/.../Kconfig: Move GPIO debug option into debug menu
by Nico Huber (Code Review) 18 Nov '18

18 Nov '18

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/29678 ) Change subject: soc/intel/.../Kconfig: Move GPIO debug option into debug menu ...................................................................... soc/intel/.../Kconfig: Move GPIO debug option into debug menu Rename DEBUG_SOC_COMMON_BLOCK_GPIO to DEBUG_GPIO and move it into the Debugging menu. Change-Id: I737d0ee7fb5423b6d16d611a144d43fd3f168a2c Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/29678 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/Kconfig M src/soc/intel/common/block/gpio/Kconfig M src/soc/intel/common/block/gpio/gpio.c M src/soc/intel/denverton_ns/Kconfig 4 files changed, 11 insertions(+), 10 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved diff --git a/src/Kconfig b/src/Kconfig index 0b97125..ce584f5 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -693,6 +693,13 @@ help If enabled, coreboot will call hlt() on a BUG() or failed ASSERT(). +config HAVE_DEBUG_GPIO + bool + +config DEBUG_GPIO + bool "Output verbose GPIO debug messages" + depends on HAVE_DEBUG_GPIO + config DEBUG_CBFS bool "Output verbose CBFS debug messages" default n diff --git a/src/soc/intel/common/block/gpio/Kconfig b/src/soc/intel/common/block/gpio/Kconfig index 66cc182..bdbc323 100644 --- a/src/soc/intel/common/block/gpio/Kconfig +++ b/src/soc/intel/common/block/gpio/Kconfig @@ -1,15 +1,9 @@ config SOC_INTEL_COMMON_BLOCK_GPIO bool + select HAVE_DEBUG_GPIO help Intel Processor common GPIO support -config DEBUG_SOC_COMMON_BLOCK_GPIO - depends on SOC_INTEL_COMMON_BLOCK_GPIO - bool "Output verbose GPIO debug messages" - default n - help - This option enables GPIO debug messages - # Use to program Interrupt Polarity Control (IPCx) register # Each bit represents IRQx Active High Polarity Disable configuration: # when set to 1, the interrupt polarity associated with IRQx is inverted diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index bd12477..9b6ca7e 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -265,7 +265,7 @@ soc_pad_conf &= mask[i]; soc_pad_conf |= pad_conf & ~mask[i]; - if (IS_ENABLED(CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO)) + if (IS_ENABLED(CONFIG_DEBUG_GPIO)) printk(BIOS_DEBUG, "gpio_padcfg [0x%02x, %02zd] DW%d [0x%08x : 0x%08x" " : 0x%08x]\n", @@ -533,7 +533,7 @@ MISCCFG_GPE0_DW1_MASK | MISCCFG_GPE0_DW0_MASK); - if (IS_ENABLED(CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO)) + if (IS_ENABLED(CONFIG_DEBUG_GPIO)) printk(BIOS_DEBUG, "misccfg_mask:%x misccfg_value:%x\n", misccfg_mask, misccfg_value); comm = soc_gpio_get_community(&gpio_communities); diff --git a/src/soc/intel/denverton_ns/Kconfig b/src/soc/intel/denverton_ns/Kconfig index fd31e51..d4ae805 100644 --- a/src/soc/intel/denverton_ns/Kconfig +++ b/src/soc/intel/denverton_ns/Kconfig @@ -29,6 +29,7 @@ select BOOTBLOCK_CONSOLE select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH select BOOT_DEVICE_SUPPORTS_WRITES + select DEBUG_GPIO select POSTCAR_CONSOLE select SOC_INTEL_COMMON select SOC_INTEL_COMMON_RESET @@ -50,7 +51,6 @@ # select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_FAST_SPI select SOC_INTEL_COMMON_BLOCK_GPIO - select DEBUG_SOC_COMMON_BLOCK_GPIO select SOC_INTEL_COMMON_BLOCK_PCR select TSC_CONSTANT_RATE select TSC_MONOTONIC_TIMER -- To view, visit https://review.coreboot.org/29678 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I737d0ee7fb5423b6d16d611a144d43fd3f168a2c Gerrit-Change-Number: 29678 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: Kconfig: Unify power-after-failure options
by Nico Huber (Code Review) 18 Nov '18

18 Nov '18

Nico Huber has posted comments on this change. ( https://review.coreboot.org/29680 ) Change subject: Kconfig: Unify power-after-failure options ...................................................................... Patch Set 1: (1 comment) > still src/mainboard/asrock/h81m-hds/Kconfig ? Thanks, sneaked into the rebase. https://review.coreboot.org/#/c/29680/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/29680/1//COMMIT_MSG@15 PS1, Line 15: S1 > Isn't S1 Suspend to RAM? Shouldn't this be S0? Typo, thanks. -- To view, visit https://review.coreboot.org/29680 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0 Gerrit-Change-Number: 29680 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 18 Nov 2018 21:00:33 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/common/*/Kconfig: Remove redundant comments
by Nico Huber (Code Review) 18 Nov '18

18 Nov '18

Nico Huber has submitted this change and it was merged. ( https://review.coreboot.org/29677 ) Change subject: soc/intel/common/*/Kconfig: Remove redundant comments ...................................................................... soc/intel/common/*/Kconfig: Remove redundant comments Change-Id: Ide9608e487793fa4a8b0e291ba168126e0484355 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/29677 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Subrata Banik <subrata.banik(a)intel.com> Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/common/block/Kconfig M src/soc/intel/common/pch/Kconfig 2 files changed, 0 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Subrata Banik: Looks good to me, approved Angel Pons: Looks good to me, approved diff --git a/src/soc/intel/common/block/Kconfig b/src/soc/intel/common/block/Kconfig index e5375d2..80e5c66 100644 --- a/src/soc/intel/common/block/Kconfig +++ b/src/soc/intel/common/block/Kconfig @@ -5,7 +5,6 @@ if SOC_INTEL_COMMON_BLOCK -comment "Intel SoC Common IP Code" source "src/soc/intel/common/block/*/Kconfig" endif diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig index 2bf6d68..f4f3ad0 100644 --- a/src/soc/intel/common/pch/Kconfig +++ b/src/soc/intel/common/pch/Kconfig @@ -12,7 +12,6 @@ if SOC_INTEL_COMMON_PCH_BASE -comment "Intel SoC Common PCH Code" source "src/soc/intel/common/pch/*/Kconfig" config PCH_SPECIFIC_OPTIONS -- To view, visit https://review.coreboot.org/29677 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Ide9608e487793fa4a8b0e291ba168126e0484355 Gerrit-Change-Number: 29677 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/intel/haswell: Move MMCONF_BASE_ADDRESS to northbridge Kconfig
by Arthur Heymans (Code Review) 18 Nov '18

18 Nov '18

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/28603 ) Change subject: nb/intel/haswell: Move MMCONF_BASE_ADDRESS to northbridge Kconfig ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/28603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I44f27405fc8ccbe54c7d19b70327da866390a156 Gerrit-Change-Number: 28603 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 18 Nov 2018 19:24:45 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: nb/intel/haswell: Move MMCONF_BASE_ADDRESS to northbridge Kconfig
by Elyes HAOUAS (Code Review) 18 Nov '18

18 Nov '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28603 to look at the new patch set (#2). Change subject: nb/intel/haswell: Move MMCONF_BASE_ADDRESS to northbridge Kconfig ...................................................................... nb/intel/haswell: Move MMCONF_BASE_ADDRESS to northbridge Kconfig Change-Id: I44f27405fc8ccbe54c7d19b70327da866390a156 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/asrock/h81m-hds/Kconfig M src/mainboard/google/beltino/Kconfig M src/mainboard/google/slippy/Kconfig M src/mainboard/intel/baskingridge/Kconfig M src/northbridge/intel/haswell/Kconfig 5 files changed, 4 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/28603/2 -- To view, visit https://review.coreboot.org/28603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I44f27405fc8ccbe54c7d19b70327da866390a156 Gerrit-Change-Number: 28603 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit November 2018