coreboot-gerrit November 2018

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Change in ...coreboot[master]: mb/intel/icelake_rvp: Add USB port capablity information
by Aamir Bohra (Code Review) 22 Nov '18

22 Nov '18

Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29792 Change subject: mb/intel/icelake_rvp: Add USB port capablity information ...................................................................... mb/intel/icelake_rvp: Add USB port capablity information This implementation adds USB port capablity map for ICL-U and ICL-Y RVP. Change-Id: I20bb43c47439df0a25ff148eae2b3e0546e4bc63 Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/mainboard/intel/icelake_rvp/Kconfig M src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb M src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb 3 files changed, 177 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/29792/1 diff --git a/src/mainboard/intel/icelake_rvp/Kconfig b/src/mainboard/intel/icelake_rvp/Kconfig index 66957aa..ecab319 100644 --- a/src/mainboard/intel/icelake_rvp/Kconfig +++ b/src/mainboard/intel/icelake_rvp/Kconfig @@ -10,6 +10,7 @@ select GENERIC_SPD_BIN select DRIVERS_I2C_HID select DRIVERS_I2C_GENERIC + select DRIVERS_USB_ACPI select SOC_INTEL_ICELAKE config MAINBOARD_DIR diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb index 603be42..3f186cb 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_u/devicetree.cb @@ -99,7 +99,94 @@ device pci 12.0 on end # Thermal Subsystem device pci 12.5 off end # UFS SCS device pci 12.6 off end # GSPI #2 - device pci 14.0 on end # USB xHCI + device pci 14.0 on + chip drivers/usb/acpi + register "desc" = ""Root Hub"" + register "type" = "UPC_TYPE_HUB" + device usb 0.0 on + chip drivers/usb/acpi + register "desc" = ""USB3/2 Type-A Left Lower"" + register "type" = "UPC_TYPE_A" + device usb 2.0 on end + end + chip drivers/usb/acpi + register "desc" = ""WWAN"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 2.1 on end + end + chip drivers/usb/acpi + register "desc" = ""Bluetooth"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 2.2 on end + end + chip drivers/usb/acpi + register "desc" = ""USB C Connector 1"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + device usb 2.3 on end + end + chip drivers/usb/acpi + register "desc" = ""USB C Connector 2"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + device usb 2.4 on end + end + chip drivers/usb/acpi + register "desc" = ""USB C Connector 3"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + device usb 2.5 on end + end + chip drivers/usb/acpi + register "desc" = ""USB C Connector 4"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + device usb 2.6 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3/2 Type-A Left Upper"" + register "type" = "UPC_TYPE_A" + device usb 2.7 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Right Lower"" + register "type" = "UPC_TYPE_A" + device usb 2.8 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Right Upper"" + register "type" = "UPC_TYPE_A" + device usb 2.9 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3/2 Type-A Left Lower"" + register "type" = "UPC_TYPE_A" + device usb 3.0 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3/2 Type-A Left Upper"" + register "type" = "UPC_TYPE_A" + device usb 3.1 on end + end + chip drivers/usb/acpi + register "desc" = ""WLAN"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 3.2 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Port Unused1"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 3.3 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Port Unused2"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 3.4 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Port Unused3"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 3.5 on end + end + end + end + end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) chip drivers/intel/wifi register "wake" = "GPE0_PME_B0" diff --git a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb index a1e64ee..c610469 100644 --- a/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb +++ b/src/mainboard/intel/icelake_rvp/variants/icl_y/devicetree.cb @@ -83,7 +83,94 @@ device pci 12.0 on end # Thermal Subsystem device pci 12.5 off end # UFS SCS device pci 12.6 off end # GSPI #2 - device pci 14.0 on end # USB xHCI + device pci 14.0 on + chip drivers/usb/acpi + register "desc" = ""Root Hub"" + register "type" = "UPC_TYPE_HUB" + device usb 0.0 on + chip drivers/usb/acpi + register "desc" = ""USB3-2 Type-A Left Lower"" + register "type" = "UPC_TYPE_A" + device usb 2.0 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3-2 Type-A Left Upper"" + register "type" = "UPC_TYPE_A" + device usb 2.1 on end + end + chip drivers/usb/acpi + register "desc" = ""Bluetooth"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 2.2 on end + end + chip drivers/usb/acpi + register "desc" = ""USB C Connector 1"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + device usb 2.3 on end + end + chip drivers/usb/acpi + register "desc" = ""USB C Connector 2"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + device usb 2.4 on end + end + chip drivers/usb/acpi + register "desc" = ""USB C Connector 3"" + register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" + device usb 2.5 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Port Unused 1"" + register "type" = "UPC_TYPE_UNUSED" + device usb 2.6 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Port Unused 2"" + register "type" = "UPC_TYPE_UNUSED" + device usb 2.7 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Right Lower"" + register "type" = "UPC_TYPE_A" + device usb 2.8 on end + end + chip drivers/usb/acpi + register "desc" = ""USB2 Type-A Right Upper"" + register "type" = "UPC_TYPE_A" + device usb 2.9 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3/2 Type-A Left Lower"" + register "type" = "UPC_TYPE_A" + device usb 3.0 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3/2 Type-A Left Upper"" + register "type" = "UPC_TYPE_A" + device usb 3.1 on end + end + chip drivers/usb/acpi + register "desc" = ""WLAN"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 3.2 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Port Unused1"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 3.3 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Port Unused2"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 3.4 on end + end + chip drivers/usb/acpi + register "desc" = ""USB3 Port Unused3"" + register "type" = "UPC_TYPE_INTERNAL" + device usb 3.5 on end + end + end + end + end # USB xHCI device pci 14.1 off end # USB xDCI (OTG) chip drivers/intel/wifi register "wake" = "GPE0_PME_B0" -- To view, visit https://review.coreboot.org/c/coreboot/+/29792 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20bb43c47439df0a25ff148eae2b3e0546e4bc63 Gerrit-Change-Number: 29792 Gerrit-PatchSet: 1 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/pcengines/apu1/romstage.c: Add possibility to redirect output to COM2
by Michał Żygowski (Code Review) 22 Nov '18

22 Nov '18

Michał Żygowski has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29791 Change subject: mb/pcengines/apu1/romstage.c: Add possibility to redirect output to COM2 ...................................................................... mb/pcengines/apu1/romstage.c: Add possibility to redirect output to COM2 Enable COM2 port on SuperIO if UART index is 1. This change allows to use full RS232 COM1 port for different purposes when COM2 is selected as main port. Signed-off-by: Michał Żygowski <michal.zygowski(a)3mdeb.com> Change-Id: I1e72c5a43a302658f86dafd863e5a67580eae3e4 --- M src/mainboard/pcengines/apu1/romstage.c 1 file changed, 16 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/29791/1 diff --git a/src/mainboard/pcengines/apu1/romstage.c b/src/mainboard/pcengines/apu1/romstage.c index ab48943..fb56e8e 100644 --- a/src/mainboard/pcengines/apu1/romstage.c +++ b/src/mainboard/pcengines/apu1/romstage.c @@ -21,9 +21,11 @@ #include <superio/nuvoton/nct5104d/nct5104d.h> #include "gpio_ftns.h" #include <SB800.h> +#include <build.h> #define SIO_PORT 0x2e -#define SERIAL_DEV PNP_DEV(SIO_PORT, NCT5104D_SP1) +#define SERIAL1_DEV PNP_DEV(SIO_PORT, NCT5104D_SP1) +#define SERIAL2_DEV PNP_DEV(SIO_PORT, NCT5104D_SP2) static void early_lpc_init(void) { @@ -60,6 +62,18 @@ void board_BeforeAgesa(struct sysinfo *cb) { + pci_devfn_t dev; + u32 data; + early_lpc_init(); - nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); + + dev = PCI_DEV(0, 0x14, 3); + data = pci_read_config32(dev, 0x48); + /* enable 0x2e/0x4e IO decoding before configuring SuperIO */ + pci_write_config32(dev, 0x48, data | 3); + + if (CONFIG_UART_FOR_CONSOLE == 1) + nuvoton_enable_serial(SERIAL2_DEV, CONFIG_TTYS0_BASE); + else if (CONFIG_UART_FOR_CONSOLE == 0) + nuvoton_enable_serial(SERIAL1_DEV, CONFIG_TTYS0_BASE); } -- To view, visit https://review.coreboot.org/c/coreboot/+/29791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1e72c5a43a302658f86dafd863e5a67580eae3e4 Gerrit-Change-Number: 29791 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/google/fizz/variants/karma: Disable SD controller and update GPIO
by Zhuohao Lee (Code Review) 22 Nov '18

22 Nov '18

Zhuohao Lee has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29765 ) Change subject: mb/google/fizz/variants/karma: Disable SD controller and update GPIO ...................................................................... Patch Set 3: (2 comments) https://review.coreboot.org/#/c/29765/3/src/mainboard/google/fizz/variants/… File src/mainboard/google/fizz/variants/baseboard/devicetree.cb: https://review.coreboot.org/#/c/29765/3/src/mainboard/google/fizz/variants/… PS3, Line 258: Do we need to move this to fizz/overridetree.cb? https://review.coreboot.org/#/c/29765/3/src/mainboard/google/fizz/variants/… PS3, Line 268: Same here? -- To view, visit https://review.coreboot.org/c/coreboot/+/29765 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8015fe35a4ff79469b5781942f588c3e1b88b751 Gerrit-Change-Number: 29765 Gerrit-PatchSet: 3 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 22 Nov 2018 09:48:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb: Bring up DSDT and SSDT to current revision
by HAOUAS Elyes (Code Review) 22 Nov '18

22 Nov '18

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29790 Change subject: mb: Bring up DSDT and SSDT to current revision ...................................................................... mb: Bring up DSDT and SSDT to current revision Current revision for DSDT and SSDT is 0x02. Change-Id: I060e07a730e721df4a86128ee89bfe168c69f31e Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/acpi/debug.asl M src/mainboard/advansus/a785e-i/acpi/cpstate.asl M src/mainboard/advansus/a785e-i/acpi/routing.asl M src/mainboard/advansus/a785e-i/acpi/usb.asl M src/mainboard/amd/bettong/acpi/routing.asl M src/mainboard/amd/bettong/acpi/usb_oc.asl M src/mainboard/amd/bimini_fam10/acpi/cpstate.asl M src/mainboard/amd/bimini_fam10/acpi/routing.asl M src/mainboard/amd/bimini_fam10/acpi/usb.asl M src/mainboard/amd/db-ft3b-lc/acpi/routing.asl M src/mainboard/amd/db-ft3b-lc/acpi/usb_oc.asl M src/mainboard/amd/gardenia/acpi/routing.asl M src/mainboard/amd/gardenia/acpi/usb_oc.asl M src/mainboard/amd/inagua/acpi/routing.asl M src/mainboard/amd/inagua/acpi/usb_oc.asl M src/mainboard/amd/mahogany_fam10/acpi/cpstate.asl M src/mainboard/amd/mahogany_fam10/acpi/routing.asl M src/mainboard/amd/mahogany_fam10/acpi/usb.asl M src/mainboard/amd/olivehill/acpi/routing.asl M src/mainboard/amd/olivehill/acpi/usb_oc.asl M src/mainboard/amd/olivehillplus/acpi/routing.asl M src/mainboard/amd/olivehillplus/acpi/usb_oc.asl M src/mainboard/amd/persimmon/acpi/routing.asl M src/mainboard/amd/persimmon/acpi/usb_oc.asl M src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl M src/mainboard/amd/serengeti_cheetah_fam10/ssdt2.asl M src/mainboard/amd/serengeti_cheetah_fam10/ssdt3.asl M src/mainboard/amd/serengeti_cheetah_fam10/ssdt4.asl M src/mainboard/amd/serengeti_cheetah_fam10/ssdt5.asl M src/mainboard/amd/south_station/acpi/routing.asl M src/mainboard/amd/south_station/acpi/usb_oc.asl M src/mainboard/amd/thatcher/acpi/cpstate.asl M src/mainboard/amd/tilapia_fam10/acpi/cpstate.asl M src/mainboard/amd/tilapia_fam10/acpi/routing.asl M src/mainboard/amd/tilapia_fam10/acpi/usb.asl M src/mainboard/amd/torpedo/acpi/routing.asl M src/mainboard/amd/union_station/acpi/routing.asl M src/mainboard/amd/union_station/acpi/usb_oc.asl M src/mainboard/asrock/e350m1/acpi/routing.asl M src/mainboard/asrock/e350m1/acpi/usb_oc.asl M src/mainboard/asrock/imb-a180/acpi/routing.asl M src/mainboard/asrock/imb-a180/acpi/usb_oc.asl M src/mainboard/asus/f2a85-m/acpi/cpstate.asl M src/mainboard/asus/m4a78-em/acpi/cpstate.asl M src/mainboard/asus/m4a78-em/acpi/routing.asl M src/mainboard/asus/m4a78-em/acpi/usb.asl M src/mainboard/asus/m4a785-m/acpi/cpstate.asl M src/mainboard/asus/m4a785-m/acpi/routing.asl M src/mainboard/asus/m4a785-m/acpi/usb.asl M src/mainboard/asus/m4a785t-m/acpi/cpstate.asl M src/mainboard/asus/m4a785t-m/acpi/routing.asl M src/mainboard/asus/m4a785t-m/acpi/usb.asl M src/mainboard/asus/m5a88-v/acpi/cpstate.asl M src/mainboard/asus/m5a88-v/acpi/routing.asl M src/mainboard/asus/m5a88-v/acpi/usb.asl M src/mainboard/asus/p2b-ls/dsdt.asl M src/mainboard/asus/p2b/dsdt.asl M src/mainboard/avalue/eax-785e/acpi/cpstate.asl M src/mainboard/avalue/eax-785e/acpi/routing.asl M src/mainboard/avalue/eax-785e/acpi/usb.asl M src/mainboard/bap/ode_e20XX/acpi/routing.asl M src/mainboard/bap/ode_e20XX/acpi/usb_oc.asl M src/mainboard/bap/ode_e21XX/acpi/routing.asl M src/mainboard/bap/ode_e21XX/acpi/usb_oc.asl M src/mainboard/biostar/a68n_5200/acpi/routing.asl M src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl M src/mainboard/biostar/am1ml/acpi/routing.asl M src/mainboard/biostar/am1ml/acpi/usb_oc.asl M src/mainboard/elmex/pcm205400/acpi/routing.asl M src/mainboard/elmex/pcm205400/acpi/usb_oc.asl M src/mainboard/gigabyte/ma785gm/acpi/cpstate.asl M src/mainboard/gigabyte/ma785gm/acpi/routing.asl M src/mainboard/gigabyte/ma785gm/acpi/usb.asl M src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl M src/mainboard/gigabyte/ma785gmt/acpi/routing.asl M src/mainboard/gigabyte/ma785gmt/acpi/usb.asl M src/mainboard/gigabyte/ma78gm/acpi/cpstate.asl M src/mainboard/gigabyte/ma78gm/acpi/routing.asl M src/mainboard/gigabyte/ma78gm/acpi/usb.asl M src/mainboard/gizmosphere/gizmo/acpi/routing.asl M src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl M src/mainboard/gizmosphere/gizmo2/acpi/routing.asl M src/mainboard/gizmosphere/gizmo2/acpi/usb_oc.asl M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl M src/mainboard/hp/abm/acpi/routing.asl M src/mainboard/hp/abm/acpi/usb_oc.asl M src/mainboard/iei/kino-780am2-fam10/acpi/cpstate.asl M src/mainboard/iei/kino-780am2-fam10/acpi/routing.asl M src/mainboard/iei/kino-780am2-fam10/acpi/usb.asl M src/mainboard/jetway/nf81-t56n-lf/acpi/routing.asl M src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl M src/mainboard/jetway/pa78vm5/acpi/cpstate.asl M src/mainboard/jetway/pa78vm5/acpi/routing.asl M src/mainboard/jetway/pa78vm5/acpi/usb.asl M src/mainboard/lippert/frontrunner-af/acpi/routing.asl M src/mainboard/lippert/frontrunner-af/acpi/usb.asl M src/mainboard/lippert/toucan-af/acpi/routing.asl M src/mainboard/lippert/toucan-af/acpi/usb.asl M src/mainboard/msi/ms7721/acpi/cpstate.asl M src/mainboard/msi/ms9652_fam10/dsdt.asl M src/mainboard/pcengines/apu1/acpi/routing.asl M src/mainboard/pcengines/apu1/acpi/usb_oc.asl M src/mainboard/pcengines/apu2/acpi/routing.asl M src/mainboard/pcengines/apu2/acpi/usb_oc.asl M src/mainboard/supermicro/h8scm_fam10/acpi/cpstate.asl M src/mainboard/supermicro/h8scm_fam10/acpi/routing.asl M src/mainboard/supermicro/h8scm_fam10/acpi/usb.asl 107 files changed, 109 insertions(+), 109 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/29790/1 diff --git a/src/arch/x86/acpi/debug.asl b/src/arch/x86/acpi/debug.asl index 44c37bb..daad579 100644 --- a/src/arch/x86/acpi/debug.asl +++ b/src/arch/x86/acpi/debug.asl @@ -17,9 +17,9 @@ DefinitionBlock ( "DSDT.AML", "DSDT", - 0x01, - "XXXXXX", - "XXXXXXXX", + 0x02, + "COREv4", + "COREBOOT", 0x00010001 ) { diff --git a/src/mainboard/advansus/a785e-i/acpi/cpstate.asl b/src/mainboard/advansus/a785e-i/acpi/cpstate.asl index afba4ff..34c1e47 100644 --- a/src/mainboard/advansus/a785e-i/acpi/cpstate.asl +++ b/src/mainboard/advansus/a785e-i/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/advansus/a785e-i/acpi/routing.asl b/src/mainboard/advansus/a785e-i/acpi/routing.asl index 2d57bc5..0fe4548 100644 --- a/src/mainboard/advansus/a785e-i/acpi/routing.asl +++ b/src/mainboard/advansus/a785e-i/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/advansus/a785e-i/acpi/usb.asl b/src/mainboard/advansus/a785e-i/acpi/usb.asl index 0f8ca9c..2fae325 100644 --- a/src/mainboard/advansus/a785e-i/acpi/usb.asl +++ b/src/mainboard/advansus/a785e-i/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/bettong/acpi/routing.asl b/src/mainboard/amd/bettong/acpi/routing.asl index bcf0e90..866ca00 100644 --- a/src/mainboard/amd/bettong/acpi/routing.asl +++ b/src/mainboard/amd/bettong/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/bettong/acpi/usb_oc.asl b/src/mainboard/amd/bettong/acpi/usb_oc.asl index 9dae253..323bf00 100644 --- a/src/mainboard/amd/bettong/acpi/usb_oc.asl +++ b/src/mainboard/amd/bettong/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/bimini_fam10/acpi/cpstate.asl b/src/mainboard/amd/bimini_fam10/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/amd/bimini_fam10/acpi/cpstate.asl +++ b/src/mainboard/amd/bimini_fam10/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/amd/bimini_fam10/acpi/routing.asl b/src/mainboard/amd/bimini_fam10/acpi/routing.asl index aa50111..b5c7129 100644 --- a/src/mainboard/amd/bimini_fam10/acpi/routing.asl +++ b/src/mainboard/amd/bimini_fam10/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/bimini_fam10/acpi/usb.asl b/src/mainboard/amd/bimini_fam10/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/amd/bimini_fam10/acpi/usb.asl +++ b/src/mainboard/amd/bimini_fam10/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/db-ft3b-lc/acpi/routing.asl b/src/mainboard/amd/db-ft3b-lc/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/amd/db-ft3b-lc/acpi/routing.asl +++ b/src/mainboard/amd/db-ft3b-lc/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/db-ft3b-lc/acpi/usb_oc.asl b/src/mainboard/amd/db-ft3b-lc/acpi/usb_oc.asl index 1643fe7..9e40a8a 100644 --- a/src/mainboard/amd/db-ft3b-lc/acpi/usb_oc.asl +++ b/src/mainboard/amd/db-ft3b-lc/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/gardenia/acpi/routing.asl b/src/mainboard/amd/gardenia/acpi/routing.asl index 51cb612..17953d7 100644 --- a/src/mainboard/amd/gardenia/acpi/routing.asl +++ b/src/mainboard/amd/gardenia/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/gardenia/acpi/usb_oc.asl b/src/mainboard/amd/gardenia/acpi/usb_oc.asl index 9566bc4..39c4265 100644 --- a/src/mainboard/amd/gardenia/acpi/usb_oc.asl +++ b/src/mainboard/amd/gardenia/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/inagua/acpi/routing.asl b/src/mainboard/amd/inagua/acpi/routing.asl index 8bd3e4d..78cd069 100644 --- a/src/mainboard/amd/inagua/acpi/routing.asl +++ b/src/mainboard/amd/inagua/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/inagua/acpi/usb_oc.asl b/src/mainboard/amd/inagua/acpi/usb_oc.asl index 6e9c701..8f5867e 100644 --- a/src/mainboard/amd/inagua/acpi/usb_oc.asl +++ b/src/mainboard/amd/inagua/acpi/usb_oc.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/mahogany_fam10/acpi/cpstate.asl b/src/mainboard/amd/mahogany_fam10/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/amd/mahogany_fam10/acpi/cpstate.asl +++ b/src/mainboard/amd/mahogany_fam10/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/amd/mahogany_fam10/acpi/routing.asl b/src/mainboard/amd/mahogany_fam10/acpi/routing.asl index 88d1e4c..31e0021 100644 --- a/src/mainboard/amd/mahogany_fam10/acpi/routing.asl +++ b/src/mainboard/amd/mahogany_fam10/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/mahogany_fam10/acpi/usb.asl b/src/mainboard/amd/mahogany_fam10/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/amd/mahogany_fam10/acpi/usb.asl +++ b/src/mainboard/amd/mahogany_fam10/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/olivehill/acpi/routing.asl b/src/mainboard/amd/olivehill/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/amd/olivehill/acpi/routing.asl +++ b/src/mainboard/amd/olivehill/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/olivehill/acpi/usb_oc.asl b/src/mainboard/amd/olivehill/acpi/usb_oc.asl index acdc8f8..c3abe8e 100644 --- a/src/mainboard/amd/olivehill/acpi/usb_oc.asl +++ b/src/mainboard/amd/olivehill/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/olivehillplus/acpi/routing.asl b/src/mainboard/amd/olivehillplus/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/amd/olivehillplus/acpi/routing.asl +++ b/src/mainboard/amd/olivehillplus/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl b/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl index 1643fe7..9e40a8a 100644 --- a/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl +++ b/src/mainboard/amd/olivehillplus/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/persimmon/acpi/routing.asl b/src/mainboard/amd/persimmon/acpi/routing.asl index 6f94b45..78a583f 100644 --- a/src/mainboard/amd/persimmon/acpi/routing.asl +++ b/src/mainboard/amd/persimmon/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/persimmon/acpi/usb_oc.asl b/src/mainboard/amd/persimmon/acpi/usb_oc.asl index 6e9c701..8f5867e 100644 --- a/src/mainboard/amd/persimmon/acpi/usb_oc.asl +++ b/src/mainboard/amd/persimmon/acpi/usb_oc.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl b/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl index f8709a4..ca18f87 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl +++ b/src/mainboard/amd/serengeti_cheetah_fam10/dsdt.asl @@ -12,7 +12,7 @@ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // -DefinitionBlock ("DSDT.aml", "DSDT", 1, "AMDF10", "AMDACPI ", 100925440) +DefinitionBlock ("DSDT.aml", "DSDT", 0x02, "COREv4", "COREBOOT", 100925440) { // Scope (_PR) diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/ssdt2.asl b/src/mainboard/amd/serengeti_cheetah_fam10/ssdt2.asl index 022f522..f3e5043 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/ssdt2.asl +++ b/src/mainboard/amd/serengeti_cheetah_fam10/ssdt2.asl @@ -12,7 +12,7 @@ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // -DefinitionBlock ("SSDT2.aml", "SSDT", 1, "AMDF10", "AMDACPI ", 100925440) +DefinitionBlock ("SSDT2.aml", "SSDT", 0x02, "AMDF10", "AMDACPI ", 100925440) { Scope (_SB) { diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/ssdt3.asl b/src/mainboard/amd/serengeti_cheetah_fam10/ssdt3.asl index 4ece0a8..82e5560 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/ssdt3.asl +++ b/src/mainboard/amd/serengeti_cheetah_fam10/ssdt3.asl @@ -12,7 +12,7 @@ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // -DefinitionBlock ("SSDT3.aml", "SSDT", 1, "AMDF10", "AMDACPI ", 100925440) +DefinitionBlock ("SSDT3.aml", "SSDT", 0x02, "AMDF10", "AMDACPI ", 100925440) { Scope (_SB) { diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/ssdt4.asl b/src/mainboard/amd/serengeti_cheetah_fam10/ssdt4.asl index d5d85e4..4ea6c7c 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/ssdt4.asl +++ b/src/mainboard/amd/serengeti_cheetah_fam10/ssdt4.asl @@ -12,7 +12,7 @@ // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the // GNU General Public License for more details. // -DefinitionBlock ("SSDT4.aml", "SSDT", 1, "AMDF10", "AMDACPI ", 100925440) +DefinitionBlock ("SSDT4.aml", "SSDT", 0x02, "AMDF10", "AMDACPI ", 100925440) { Scope (_SB) { diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/ssdt5.asl b/src/mainboard/amd/serengeti_cheetah_fam10/ssdt5.asl index 9d960ab..a3e8a1ea 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/ssdt5.asl +++ b/src/mainboard/amd/serengeti_cheetah_fam10/ssdt5.asl @@ -13,7 +13,7 @@ // GNU General Public License for more details. // -DefinitionBlock ("SSDT5.aml", "SSDT", 1, "AMDF10", "AMDACPI ", 100925440) +DefinitionBlock ("SSDT5.aml", "SSDT", 0x02, "AMDF10", "AMDACPI ", 100925440) { Scope (_SB) { diff --git a/src/mainboard/amd/south_station/acpi/routing.asl b/src/mainboard/amd/south_station/acpi/routing.asl index 8bd3e4d..78cd069 100644 --- a/src/mainboard/amd/south_station/acpi/routing.asl +++ b/src/mainboard/amd/south_station/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/south_station/acpi/usb_oc.asl b/src/mainboard/amd/south_station/acpi/usb_oc.asl index 299d4aa..7de3a7f 100644 --- a/src/mainboard/amd/south_station/acpi/usb_oc.asl +++ b/src/mainboard/amd/south_station/acpi/usb_oc.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/thatcher/acpi/cpstate.asl b/src/mainboard/amd/thatcher/acpi/cpstate.asl index 0951006..b8bc675 100644 --- a/src/mainboard/amd/thatcher/acpi/cpstate.asl +++ b/src/mainboard/amd/thatcher/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/amd/tilapia_fam10/acpi/cpstate.asl b/src/mainboard/amd/tilapia_fam10/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/amd/tilapia_fam10/acpi/cpstate.asl +++ b/src/mainboard/amd/tilapia_fam10/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/amd/tilapia_fam10/acpi/routing.asl b/src/mainboard/amd/tilapia_fam10/acpi/routing.asl index 02a0a23..d78c7e1 100644 --- a/src/mainboard/amd/tilapia_fam10/acpi/routing.asl +++ b/src/mainboard/amd/tilapia_fam10/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/tilapia_fam10/acpi/usb.asl b/src/mainboard/amd/tilapia_fam10/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/amd/tilapia_fam10/acpi/usb.asl +++ b/src/mainboard/amd/tilapia_fam10/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/amd/torpedo/acpi/routing.asl b/src/mainboard/amd/torpedo/acpi/routing.asl index 6ec0fc5..34724bd 100644 --- a/src/mainboard/amd/torpedo/acpi/routing.asl +++ b/src/mainboard/amd/torpedo/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/union_station/acpi/routing.asl b/src/mainboard/amd/union_station/acpi/routing.asl index 8bd3e4d..78cd069 100644 --- a/src/mainboard/amd/union_station/acpi/routing.asl +++ b/src/mainboard/amd/union_station/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/amd/union_station/acpi/usb_oc.asl b/src/mainboard/amd/union_station/acpi/usb_oc.asl index 299d4aa..7de3a7f 100644 --- a/src/mainboard/amd/union_station/acpi/usb_oc.asl +++ b/src/mainboard/amd/union_station/acpi/usb_oc.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/asrock/e350m1/acpi/routing.asl b/src/mainboard/asrock/e350m1/acpi/routing.asl index 8bd3e4d..78cd069 100644 --- a/src/mainboard/asrock/e350m1/acpi/routing.asl +++ b/src/mainboard/asrock/e350m1/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/asrock/e350m1/acpi/usb_oc.asl b/src/mainboard/asrock/e350m1/acpi/usb_oc.asl index 6e9c701..8f5867e 100644 --- a/src/mainboard/asrock/e350m1/acpi/usb_oc.asl +++ b/src/mainboard/asrock/e350m1/acpi/usb_oc.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/asrock/imb-a180/acpi/routing.asl b/src/mainboard/asrock/imb-a180/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/asrock/imb-a180/acpi/routing.asl +++ b/src/mainboard/asrock/imb-a180/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/asrock/imb-a180/acpi/usb_oc.asl b/src/mainboard/asrock/imb-a180/acpi/usb_oc.asl index f4055ef..1400c90 100644 --- a/src/mainboard/asrock/imb-a180/acpi/usb_oc.asl +++ b/src/mainboard/asrock/imb-a180/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/asus/f2a85-m/acpi/cpstate.asl b/src/mainboard/asus/f2a85-m/acpi/cpstate.asl index 0951006..b8bc675 100644 --- a/src/mainboard/asus/f2a85-m/acpi/cpstate.asl +++ b/src/mainboard/asus/f2a85-m/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/asus/m4a78-em/acpi/cpstate.asl b/src/mainboard/asus/m4a78-em/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/asus/m4a78-em/acpi/cpstate.asl +++ b/src/mainboard/asus/m4a78-em/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/asus/m4a78-em/acpi/routing.asl b/src/mainboard/asus/m4a78-em/acpi/routing.asl index 02a0a23..d78c7e1 100644 --- a/src/mainboard/asus/m4a78-em/acpi/routing.asl +++ b/src/mainboard/asus/m4a78-em/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/asus/m4a78-em/acpi/usb.asl b/src/mainboard/asus/m4a78-em/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/asus/m4a78-em/acpi/usb.asl +++ b/src/mainboard/asus/m4a78-em/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/asus/m4a785-m/acpi/cpstate.asl b/src/mainboard/asus/m4a785-m/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/asus/m4a785-m/acpi/cpstate.asl +++ b/src/mainboard/asus/m4a785-m/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/asus/m4a785-m/acpi/routing.asl b/src/mainboard/asus/m4a785-m/acpi/routing.asl index 02a0a23..d78c7e1 100644 --- a/src/mainboard/asus/m4a785-m/acpi/routing.asl +++ b/src/mainboard/asus/m4a785-m/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/asus/m4a785-m/acpi/usb.asl b/src/mainboard/asus/m4a785-m/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/asus/m4a785-m/acpi/usb.asl +++ b/src/mainboard/asus/m4a785-m/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl b/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl index d90851f..6da0017 100644 --- a/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl +++ b/src/mainboard/asus/m4a785t-m/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/asus/m4a785t-m/acpi/routing.asl b/src/mainboard/asus/m4a785t-m/acpi/routing.asl index 02a0a23..d78c7e1 100644 --- a/src/mainboard/asus/m4a785t-m/acpi/routing.asl +++ b/src/mainboard/asus/m4a785t-m/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/asus/m4a785t-m/acpi/usb.asl b/src/mainboard/asus/m4a785t-m/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/asus/m4a785t-m/acpi/usb.asl +++ b/src/mainboard/asus/m4a785t-m/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/asus/m5a88-v/acpi/cpstate.asl b/src/mainboard/asus/m5a88-v/acpi/cpstate.asl index afba4ff..34c1e47 100644 --- a/src/mainboard/asus/m5a88-v/acpi/cpstate.asl +++ b/src/mainboard/asus/m5a88-v/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/asus/m5a88-v/acpi/routing.asl b/src/mainboard/asus/m5a88-v/acpi/routing.asl index 2d57bc5..0fe4548 100644 --- a/src/mainboard/asus/m5a88-v/acpi/routing.asl +++ b/src/mainboard/asus/m5a88-v/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/asus/m5a88-v/acpi/usb.asl b/src/mainboard/asus/m5a88-v/acpi/usb.asl index 0f8ca9c..2fae325 100644 --- a/src/mainboard/asus/m5a88-v/acpi/usb.asl +++ b/src/mainboard/asus/m5a88-v/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/asus/p2b-ls/dsdt.asl b/src/mainboard/asus/p2b-ls/dsdt.asl index 9bcf68c..9d318b5 100644 --- a/src/mainboard/asus/p2b-ls/dsdt.asl +++ b/src/mainboard/asus/p2b-ls/dsdt.asl @@ -21,7 +21,7 @@ #define SUPERIO_SHOW_FDC #define SUPERIO_SHOW_LPT -DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1) +DefinitionBlock ("DSDT.aml", "DSDT", 0x02, "COREv4", "COREBOOT", 1) { /* \_PR scope defining the main processor is generated in SSDT. */ diff --git a/src/mainboard/asus/p2b/dsdt.asl b/src/mainboard/asus/p2b/dsdt.asl index c49e584..537effd 100644 --- a/src/mainboard/asus/p2b/dsdt.asl +++ b/src/mainboard/asus/p2b/dsdt.asl @@ -22,7 +22,7 @@ #define SUPERIO_SHOW_FDC #define SUPERIO_SHOW_LPT -DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1) +DefinitionBlock ("DSDT.aml", "DSDT", 0x02, "COREv4", "COREBOOT", 1) { /* \_PR scope defining the main processor is generated in SSDT. */ diff --git a/src/mainboard/avalue/eax-785e/acpi/cpstate.asl b/src/mainboard/avalue/eax-785e/acpi/cpstate.asl index afba4ff..34c1e47 100644 --- a/src/mainboard/avalue/eax-785e/acpi/cpstate.asl +++ b/src/mainboard/avalue/eax-785e/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/avalue/eax-785e/acpi/routing.asl b/src/mainboard/avalue/eax-785e/acpi/routing.asl index 2d57bc5..0fe4548 100644 --- a/src/mainboard/avalue/eax-785e/acpi/routing.asl +++ b/src/mainboard/avalue/eax-785e/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/avalue/eax-785e/acpi/usb.asl b/src/mainboard/avalue/eax-785e/acpi/usb.asl index 0f8ca9c..2fae325 100644 --- a/src/mainboard/avalue/eax-785e/acpi/usb.asl +++ b/src/mainboard/avalue/eax-785e/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/bap/ode_e20XX/acpi/routing.asl b/src/mainboard/bap/ode_e20XX/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/bap/ode_e20XX/acpi/routing.asl +++ b/src/mainboard/bap/ode_e20XX/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/bap/ode_e20XX/acpi/usb_oc.asl b/src/mainboard/bap/ode_e20XX/acpi/usb_oc.asl index 9fba168..82f455d 100644 --- a/src/mainboard/bap/ode_e20XX/acpi/usb_oc.asl +++ b/src/mainboard/bap/ode_e20XX/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/bap/ode_e21XX/acpi/routing.asl b/src/mainboard/bap/ode_e21XX/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/bap/ode_e21XX/acpi/routing.asl +++ b/src/mainboard/bap/ode_e21XX/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/bap/ode_e21XX/acpi/usb_oc.asl b/src/mainboard/bap/ode_e21XX/acpi/usb_oc.asl index 1643fe7..9e40a8a 100644 --- a/src/mainboard/bap/ode_e21XX/acpi/usb_oc.asl +++ b/src/mainboard/bap/ode_e21XX/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/biostar/a68n_5200/acpi/routing.asl b/src/mainboard/biostar/a68n_5200/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/biostar/a68n_5200/acpi/routing.asl +++ b/src/mainboard/biostar/a68n_5200/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl b/src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl index acdc8f8..c3abe8e 100644 --- a/src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl +++ b/src/mainboard/biostar/a68n_5200/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/biostar/am1ml/acpi/routing.asl b/src/mainboard/biostar/am1ml/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/biostar/am1ml/acpi/routing.asl +++ b/src/mainboard/biostar/am1ml/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/biostar/am1ml/acpi/usb_oc.asl b/src/mainboard/biostar/am1ml/acpi/usb_oc.asl index 42785f8..6fabe0f 100644 --- a/src/mainboard/biostar/am1ml/acpi/usb_oc.asl +++ b/src/mainboard/biostar/am1ml/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/elmex/pcm205400/acpi/routing.asl b/src/mainboard/elmex/pcm205400/acpi/routing.asl index 6f94b45..78a583f 100644 --- a/src/mainboard/elmex/pcm205400/acpi/routing.asl +++ b/src/mainboard/elmex/pcm205400/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/elmex/pcm205400/acpi/usb_oc.asl b/src/mainboard/elmex/pcm205400/acpi/usb_oc.asl index 6e9c701..8f5867e 100644 --- a/src/mainboard/elmex/pcm205400/acpi/usb_oc.asl +++ b/src/mainboard/elmex/pcm205400/acpi/usb_oc.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/gigabyte/ma785gm/acpi/cpstate.asl b/src/mainboard/gigabyte/ma785gm/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/gigabyte/ma785gm/acpi/cpstate.asl +++ b/src/mainboard/gigabyte/ma785gm/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/gigabyte/ma785gm/acpi/routing.asl b/src/mainboard/gigabyte/ma785gm/acpi/routing.asl index 02a0a23..d78c7e1 100644 --- a/src/mainboard/gigabyte/ma785gm/acpi/routing.asl +++ b/src/mainboard/gigabyte/ma785gm/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/gigabyte/ma785gm/acpi/usb.asl b/src/mainboard/gigabyte/ma785gm/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/gigabyte/ma785gm/acpi/usb.asl +++ b/src/mainboard/gigabyte/ma785gm/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl b/src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl +++ b/src/mainboard/gigabyte/ma785gmt/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/gigabyte/ma785gmt/acpi/routing.asl b/src/mainboard/gigabyte/ma785gmt/acpi/routing.asl index 02a0a23..d78c7e1 100644 --- a/src/mainboard/gigabyte/ma785gmt/acpi/routing.asl +++ b/src/mainboard/gigabyte/ma785gmt/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/gigabyte/ma785gmt/acpi/usb.asl b/src/mainboard/gigabyte/ma785gmt/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/gigabyte/ma785gmt/acpi/usb.asl +++ b/src/mainboard/gigabyte/ma785gmt/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/gigabyte/ma78gm/acpi/cpstate.asl b/src/mainboard/gigabyte/ma78gm/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/gigabyte/ma78gm/acpi/cpstate.asl +++ b/src/mainboard/gigabyte/ma78gm/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/gigabyte/ma78gm/acpi/routing.asl b/src/mainboard/gigabyte/ma78gm/acpi/routing.asl index ab168ce..75db099 100644 --- a/src/mainboard/gigabyte/ma78gm/acpi/routing.asl +++ b/src/mainboard/gigabyte/ma78gm/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/gigabyte/ma78gm/acpi/usb.asl b/src/mainboard/gigabyte/ma78gm/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/gigabyte/ma78gm/acpi/usb.asl +++ b/src/mainboard/gigabyte/ma78gm/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/gizmosphere/gizmo/acpi/routing.asl b/src/mainboard/gizmosphere/gizmo/acpi/routing.asl index 4562fe9..a35af6f 100644 --- a/src/mainboard/gizmosphere/gizmo/acpi/routing.asl +++ b/src/mainboard/gizmosphere/gizmo/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl b/src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl index b48b74b..602dc2a 100644 --- a/src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl +++ b/src/mainboard/gizmosphere/gizmo/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/routing.asl b/src/mainboard/gizmosphere/gizmo2/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/gizmosphere/gizmo2/acpi/routing.asl +++ b/src/mainboard/gizmosphere/gizmo2/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/gizmosphere/gizmo2/acpi/usb_oc.asl b/src/mainboard/gizmosphere/gizmo2/acpi/usb_oc.asl index 9fba168..82f455d 100644 --- a/src/mainboard/gizmosphere/gizmo2/acpi/usb_oc.asl +++ b/src/mainboard/gizmosphere/gizmo2/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl index 433e233..1769955 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* - * DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) + * DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) *{ * #include "routing.asl" *} diff --git a/src/mainboard/hp/abm/acpi/routing.asl b/src/mainboard/hp/abm/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/hp/abm/acpi/routing.asl +++ b/src/mainboard/hp/abm/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/hp/abm/acpi/usb_oc.asl b/src/mainboard/hp/abm/acpi/usb_oc.asl index 9fba168..82f455d 100644 --- a/src/mainboard/hp/abm/acpi/usb_oc.asl +++ b/src/mainboard/hp/abm/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/iei/kino-780am2-fam10/acpi/cpstate.asl b/src/mainboard/iei/kino-780am2-fam10/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/iei/kino-780am2-fam10/acpi/cpstate.asl +++ b/src/mainboard/iei/kino-780am2-fam10/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/iei/kino-780am2-fam10/acpi/routing.asl b/src/mainboard/iei/kino-780am2-fam10/acpi/routing.asl index 88d1e4c..31e0021 100644 --- a/src/mainboard/iei/kino-780am2-fam10/acpi/routing.asl +++ b/src/mainboard/iei/kino-780am2-fam10/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/iei/kino-780am2-fam10/acpi/usb.asl b/src/mainboard/iei/kino-780am2-fam10/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/iei/kino-780am2-fam10/acpi/usb.asl +++ b/src/mainboard/iei/kino-780am2-fam10/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/routing.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/routing.asl index 6f94b45..78a583f 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi/routing.asl +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl b/src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl index 6e9c701..8f5867e 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl +++ b/src/mainboard/jetway/nf81-t56n-lf/acpi/usb_oc.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/jetway/pa78vm5/acpi/cpstate.asl b/src/mainboard/jetway/pa78vm5/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/jetway/pa78vm5/acpi/cpstate.asl +++ b/src/mainboard/jetway/pa78vm5/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/jetway/pa78vm5/acpi/routing.asl b/src/mainboard/jetway/pa78vm5/acpi/routing.asl index ab168ce..75db099 100644 --- a/src/mainboard/jetway/pa78vm5/acpi/routing.asl +++ b/src/mainboard/jetway/pa78vm5/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/jetway/pa78vm5/acpi/usb.asl b/src/mainboard/jetway/pa78vm5/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/jetway/pa78vm5/acpi/usb.asl +++ b/src/mainboard/jetway/pa78vm5/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/lippert/frontrunner-af/acpi/routing.asl b/src/mainboard/lippert/frontrunner-af/acpi/routing.asl index 64d79a5..dde5441 100644 --- a/src/mainboard/lippert/frontrunner-af/acpi/routing.asl +++ b/src/mainboard/lippert/frontrunner-af/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/lippert/frontrunner-af/acpi/usb.asl b/src/mainboard/lippert/frontrunner-af/acpi/usb.asl index 0f8ca9c..2fae325 100644 --- a/src/mainboard/lippert/frontrunner-af/acpi/usb.asl +++ b/src/mainboard/lippert/frontrunner-af/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/lippert/toucan-af/acpi/routing.asl b/src/mainboard/lippert/toucan-af/acpi/routing.asl index d298152..db83a0a 100644 --- a/src/mainboard/lippert/toucan-af/acpi/routing.asl +++ b/src/mainboard/lippert/toucan-af/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/lippert/toucan-af/acpi/usb.asl b/src/mainboard/lippert/toucan-af/acpi/usb.asl index 0f8ca9c..2fae325 100644 --- a/src/mainboard/lippert/toucan-af/acpi/usb.asl +++ b/src/mainboard/lippert/toucan-af/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/msi/ms7721/acpi/cpstate.asl b/src/mainboard/msi/ms7721/acpi/cpstate.asl index 0951006..b8bc675 100644 --- a/src/mainboard/msi/ms7721/acpi/cpstate.asl +++ b/src/mainboard/msi/ms7721/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/msi/ms9652_fam10/dsdt.asl b/src/mainboard/msi/ms9652_fam10/dsdt.asl index 621a807..e58dcac 100644 --- a/src/mainboard/msi/ms9652_fam10/dsdt.asl +++ b/src/mainboard/msi/ms9652_fam10/dsdt.asl @@ -17,7 +17,7 @@ * GNU General Public License for more details. */ -DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1) +DefinitionBlock ("DSDT.aml", "DSDT", 0x02, "COREv4", "COREBOOT", 1) { #include "acpi/util.asl" diff --git a/src/mainboard/pcengines/apu1/acpi/routing.asl b/src/mainboard/pcengines/apu1/acpi/routing.asl index 6c7276a..bf0c146 100644 --- a/src/mainboard/pcengines/apu1/acpi/routing.asl +++ b/src/mainboard/pcengines/apu1/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/pcengines/apu1/acpi/usb_oc.asl b/src/mainboard/pcengines/apu1/acpi/usb_oc.asl index 6e9c701..8f5867e 100644 --- a/src/mainboard/pcengines/apu1/acpi/usb_oc.asl +++ b/src/mainboard/pcengines/apu1/acpi/usb_oc.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/pcengines/apu2/acpi/routing.asl b/src/mainboard/pcengines/apu2/acpi/routing.asl index 7cb7a2f..bd564b2 100644 --- a/src/mainboard/pcengines/apu2/acpi/routing.asl +++ b/src/mainboard/pcengines/apu2/acpi/routing.asl @@ -15,7 +15,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/pcengines/apu2/acpi/usb_oc.asl b/src/mainboard/pcengines/apu2/acpi/usb_oc.asl index 1643fe7..9e40a8a 100644 --- a/src/mainboard/pcengines/apu2/acpi/usb_oc.asl +++ b/src/mainboard/pcengines/apu2/acpi/usb_oc.asl @@ -16,7 +16,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" diff --git a/src/mainboard/supermicro/h8scm_fam10/acpi/cpstate.asl b/src/mainboard/supermicro/h8scm_fam10/acpi/cpstate.asl index 1356379..8e689d2 100644 --- a/src/mainboard/supermicro/h8scm_fam10/acpi/cpstate.asl +++ b/src/mainboard/supermicro/h8scm_fam10/acpi/cpstate.asl @@ -19,7 +19,7 @@ * characteristics. */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001) +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001) { Scope (\_PR) { Processor(CPU0,0,0x808,0x06) { diff --git a/src/mainboard/supermicro/h8scm_fam10/acpi/routing.asl b/src/mainboard/supermicro/h8scm_fam10/acpi/routing.asl index 0ac6152..9321a1d 100644 --- a/src/mainboard/supermicro/h8scm_fam10/acpi/routing.asl +++ b/src/mainboard/supermicro/h8scm_fam10/acpi/routing.asl @@ -14,7 +14,7 @@ */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "routing.asl" diff --git a/src/mainboard/supermicro/h8scm_fam10/acpi/usb.asl b/src/mainboard/supermicro/h8scm_fam10/acpi/usb.asl index d4fc433..8af1793 100644 --- a/src/mainboard/supermicro/h8scm_fam10/acpi/usb.asl +++ b/src/mainboard/supermicro/h8scm_fam10/acpi/usb.asl @@ -15,7 +15,7 @@ /* simple name description */ /* -DefinitionBlock ("DSDT.AML","DSDT",0x01,"XXXXXX","XXXXXXXX",0x00010001 +DefinitionBlock ("DSDT.AML", "DSDT", 0x02, "COREv4", "COREBOOT", 0x00010001 ) { #include "usb.asl" -- To view, visit https://review.coreboot.org/c/coreboot/+/29790 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I060e07a730e721df4a86128ee89bfe168c69f31e Gerrit-Change-Number: 29790 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

1 0

Change in ...coreboot[master]: mb/google/dragonegg: Add initial mainboard code support
by Subrata Banik (Code Review) 22 Nov '18

22 Nov '18

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29749 ) Change subject: mb/google/dragonegg: Add initial mainboard code support ...................................................................... Patch Set 9: > > Patch Set 9: > > > > > Patch Set 9: > > > > > > > > > Please add Documentation for that board. > > > > > > For example: > > > > > > How to flash, required BLOBs, pictures if possible, > everything > > > > > that > > > > > > is useful for coreboot development. > > > > > > > > > > I will let Shelley to answer this question. As this is > early ICL > > > > > silicon, i'm not sure about board availability to able to > build > > > > at > > > > > externally. > > > > > > > > That would be wonderful to have it in the Documentation :-). > > > > > > Patrick, do you have any sample documentation that can be > referred here > > > > Patrick, > > > > Flashing is the same as other Intel boards: > > > > $ dut-control spi2_vref:pp3300 spi2_buf_en:on spi2_buf_on_flex_en:on > warm_reset:on > > $ sudo flashrom -n -p ft2232_spi:type=servo-v2 -w <bios_image> > > $ dut-control spi2_vref:off spi2_buf_en:off spi2_buf_on_flex_en:off > warm_reset:off > > > > Sorry, I do not have the pointers to the blobs as they are in the > Intel VIP site and I can't post photos of the board as it is a > early development board. > > How to write documentation can be found here: > https://doc.coreboot.org/getting_started/writing_documentation.html > > Sample documentation can be found in git, here: > Documentation/mainboard/*/*.md > > All those facts mentioned should go into the documentation. > Also: > Will it be available for purchase ? > Will it be available as reference platform for OEMs ? > Is it an internal project only ? > If the blobs aren't available, the code wont work at all, that > should be mentioned in the Documentation and fixed once the BLOBs > are available. Patrick, can you please let me know how you are building any Intel SoC based SKL or KBL based reference/customer chrome design today? who provides you required ucode, me binaries and FSP binaries ? Consider the fact that ucode an ME binary release process will remain same for icl based platform and dragonegg is one of them. For FSP binary release, i think there is already one process developed by Nate and Balaji to have github kind model where you will get FSP binaries after PRQ is done. i'm not sure, if past we have any board bring up document as such where we could write down those details and i could Shelley has replied earlier about documentation part. lets me know if you have any further question on binaries release process for ICL platforms. > Are there schematics or other documents you can reference ? -- To view, visit https://review.coreboot.org/c/coreboot/+/29749 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9 Gerrit-Change-Number: 29749 Gerrit-PatchSet: 9 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 22 Nov 2018 08:55:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/dragonegg: Add initial mainboard code support
by Subrata Banik (Code Review) 22 Nov '18

22 Nov '18

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29749 ) Change subject: mb/google/dragonegg: Add initial mainboard code support ...................................................................... Patch Set 9: (3 comments) https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/dsdt… File src/mainboard/google/dragonegg/dsdt.asl: https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/dsdt… PS9, Line 22: 0x05 > the revision is 0x02 Although there is no harm to declare this value as 0x5 :) but still i will make this as 0x02 as you have asked. here is the recommendation from spec "A revision field value greater than or equal to 2 signifies that integers declared within the Definition Block are to be evaluated as 64 bit values" https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/roms… File src/mainboard/google/dragonegg/romstage_fsp_params.c: https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/roms… PS9, Line 23: void mainboard_memory_init_params(FSPM_UPD *mupd) > Can this file be removed, since it contains 1 empty function only? We can't remove this file because we might have some overrides as epatch which will apply over this file during chromium build. https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/spd/… File src/mainboard/google/dragonegg/spd/empty.spd.hex: https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/spd/… PS9, Line 1: 00 > Why this empty spd file? Remove it if not used make sense -- To view, visit https://review.coreboot.org/c/coreboot/+/29749 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9 Gerrit-Change-Number: 29749 Gerrit-PatchSet: 9 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 22 Nov 2018 08:47:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: HAOUAS Elyes <ehaouas(a)noos.fr> Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/google/dragonegg: Add initial mainboard code support
by Frans Hendriks (Code Review) 22 Nov '18

22 Nov '18

Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29749 ) Change subject: mb/google/dragonegg: Add initial mainboard code support ...................................................................... Patch Set 9: (2 comments) https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/roms… File src/mainboard/google/dragonegg/romstage_fsp_params.c: https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/roms… PS9, Line 23: void mainboard_memory_init_params(FSPM_UPD *mupd) Can this file be removed, since it contains 1 empty function only? https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/spd/… File src/mainboard/google/dragonegg/spd/empty.spd.hex: https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/spd/… PS9, Line 1: 00 Why this empty spd file? Remove it if not used -- To view, visit https://review.coreboot.org/c/coreboot/+/29749 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9 Gerrit-Change-Number: 29749 Gerrit-PatchSet: 9 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 22 Nov 2018 08:38:56 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: SMI: Introduce CONFIG_SOC_INTEL_BYPASS_PORT_B2_SMI
by Dhaval Sharma (Code Review) 22 Nov '18

22 Nov '18

Dhaval Sharma has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29775 ) Change subject: SMI: Introduce CONFIG_SOC_INTEL_BYPASS_PORT_B2_SMI ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/29775/1/src/ec/google/chromeec/smihandler.c File src/ec/google/chromeec/smihandler.c: https://review.coreboot.org/#/c/29775/1/src/ec/google/chromeec/smihandler.c… PS1, Line 102: #if IS_ENABLED(CONFIG_SOC_INTEL_BYPASS_PORT_B2_SMI) > If CONFIG_REDUCED_SMI is enabled, https://review.coreboot. […] Got it. Yes. As long as that part is retained we are good. -- To view, visit https://review.coreboot.org/c/coreboot/+/29775 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43ca93972fa4d870632707cb9a9e74ab80cbd5d5 Gerrit-Change-Number: 29775 Gerrit-PatchSet: 1 Gerrit-Owner: Jenny Tc <jenny.tc(a)intel.com> Gerrit-Reviewer: Jenny Tc <jenny.tc(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-CC: Dhaval Sharma <dhaval.v.sharma(a)intel.corp-partner.google.com> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Comment-Date: Thu, 22 Nov 2018 08:36:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Dhaval Sharma <dhaval.v.sharma(a)intel.corp-partner.google.com> Comment-In-Reply-To: Jenny Tc <jenny.tc(a)intel.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: sifive uart: Add memory barrier instruction
by Xiang Wang (Code Review) 22 Nov '18

22 Nov '18

Xiang Wang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29789 Change subject: sifive uart: Add memory barrier instruction ...................................................................... sifive uart: Add memory barrier instruction If the memory barrier instruction is missing, the following code will be optimized. source code: do { v = *reg; } while (v & mask); Optimized code: v = *reg; do { } while (v & mask); In order to prevent such optimization, you need to add memory barrier instructions, the source code is modified as follows. do { v = *reg; asm volatile ("":::"memory"); } while (v & mask); Change-Id: I7fdf178485af1ef0fd8d10f1f4919b9e31284457 Signed-off-by: Xiang Wang <wxjstz(a)126.com> --- M src/drivers/uart/sifive.c 1 file changed, 7 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/29789/1 diff --git a/src/drivers/uart/sifive.c b/src/drivers/uart/sifive.c index ce8ead0..1a7370c 100644 --- a/src/drivers/uart/sifive.c +++ b/src/drivers/uart/sifive.c @@ -66,17 +66,15 @@ sifive_uart_init(uart_platform_baseptr(idx), div); } -static bool uart_can_tx(struct sifive_uart_registers *regs) -{ - return !(read32(&regs->txdata) & TXDATA_FULL); -} - void uart_tx_byte(int idx, unsigned char data) { struct sifive_uart_registers *regs = uart_platform_baseptr(idx); + uint32_t txdata; - while (!uart_can_tx(regs)) - ; /* TODO: implement a timeout */ + do { + txdata = read32(regs->txdata); + asm volatile ("":::"memory"); + } while (txdata & TXDATA_FULL) write32(&regs->txdata, data); } @@ -89,6 +87,7 @@ /* Use the TX watermark bit to find out if the TX FIFO is empty */ do { ip = read32(&regs->ip); + asm volatile ("":::"memory"); } while (!(ip & IP_TXWM)); } @@ -99,6 +98,7 @@ do { rxdata = read32(&regs->rxdata); + asm volatile ("":::"memory"); } while (rxdata & RXDATA_EMPTY); return rxdata & 0xff; -- To view, visit https://review.coreboot.org/c/coreboot/+/29789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7fdf178485af1ef0fd8d10f1f4919b9e31284457 Gerrit-Change-Number: 29789 Gerrit-PatchSet: 1 Gerrit-Owner: Xiang Wang <wxjstz(a)126.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/google/dragonegg: Add initial mainboard code support
by HAOUAS Elyes (Code Review) 22 Nov '18

22 Nov '18

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29749 ) Change subject: mb/google/dragonegg: Add initial mainboard code support ...................................................................... Patch Set 9: (1 comment) https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/dsdt… File src/mainboard/google/dragonegg/dsdt.asl: https://review.coreboot.org/#/c/29749/9/src/mainboard/google/dragonegg/dsdt… PS9, Line 22: 0x05 the revision is 0x02 -- To view, visit https://review.coreboot.org/c/coreboot/+/29749 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9 Gerrit-Change-Number: 29749 Gerrit-PatchSet: 9 Gerrit-Owner: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 22 Nov 2018 08:07:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2018