coreboot-gerrit November 2018

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Change in ...coreboot[master]: soc/{amd, intel}: Remove duplicated '&' on ptr's function
by HAOUAS Elyes (Code Review) 27 Nov '18

27 Nov '18

Hello Patrick Rudolph, David Guckian, Vanessa Eusebio, build bot (Jenkins), David Guckian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29862 to look at the new patch set (#4). Change subject: soc/{amd,intel}: Remove duplicated '&' on ptr's function ...................................................................... soc/{amd,intel}: Remove duplicated '&' on ptr's function Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/amd/stoneyridge/chip.c M src/soc/intel/apollolake/chip.c M src/soc/intel/denverton_ns/chip.c M src/soc/intel/denverton_ns/systemagent.c 4 files changed, 13 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/29862/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/29862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Gerrit-Change-Number: 29862 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: soc/{amd, intel}: Remove duplicated '&' on ptr's function
by David Guckian (Code Review) 27 Nov '18

27 Nov '18

David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29862 ) Change subject: soc/{amd,intel}: Remove duplicated '&' on ptr's function ...................................................................... Patch Set 3: Code-Review+1 (2 comments) You can include denverton_ns/systemagent.c if you wish. But I think the ops structures need the & https://review.coreboot.org/#/c/29862/1/src/soc/intel/denverton_ns/systemag… File src/soc/intel/denverton_ns/systemagent.c: https://review.coreboot.org/#/c/29862/1/src/soc/intel/denverton_ns/systemag… PS1, Line 342: .ops_pci = &soc_pci_ops, soc_pci_ops is a structure not a function, it requires the & https://review.coreboot.org/#/c/29862/1/src/soc/intel/denverton_ns/systemag… PS1, Line 353: .ops = &systemagent_ops, Here too, systemagent_ops is a structure not a function, requires the & -- To view, visit https://review.coreboot.org/c/coreboot/+/29862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Gerrit-Change-Number: 29862 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Nov 2018 12:10:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/{amd, intel}: Remove duplicated '&' on ptr's function
by HAOUAS Elyes (Code Review) 27 Nov '18

27 Nov '18

Hello Patrick Rudolph, Vanessa Eusebio, build bot (Jenkins), David Guckian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29862 to look at the new patch set (#3). Change subject: soc/{amd,intel}: Remove duplicated '&' on ptr's function ...................................................................... soc/{amd,intel}: Remove duplicated '&' on ptr's function Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/amd/stoneyridge/chip.c M src/soc/intel/apollolake/chip.c M src/soc/intel/denverton_ns/chip.c 3 files changed, 9 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/29862/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/29862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Gerrit-Change-Number: 29862 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: mb/hp/compaq_8200_elite_sff: Fix SATA port map
by Arthur Heymans (Code Review) 27 Nov '18

27 Nov '18

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29855 ) Change subject: mb/hp/compaq_8200_elite_sff: Fix SATA port map ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29855 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5be2b4f33882f6f71213f8173cdb945fc9b7af06 Gerrit-Change-Number: 29855 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 27 Nov 2018 11:41:49 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/{amd, intel}: Remove duplicated '&' on ptr's function
by HAOUAS Elyes (Code Review) 27 Nov '18

27 Nov '18

Hello Patrick Rudolph, Vanessa Eusebio, build bot (Jenkins), David Guckian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29862 to look at the new patch set (#2). Change subject: soc/{amd,intel}: Remove duplicated '&' on ptr's function ...................................................................... soc/{amd,intel}: Remove duplicated '&' on ptr's function Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/amd/stoneyridge/chip.c M src/soc/intel/apollolake/chip.c M src/soc/intel/denverton_ns/chip.c M src/soc/intel/denverton_ns/systemagent.c 4 files changed, 15 insertions(+), 15 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/29862/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Gerrit-Change-Number: 29862 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: cpu/intel/fit: Make FIT microcode updates selectable
by Philipp Deppenwiese (Code Review) 27 Nov '18

27 Nov '18

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29863 Change subject: cpu/intel/fit: Make FIT microcode updates selectable ...................................................................... cpu/intel/fit: Make FIT microcode updates selectable * Add a kconfig option for de-/selecting microcode updates via Firmware Interface Table. * Default didn't change and stays "yes". Change-Id: I7da926943aef89e49e98d0b990ab46f5f8200e6e Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M Makefile.inc M src/cpu/intel/fit/Kconfig 2 files changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/29863/1 diff --git a/Makefile.inc b/Makefile.inc index aaae7bc..ab4f31e 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1041,7 +1041,7 @@ @printf " SeaBIOS Add sercon-port file\n" $(CBFSTOOL) $@.tmp add-int -i $(CONFIG_SEABIOS_SERCON_PORT_ADDR) -n etc/sercon-port endif -ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) +ifeq ($(CONFIG_CPU_INTEL_FIT_MICROCODE_UPDATES),y) ifeq ($(CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER),y) @printf " UPDATE-FIT\n" $(CBFSTOOL) $@.tmp update-fit -n cpu_microcode_blob.bin -x $(CONFIG_CPU_INTEL_NUM_FIT_ENTRIES) \ diff --git a/src/cpu/intel/fit/Kconfig b/src/cpu/intel/fit/Kconfig index e48dca9..e0c6dd9 100644 --- a/src/cpu/intel/fit/Kconfig +++ b/src/cpu/intel/fit/Kconfig @@ -9,3 +9,9 @@ depends on CPU_INTEL_FIRMWARE_INTERFACE_TABLE help This option selects the number of empty entries in the FIT table. + +config CPU_INTEL_FIT_MICROCODE_UPDATES + bool "Microcode updates in FIT" + default y + help + This option selects updating microcode via the Firmware Interface Table (FIT). -- To view, visit https://review.coreboot.org/c/coreboot/+/29863 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7da926943aef89e49e98d0b990ab46f5f8200e6e Gerrit-Change-Number: 29863 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/fsp_broadwell_de: Add early microcode updates
by Philipp Deppenwiese (Code Review) 27 Nov '18

27 Nov '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29819 ) Change subject: soc/fsp_broadwell_de: Add early microcode updates ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/29819/3/src/drivers/intel/fsp1_0/fsp_util.c File src/drivers/intel/fsp1_0/fsp_util.c: https://review.coreboot.org/#/c/29819/3/src/drivers/intel/fsp1_0/fsp_util.c… PS3, Line 81: intel_update_microcode_from_cbfs > Are you sure this works at this point? On older Intel hardware updating microcode while running in C […] Tried it, boots and updates the microcode. -- To view, visit https://review.coreboot.org/c/coreboot/+/29819 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie31acaf0fc41c51b9edf65b981d43d7732661770 Gerrit-Change-Number: 29819 Gerrit-PatchSet: 3 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Tue, 27 Nov 2018 11:31:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/{amd, intel}: Remove duplicated '&' on ptr's function
by HAOUAS Elyes (Code Review) 27 Nov '18

27 Nov '18

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29862 Change subject: soc/{amd,intel}: Remove duplicated '&' on ptr's function ...................................................................... soc/{amd,intel}: Remove duplicated '&' on ptr's function Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/amd/stoneyridge/chip.c M src/soc/intel/apollolake/chip.c M src/soc/intel/denverton_ns/chip.c M src/soc/intel/denverton_ns/systemagent.c 4 files changed, 14 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/29862/1 diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index 90b25bb..9743aa9 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -148,9 +148,9 @@ struct chip_operations soc_amd_stoneyridge_ops = { CHIP_NAME("AMD StoneyRidge SOC") - .enable_dev = &enable_dev, - .init = &soc_init, - .final = &soc_final + .enable_dev = enable_dev, + .init = soc_init, + .final = soc_final }; static void earliest_ramstage(void *unused) diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 85fe30c..2bf8c9a 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -659,9 +659,9 @@ struct chip_operations soc_intel_apollolake_ops = { CHIP_NAME("Intel Apollolake SOC") - .enable_dev = &enable_dev, - .init = &soc_init, - .final = &soc_final + .enable_dev = enable_dev, + .init = soc_init, + .final = soc_final }; static void drop_privilege_all(void) diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c index d0a21ac..0f3c8a0 100644 --- a/src/soc/intel/denverton_ns/chip.c +++ b/src/soc/intel/denverton_ns/chip.c @@ -123,9 +123,9 @@ struct chip_operations soc_intel_denverton_ns_ops = { CHIP_NAME("Intel Denverton-NS SOC") - .enable_dev = &soc_enable_dev, - .init = &soc_init, - .final = &soc_final + .enable_dev = soc_enable_dev, + .init = soc_init, + .final = soc_final }; static void soc_set_subsystem(struct device *dev, uint32_t vendor, diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c index 6ffa2c7..b33a178 100644 --- a/src/soc/intel/denverton_ns/systemagent.c +++ b/src/soc/intel/denverton_ns/systemagent.c @@ -335,11 +335,11 @@ } static struct device_operations systemagent_ops = { - .read_resources = &systemagent_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .init = &systemagent_init, - .ops_pci = &soc_pci_ops, + .read_resources = systemagent_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = systemagent_init, + .ops_pci = soc_pci_ops, }; /* IDs for System Agent device of Intel Denverton SoC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/29862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Gerrit-Change-Number: 29862 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/intel/icelake_rvp: Include cpu.asl in DSDT ACPI table
by Aamir Bohra (Code Review) 27 Nov '18

27 Nov '18

Aamir Bohra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29861 Change subject: mb/intel/icelake_rvp: Include cpu.asl in DSDT ACPI table ...................................................................... mb/intel/icelake_rvp: Include cpu.asl in DSDT ACPI table This implementation adds support of PNOT method included in cpu.asl. It is needed to notify CPU APCI device to re-evaluate the _CTS table for list of supported C-states. Change-Id: I135cc3aa32a912c8ad3449d063d533f8873fcc94 Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com> --- M src/mainboard/intel/icelake_rvp/dsdt.asl 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/29861/1 diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index 1d10126..fd8d394 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -29,6 +29,9 @@ // global NVS and variables #include <soc/intel/icelake/acpi/globalnvs.asl> + // CPU + #include <soc/intel/icelake/acpi/cpu.asl> + Scope (\_SB) { Device (PCI0) { -- To view, visit https://review.coreboot.org/c/coreboot/+/29861 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I135cc3aa32a912c8ad3449d063d533f8873fcc94 Gerrit-Change-Number: 29861 Gerrit-PatchSet: 1 Gerrit-Owner: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: security/vboot: Add VB2_LIB to romstage sources without dependencies
by Philipp Deppenwiese (Code Review) 27 Nov '18

27 Nov '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29827 ) Change subject: security/vboot: Add VB2_LIB to romstage sources without dependencies ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29827 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8126c21b8fbe8dd65d95af49cbe2ad776b8ef605 Gerrit-Change-Number: 29827 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Nov 2018 10:42:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit November 2018