coreboot-gerrit November 2018

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Change in coreboot[master]: mb/lenovo/*/dsdt.asl: Rearrange defines
by Peter Lemenkov (Code Review) 08 Nov '18

08 Nov '18

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/29544 Change subject: mb/lenovo/*/dsdt.asl: Rearrange defines ...................................................................... mb/lenovo/*/dsdt.asl: Rearrange defines Sort mainboard-specific defines in the same order as in all other Lenovo boards. This is a purely cosmetic change which just makes diff between boards smaller. Change-Id: I4e379bb727b356fc6010e93de492f6d73f97a750 Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/lenovo/l520/dsdt.asl M src/mainboard/lenovo/s230u/dsdt.asl 2 files changed, 4 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/29544/1 diff --git a/src/mainboard/lenovo/l520/dsdt.asl b/src/mainboard/lenovo/l520/dsdt.asl index 42a61fb..2ba64ec 100644 --- a/src/mainboard/lenovo/l520/dsdt.asl +++ b/src/mainboard/lenovo/l520/dsdt.asl @@ -11,11 +11,12 @@ * GNU General Public License for more details. */ +#define THINKPAD_EC_GPE 22 #define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB #define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 #define EC_LENOVO_H8_ME_WORKAROUND 1 -#define THINKPAD_EC_GPE 22 + DefinitionBlock( "dsdt.aml", "DSDT", diff --git a/src/mainboard/lenovo/s230u/dsdt.asl b/src/mainboard/lenovo/s230u/dsdt.asl index 71f3ef7..406621e 100644 --- a/src/mainboard/lenovo/s230u/dsdt.asl +++ b/src/mainboard/lenovo/s230u/dsdt.asl @@ -11,11 +11,12 @@ * GNU General Public License for more details. */ +#define THINKPAD_EC_GPE 23 #define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB #define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 #define EC_LENOVO_H8_ME_WORKAROUND 1 -#define THINKPAD_EC_GPE 23 + DefinitionBlock( "dsdt.aml", "DSDT", -- To view, visit https://review.coreboot.org/29544 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4e379bb727b356fc6010e93de492f6d73f97a750 Gerrit-Change-Number: 29544 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com>

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Change in coreboot[master]: mb/lenovo/*/dsdt: Move mainboard-specific defines out of ec.asl
by Peter Lemenkov (Code Review) 08 Nov '18

08 Nov '18

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/29543 Change subject: mb/lenovo/*/dsdt: Move mainboard-specific defines out of ec.asl ...................................................................... mb/lenovo/*/dsdt: Move mainboard-specific defines out of ec.asl Most Lenovo mainboards define their own specific defines in dsdt.asl. Let's make it consistent across all Lenovo mainboards. Tested - builds fine. Change-Id: I03fbeb09b25e42af2dfbb220c0f726e6abb73673 Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/lenovo/t430/acpi/ec.asl M src/mainboard/lenovo/t430/dsdt.asl M src/mainboard/lenovo/x131e/acpi/ec.asl M src/mainboard/lenovo/x131e/dsdt.asl 4 files changed, 12 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/43/29543/1 diff --git a/src/mainboard/lenovo/t430/acpi/ec.asl b/src/mainboard/lenovo/t430/acpi/ec.asl index 3c7f89d..63d6a82 100644 --- a/src/mainboard/lenovo/t430/acpi/ec.asl +++ b/src/mainboard/lenovo/t430/acpi/ec.asl @@ -13,10 +13,4 @@ * GNU General Public License for more details. */ -#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB -#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB -#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 -#define EC_LENOVO_H8_ME_WORKAROUND 1 -#define THINKPAD_EC_GPE 17 - #include <ec/lenovo/h8/acpi/ec.asl> diff --git a/src/mainboard/lenovo/t430/dsdt.asl b/src/mainboard/lenovo/t430/dsdt.asl index dff8dcd..fd7d1bd 100644 --- a/src/mainboard/lenovo/t430/dsdt.asl +++ b/src/mainboard/lenovo/t430/dsdt.asl @@ -15,6 +15,12 @@ * GNU General Public License for more details. */ +#define THINKPAD_EC_GPE 17 +#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB +#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB +#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 +#define EC_LENOVO_H8_ME_WORKAROUND 1 + DefinitionBlock( "dsdt.aml", "DSDT", diff --git a/src/mainboard/lenovo/x131e/acpi/ec.asl b/src/mainboard/lenovo/x131e/acpi/ec.asl index 02a9d2b..acbb778 100644 --- a/src/mainboard/lenovo/x131e/acpi/ec.asl +++ b/src/mainboard/lenovo/x131e/acpi/ec.asl @@ -15,10 +15,4 @@ * GNU General Public License for more details. */ -#define THINKPAD_EC_GPE 22 -#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB -#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB -#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 -#define EC_LENOVO_H8_ME_WORKAROUND 1 - #include <ec/lenovo/h8/acpi/ec.asl> diff --git a/src/mainboard/lenovo/x131e/dsdt.asl b/src/mainboard/lenovo/x131e/dsdt.asl index cd1af34..4cad57a 100644 --- a/src/mainboard/lenovo/x131e/dsdt.asl +++ b/src/mainboard/lenovo/x131e/dsdt.asl @@ -16,6 +16,12 @@ * GNU General Public License for more details. */ +#define THINKPAD_EC_GPE 22 +#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB +#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB +#define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 +#define EC_LENOVO_H8_ME_WORKAROUND 1 + DefinitionBlock( "dsdt.aml", "DSDT", -- To view, visit https://review.coreboot.org/29543 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I03fbeb09b25e42af2dfbb220c0f726e6abb73673 Gerrit-Change-Number: 29543 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com>

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Change in coreboot[master]: mb/lenovo/x60/dsdt: Remove unused include
by Peter Lemenkov (Code Review) 08 Nov '18

08 Nov '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29068 to look at the new patch set (#2). Change subject: mb/lenovo/x60/dsdt: Remove unused include ...................................................................... mb/lenovo/x60/dsdt: Remove unused include Tested - builds fine with this patch. Change-Id: I4666a8c9dd0e03ee32770844019dfc032e07e460 Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/lenovo/x60/dsdt.asl 1 file changed, 0 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/29068/2 -- To view, visit https://review.coreboot.org/29068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I4666a8c9dd0e03ee32770844019dfc032e07e460 Gerrit-Change-Number: 29068 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: siemens/mc_apl3: Set Full Reset Bit into Reset Control Register
by Werner Zeh (Code Review) 08 Nov '18

08 Nov '18

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/29530 ) Change subject: siemens/mc_apl3: Set Full Reset Bit into Reset Control Register ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/#/c/29530/1/src/mainboard/siemens/mc_apl1/varia… File src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c: https://review.coreboot.org/#/c/29530/1/src/mainboard/siemens/mc_apl1/varia… PS1, Line 67: into in https://review.coreboot.org/#/c/29530/1/src/mainboard/siemens/mc_apl1/varia… PS1, Line 68: * When Bit 3 is set to 1 the PCH will driving SLP_S3 active (low). Maybe add: ...SLP_S3 active (low) when the reset button is pressed. SLP_S3 is then used on the mainboard to generate the right reset timing. https://review.coreboot.org/#/c/29530/1/src/mainboard/siemens/mc_apl1/varia… PS1, Line 68: driving drive -- To view, visit https://review.coreboot.org/29530 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib842f15b6ba14851d7f9b1b97c83389adc61f50b Gerrit-Change-Number: 29530 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Nov 2018 05:48:20 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: siemens/mc_apl3: Set bus master bit for on-board PCI device
by Werner Zeh (Code Review) 08 Nov '18

08 Nov '18

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/29528 ) Change subject: siemens/mc_apl3: Set bus master bit for on-board PCI device ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29528 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1ef4a7774d4ca75c230063debbc63d03486fed6f Gerrit-Change-Number: 29528 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Nov 2018 05:44:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: siemens/mc_apl3: Remove the correction of the Tx signal for SATA
by Werner Zeh (Code Review) 08 Nov '18

08 Nov '18

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/29527 ) Change subject: siemens/mc_apl3: Remove the correction of the Tx signal for SATA ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29527 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I900d0d44b88585c223182d85c78cf3ff1e3e9159 Gerrit-Change-Number: 29527 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Nov 2018 05:42:58 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devices
by Werner Zeh (Code Review) 08 Nov '18

08 Nov '18

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/29513 ) Change subject: siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devices ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/29513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5028c26769a2122b1c609ad7789c9949e3cb7a87 Gerrit-Change-Number: 29513 Gerrit-PatchSet: 3 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 08 Nov 2018 05:42:40 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: ec/google/chromeec: add support for retrieving OEM name
by build bot (Jenkins) (Code Review) 08 Nov '18

08 Nov '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/29497 ) Change subject: ec/google/chromeec: add support for retrieving OEM name ...................................................................... Patch Set 7: (2 comments) https://review.coreboot.org/#/c/29497/7/src/ec/google/chromeec/ec.c File src/ec/google/chromeec/ec.c: https://review.coreboot.org/#/c/29497/7/src/ec/google/chromeec/ec.c@614 PS7, Line 614: static int google_chromeec_cbi_get_string(char *buf, size_t bufsize, uint32_t tag) line over 80 characters https://review.coreboot.org/#/c/29497/7/src/ec/google/chromeec/ec.c@641 PS7, Line 641: return google_chromeec_cbi_get_string(buf, bufsize, CBI_TAG_DRAM_PART_NUM); line over 80 characters -- To view, visit https://review.coreboot.org/29497 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4938c4d60fcad9e1f43ef69cc4441d1653de7e24 Gerrit-Change-Number: 29497 Gerrit-PatchSet: 7 Gerrit-Owner: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Wisley Chen <wisley.chen(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-CC: Jett Rink <jettrink(a)chromium.org> Gerrit-Comment-Date: Thu, 08 Nov 2018 03:56:26 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: WIP: enable ISH in arcada
by Lijian Zhao (Code Review) 08 Nov '18

08 Nov '18

Lijian Zhao has uploaded a new patch set (#2) to the change originally created by Li1 Feng. ( https://review.coreboot.org/29518 ) Change subject: WIP: enable ISH in arcada ...................................................................... WIP: enable ISH in arcada gpio C12/ C13 configured as ISH UART1 Change-Id: I83861e32dbeeb06005c9435ba460d28756080f2d Signed-off-by: li feng <li1.feng(a)intel.com> --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb M src/mainboard/google/sarien/variants/arcada/gpio.c 2 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/29518/2 -- To view, visit https://review.coreboot.org/29518 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I83861e32dbeeb06005c9435ba460d28756080f2d Gerrit-Change-Number: 29518 Gerrit-PatchSet: 2 Gerrit-Owner: Li1 Feng <li1.feng(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/common: Call EC _PTS/_WAK methods if defined
by Martin Roth (Code Review) 08 Nov '18

08 Nov '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/29487 ) Change subject: soc/intel/common: Call EC _PTS/_WAK methods if defined ...................................................................... Patch Set 2: > > Patch Set 2: > > > > That seems to be the difference. How do we get the jenkins > builders to run "make iasl"? > > Ordinarily by pinging Martin and Philip so they update the > containers on the build machines that they maintain. We need to build a new container. The last time I tried, we ran into significant issues with the latest version of debian sid, and I wasn't able to update. Nico's been working on the sdk dockerfile, so I'll work on updating the docker images and jenkins builders on Monday when I get back to the US. -- To view, visit https://review.coreboot.org/29487 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6bf83509423c0fb07c4890986a189cf54afaed10 Gerrit-Change-Number: 29487 Gerrit-PatchSet: 2 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Comment-Date: Thu, 08 Nov 2018 02:02:54 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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coreboot-gerrit November 2018