Martin Roth has posted comments on this change. ( https://review.coreboot.org/29028 )
Change subject: mainboard/google/kahlee: Set PSPP setting to BalanceLow
......................................................................
Patch Set 1: Code-Review+2
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Richard Spiegel has uploaded a new patch set (#2). ( https://review.coreboot.org/29035 )
Change subject: amd/stoneyridge: Indicate STAPM units in their name
......................................................................
amd/stoneyridge: Indicate STAPM units in their name
STAPM devicetree registers do not indicate the unit, which causes confusion.
More importantly, the time was assumed to be in seconds when it's actually
milliseconds. This caused early STAPM configurations to fail.
BUG=b:117590953
TEST=Build grunt
Change-Id: I2a7e3d43601992d1f7b02456913c763d940fe9ee
Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
---
M src/mainboard/google/kahlee/variants/careena/devicetree.cb
M src/mainboard/google/kahlee/variants/grunt/devicetree.cb
M src/soc/amd/stoneyridge/chip.h
M src/soc/amd/stoneyridge/romstage.c
4 files changed, 11 insertions(+), 10 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/29035/2
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Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/29016 )
Change subject: amd/stoneyridge: Fix PmControl register size in SMI handler
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29016/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/29016/1//COMMIT_MSG@7
PS1, Line 7: amd/stoneyridge
> amd/stoneyridge/smihandler. […]
I'll demur. You're nearly the only person who does that. Look through the git log and you'll see.
This is only a high level topic of a subject line and shouldn't be used to say what specific file is changed. Due to the nature of a patch, it's already self-evident what file(s) are modified.
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Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/29013 )
Change subject: amd/stoneyridge: Rearrange southbridge.h
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29013/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/29013/1//COMMIT_MSG@6
PS1, Line 6:
: amd/stoneyridge
> soc/amd/stoneyridge/include/soc:
I'll demur. You're nearly the only person who does that. Look through the git log and you'll see.
This is only a high level topic of a subject line and shouldn't be used to say what specific file is changed. Due to the nature of a patch, it's already self-evident what file(s) are modified.
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/29035 )
Change subject: amd/stoneyridge: Indicate STAPM units in their name
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29035/1/src/soc/amd/stoneyridge/romstage.c
File src/soc/amd/stoneyridge/romstage.c:
https://review.coreboot.org/#/c/29035/1/src/soc/amd/stoneyridge/romstage.c@…
PS1, Line 238: if ((cfg->stapm_percent) && (cfg->stapm_time_ms) && (cfg->stapm_power_mw)) {
line over 80 characters
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Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/29012 )
Change subject: amd/stoneyridge: Remove dead GPIO definitions
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29012/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/29012/1//COMMIT_MSG@7
PS1, Line 7: amd/stoneyridge
> soc/amd/stoneyridge/include/soc/southbridge. […]
I'll demur. You're nearly the only person who does that. Look through the git log and you'll see.
This is only a high level topic of a subject line and shouldn't be used to say what specific file is changed. Due to the nature of a patch, it's already self-evident what file(s) are modified.
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Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/29011 )
Change subject: amd/stoneyridge: Clarify XHCI_PM register definitions
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29011/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/29011/1//COMMIT_MSG@7
PS1, Line 7: amd/stoneyridge:
> soc/amd/stoneyridge/include/soc/southbridge. […]
I'll demur. You're nearly the only person who does that. Look through the git log and you'll see.
This is only a high level topic of a subject line and shouldn't be used to say what specific file is changed. Due to the nature of a patch, it's already self-evident what file(s) are modified.
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Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/29010 )
Change subject: amd/stoneyridge: Fix SPI_CMD_TRIGGER coding style
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29010/1//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/29010/1//COMMIT_MSG@7
PS1, Line 7: md/stoneyridg
> soc/amd/stoneyridge/include/soc/southbridge. […]
I'll demur. You're nearly the only person who does that. Look through the git log and you'll see.
This is only a high level topic of a subject line and shouldn't be used to say what specific file is changed. Due to the nature of a patch, it's already self-evident what file(s) are modified.
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Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/29009 )
Change subject: amd/stoneyridge: Convert hex definitions to lower case
......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/#/c/29009/1/src/soc/amd/stoneyridge/southbridge…
File src/soc/amd/stoneyridge/southbridge.c:
https://review.coreboot.org/#/c/29009/1/src/soc/amd/stoneyridge/southbridge…
PS1, Line 593: cfg5 |= (0x2 << CG1PLL_SS_AMOUNT_NFRAC_SLIP_SHIFT) & CG1PLL_SS_AMOUNT_NFRAC_SLIP_MA
> I saw you fixed on a separate patch.
Right. If I fixed it here, it would be an unrelated change.
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