Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/29075
Change subject: soc/amd/stoneyridge: Define PM USB Enable register
......................................................................
soc/amd/stoneyridge: Define PM USB Enable register
Make #define definitions for PMxEF and replace the hardcoded values.
Note that this doesn't change the current functionality of the source.
The existing code has been propogated from the sb//hudson port, which
seems to attempt to enable 100% of all OHCI and EHCI controllers that
may be present in the system.
Change-Id: I6018b0062730de19e3283a010144dfedc2b11423
Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com>
---
M src/soc/amd/stoneyridge/enable_usbdebug.c
M src/soc/amd/stoneyridge/include/soc/southbridge.h
2 files changed, 4 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/29075/1
diff --git a/src/soc/amd/stoneyridge/enable_usbdebug.c b/src/soc/amd/stoneyridge/enable_usbdebug.c
index 0a0c3ec..27ac61f 100644
--- a/src/soc/amd/stoneyridge/enable_usbdebug.c
+++ b/src/soc/amd/stoneyridge/enable_usbdebug.c
@@ -26,8 +26,8 @@
pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
{
/* Enable all of the USB controllers */
- outb(0xef, PM_INDEX);
- outb(0x7f, PM_DATA);
+ outb(PM_USB_ENABLE, PM_INDEX);
+ outb(PM_USB_ALL_CONTROLLERS, PM_DATA);
return SOC_EHCI1_DEV;
}
diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h
index ce0af95..b9dc62a 100644
--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h
+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h
@@ -101,6 +101,8 @@
#define PM_LPC_AB_NO_BYPASS_EN BIT(2)
#define PM_LPC_A20_EN BIT(1)
#define PM_LPC_ENABLE BIT(0)
+#define PM_USB_ENABLE 0xef
+#define PM_USB_ALL_CONTROLLERS 0x7f
/* FCH MISC Registers 0xfed80e00 */
#define GPP_CLK_CNTRL 0x00
--
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Gerrit-Change-Id: I6018b0062730de19e3283a010144dfedc2b11423
Gerrit-Change-Number: 29075
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Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>
Martin Roth has posted comments on this change. ( https://review.coreboot.org/29065 )
Change subject: cpu/amd: [WIP] Use common AMD's MSR
......................................................................
Patch Set 7:
> with a "IA32" prefix, it doesn't matter ... ?
Well, it's not optimal, but despite the prefix, I'd still prefer to have just one definition then to duplicate it.
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Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
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Gerrit-Comment-Date: Fri, 12 Oct 2018 16:40:07 +0000
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Hello Marshall Dawson, Richard Spiegel, build bot (Jenkins), Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29065
to look at the new patch set (#7).
Change subject: cpu/amd: [WIP] Use common AMD's MSR
......................................................................
cpu/amd: [WIP] Use common AMD's MSR
Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/cpu/amd/agesa/family12/model_12_init.c
M src/cpu/amd/agesa/family14/model_14_init.c
M src/cpu/amd/agesa/family15tn/model_15_init.c
M src/cpu/amd/agesa/family16kb/model_16_init.c
M src/cpu/amd/car/disable_cache_as_ram.c
M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
M src/cpu/amd/pi/00630F01/model_15_init.c
M src/cpu/amd/pi/00660F01/model_15_init.c
M src/cpu/amd/pi/00730F01/model_16_init.c
D src/include/cpu/amd/amdfam12.h
D src/include/cpu/amd/amdfam14.h
M src/include/cpu/amd/amdfam15.h
M src/include/cpu/amd/amdfam16.h
M src/include/cpu/amd/msr.h
M src/soc/amd/stoneyridge/cpu.c
M src/soc/amd/stoneyridge/finalize.c
M src/soc/amd/stoneyridge/ramtop.c
17 files changed, 47 insertions(+), 124 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/29065/7
--
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Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com>
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Gerrit-CC: Marc Jones <marc(a)marcjonesconsulting.com>
Hello Marshall Dawson, Richard Spiegel, build bot (Jenkins), Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/29065
to look at the new patch set (#6).
Change subject: cpu/amd: Use common AMD's MSR
......................................................................
cpu/amd: Use common AMD's MSR
Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/cpu/amd/agesa/family12/model_12_init.c
M src/cpu/amd/agesa/family14/model_14_init.c
M src/cpu/amd/agesa/family15tn/model_15_init.c
M src/cpu/amd/agesa/family16kb/model_16_init.c
M src/cpu/amd/car/disable_cache_as_ram.c
M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c
M src/cpu/amd/pi/00630F01/model_15_init.c
M src/cpu/amd/pi/00660F01/model_15_init.c
M src/cpu/amd/pi/00730F01/model_16_init.c
D src/include/cpu/amd/amdfam12.h
D src/include/cpu/amd/amdfam14.h
M src/include/cpu/amd/amdfam15.h
M src/include/cpu/amd/amdfam16.h
M src/include/cpu/amd/msr.h
M src/soc/amd/stoneyridge/cpu.c
M src/soc/amd/stoneyridge/finalize.c
M src/soc/amd/stoneyridge/ramtop.c
17 files changed, 47 insertions(+), 124 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/29065/6
--
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Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/29065 )
Change subject: cpu/amd: Use common AMD's MSR
......................................................................
Patch Set 5:
> > one more question:
> > page #633 - "AMD64 Architecture Programmer’s Manual - Volume 2"
> > we have common Amd64_MSR for exmple this one: "MCG_CAP"
> > we can find it in x86/msr.h , but with a "IA32_..."
> > should we use the one defined in x86, or define new one for AMD
> as
> > for example "#define AMD64_MCG_CAP 0x179" ?
>
> MSRs that are shared by intel should go into the x86 version, in my
> opinion.
with a "IA32" prefix, it doesn't matter ... ?
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/29065 )
Change subject: cpu/amd: Use common AMD's MSR
......................................................................
Patch Set 5:
> now "src/include/cpu/amd/amdfam1*.h" are empty. should we keep them?
Nope - delete the heck out of those! Thanks.
> one more question:
> page #633 - "AMD64 Architecture Programmer’s Manual - Volume 2"
> we have common Amd64_MSR for exmple this one: "MCG_CAP"
> we can find it in x86/msr.h , but with a "IA32_..."
> should we use the one defined in x86, or define new one for AMD as
> for example "#define AMD64_MCG_CAP 0x179" ?
MSRs that are shared by intel should go into the x86 version, in my opinion.
--
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Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/29065 )
Change subject: cpu/amd: Use common AMD's MSR
......................................................................
Patch Set 5:
> (1 comment)
now "src/include/cpu/amd/amdfam1*.h" are empty. should we keep them ?
one more question:
page #633 - "AMD64 Architecture Programmer’s Manual - Volume 2"
we have common Amd64_MSR for exmple this one: "MCG_CAP"
we can find it in x86/msr.h , but with a "IA32_..."
should we use the one defined in x86, or define new one for AMD as for example "#define AMD64_MCG_CAP 0x179" ?
--
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