coreboot-gerrit October 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: cpu/amd: Use common AMD's MSR
by Elyes HAOUAS (Code Review) 13 Oct '18

13 Oct '18

Hello Marshall Dawson, Richard Spiegel, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29065 to look at the new patch set (#9). Change subject: cpu/amd: Use common AMD's MSR ...................................................................... cpu/amd: Use common AMD's MSR Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/agesa/family12/model_12_init.c M src/cpu/amd/agesa/family14/model_14_init.c M src/cpu/amd/agesa/family15tn/model_15_init.c M src/cpu/amd/agesa/family16kb/model_16_init.c M src/cpu/amd/car/disable_cache_as_ram.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c M src/cpu/amd/pi/00630F01/model_15_init.c M src/cpu/amd/pi/00660F01/model_15_init.c M src/cpu/amd/pi/00730F01/model_16_init.c D src/include/cpu/amd/amdfam12.h D src/include/cpu/amd/amdfam14.h M src/include/cpu/amd/amdfam15.h D src/include/cpu/amd/amdfam16.h M src/include/cpu/amd/msr.h M src/include/cpu/x86/msr.h M src/northbridge/amd/amdmct/amddefs.h M src/soc/amd/stoneyridge/cpu.c M src/soc/amd/stoneyridge/finalize.c M src/soc/amd/stoneyridge/mca.c M src/soc/amd/stoneyridge/ramtop.c 21 files changed, 73 insertions(+), 197 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/29065/9 -- To view, visit https://review.coreboot.org/29065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550 Gerrit-Change-Number: 29065 Gerrit-PatchSet: 9 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Marc Jones <marc(a)marcjonesconsulting.com>

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Change in coreboot[master]: 3rdparty/blobs: Update to include QuarkFsp
by Martin Roth (Code Review) 13 Oct '18

13 Oct '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/29030 ) Change subject: 3rdparty/blobs: Update to include QuarkFsp ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0032e86755750755e7ae6e2a53863e1600f96a5b Gerrit-Change-Number: 29030 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 12 Oct 2018 17:59:46 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: cpu/amd: Use common AMD's MSR
by Elyes HAOUAS (Code Review) 13 Oct '18

13 Oct '18

Hello Marshall Dawson, Richard Spiegel, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29065 to look at the new patch set (#8). Change subject: cpu/amd: Use common AMD's MSR ...................................................................... cpu/amd: Use common AMD's MSR Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/agesa/family12/model_12_init.c M src/cpu/amd/agesa/family14/model_14_init.c M src/cpu/amd/agesa/family15tn/model_15_init.c M src/cpu/amd/agesa/family16kb/model_16_init.c M src/cpu/amd/car/disable_cache_as_ram.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/family_10h-family_15h/model_10xxx_init.c M src/cpu/amd/pi/00630F01/model_15_init.c M src/cpu/amd/pi/00660F01/model_15_init.c M src/cpu/amd/pi/00730F01/model_16_init.c D src/include/cpu/amd/amdfam12.h D src/include/cpu/amd/amdfam14.h M src/include/cpu/amd/amdfam15.h D src/include/cpu/amd/amdfam16.h M src/include/cpu/amd/msr.h M src/include/cpu/x86/msr.h M src/northbridge/amd/amdmct/amddefs.h M src/soc/amd/stoneyridge/cpu.c M src/soc/amd/stoneyridge/finalize.c M src/soc/amd/stoneyridge/mca.c M src/soc/amd/stoneyridge/ramtop.c 21 files changed, 73 insertions(+), 189 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/29065/8 -- To view, visit https://review.coreboot.org/29065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550 Gerrit-Change-Number: 29065 Gerrit-PatchSet: 8 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Marc Jones <marc(a)marcjonesconsulting.com>

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Change in coreboot[master]: cpu/amd: [WIP] Use common AMD's MSR
by Richard Spiegel (Code Review) 13 Oct '18

13 Oct '18

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/29065 ) Change subject: cpu/amd: [WIP] Use common AMD's MSR ...................................................................... Patch Set 7: (12 comments) https://review.coreboot.org/#/c/29065/6/src/cpu/amd/agesa/family15tn/model_… File src/cpu/amd/agesa/family15tn/model_15_init.c: https://review.coreboot.org/#/c/29065/6/src/cpu/amd/agesa/family15tn/model_… PS6, Line 29: #include <cpu/amd/amdfam15.h> Remove, no longer needed. https://review.coreboot.org/#/c/29065/7/src/cpu/amd/agesa/family16kb/model_… File src/cpu/amd/agesa/family16kb/model_16_init.c: https://review.coreboot.org/#/c/29065/7/src/cpu/amd/agesa/family16kb/model_… PS7, Line 28: nclude <cpu/amd/amdfam16.h> remove https://review.coreboot.org/#/c/29065/7/src/cpu/amd/agesa/family16kb/model_… PS7, Line 75: MCG_CAP IA32_MCG_CAP https://review.coreboot.org/#/c/29065/7/src/cpu/amd/family_10h-family_15h/m… File src/cpu/amd/family_10h-family_15h/model_10xxx_init.c: https://review.coreboot.org/#/c/29065/7/src/cpu/amd/family_10h-family_15h/m… PS7, Line 19: #include <cpu/amd/msr.h> : Does this belongs to this patch? All you did was moving the includes around. https://review.coreboot.org/#/c/29065/7/src/cpu/amd/pi/00630F01/model_15_in… File src/cpu/amd/pi/00630F01/model_15_init.c: https://review.coreboot.org/#/c/29065/7/src/cpu/amd/pi/00630F01/model_15_in… PS7, Line 30: #include <cpu/amd/amdfam15.h> Remove https://review.coreboot.org/#/c/29065/7/src/cpu/amd/pi/00660F01/model_15_in… File src/cpu/amd/pi/00660F01/model_15_init.c: https://review.coreboot.org/#/c/29065/7/src/cpu/amd/pi/00660F01/model_15_in… PS7, Line 29: #include <cpu/amd/amdfam15.h> remove https://review.coreboot.org/#/c/29065/7/src/cpu/amd/pi/00660F01/model_15_in… PS7, Line 86: MCG_CAP IA32_MCG_CAP https://review.coreboot.org/#/c/29065/7/src/cpu/amd/pi/00730F01/model_16_in… File src/cpu/amd/pi/00730F01/model_16_init.c: https://review.coreboot.org/#/c/29065/7/src/cpu/amd/pi/00730F01/model_16_in… PS7, Line 29: include <cpu/amd/amdfam16.h> remove https://review.coreboot.org/#/c/29065/7/src/cpu/amd/pi/00730F01/model_16_in… PS7, Line 71: MCG_CAP IA32_MCG_CAP https://review.coreboot.org/#/c/29065/7/src/soc/amd/stoneyridge/cpu.c File src/soc/amd/stoneyridge/cpu.c: https://review.coreboot.org/#/c/29065/7/src/soc/amd/stoneyridge/cpu.c@23 PS7, Line 23: #include <cpu/amd/amdfam15.h remove https://review.coreboot.org/#/c/29065/7/src/soc/amd/stoneyridge/finalize.c File src/soc/amd/stoneyridge/finalize.c: https://review.coreboot.org/#/c/29065/7/src/soc/amd/stoneyridge/finalize.c@… PS7, Line 19: #include <cpu/amd/amdfam15.h> remove https://review.coreboot.org/#/c/29065/7/src/soc/amd/stoneyridge/ramtop.c File src/soc/amd/stoneyridge/ramtop.c: https://review.coreboot.org/#/c/29065/7/src/soc/amd/stoneyridge/ramtop.c@24 PS7, Line 24: #include <cpu/amd/amdfam15.h> remove -- To view, visit https://review.coreboot.org/29065 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0236e0960cd1e79558ea50c814e1de2830aa0550 Gerrit-Change-Number: 29065 Gerrit-PatchSet: 7 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Comment-Date: Fri, 12 Oct 2018 17:53:26 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: soc/amd/stoneyridge: Cleanup procedure pci_ehci_dbg_dev()
by Marc Jones (Code Review) 13 Oct '18

13 Oct '18

Marc Jones has posted comments on this change. ( https://review.coreboot.org/29071 ) Change subject: soc/amd/stoneyridge: Cleanup procedure pci_ehci_dbg_dev() ...................................................................... Patch Set 1: -Code-Review -- To view, visit https://review.coreboot.org/29071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I95eb2b7be53efe6a7cedf9a2a515d608f2643cf7 Gerrit-Change-Number: 29071 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 12 Oct 2018 17:46:55 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: Remove hudson EHCI debug controllers
by Martin Roth (Code Review) 13 Oct '18

13 Oct '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/29074 ) Change subject: soc/amd/stoneyridge: Remove hudson EHCI debug controllers ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2e819d5e998922ad427c4a094c29a590f249a0d3 Gerrit-Change-Number: 29074 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 12 Oct 2018 17:36:54 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: Rearrange southbridge.h more
by Martin Roth (Code Review) 13 Oct '18

13 Oct '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/29072 ) Change subject: soc/amd/stoneyridge: Rearrange southbridge.h more ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29072 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia722339418c118bdf4b000bbf97ae4266e9b3be2 Gerrit-Change-Number: 29072 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 12 Oct 2018 17:31:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: Define PM USB Enable register
by Martin Roth (Code Review) 13 Oct '18

13 Oct '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/29075 ) Change subject: soc/amd/stoneyridge: Define PM USB Enable register ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6018b0062730de19e3283a010144dfedc2b11423 Gerrit-Change-Number: 29075 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Fri, 12 Oct 2018 17:31:44 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: Cleanup procedure pci_ehci_dbg_dev()
by Marshall Dawson (Code Review) 13 Oct '18

13 Oct '18

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/29071 ) Change subject: soc/amd/stoneyridge: Cleanup procedure pci_ehci_dbg_dev() ...................................................................... Patch Set 1: Code-Review-1 I don't believe your patch will work, and it looks to me like you couldn't possibly have built your change. I was already working on a stack when you pushed this. See my version at https://review.coreboot.org/#/c/coreboot/+/29074/ -- To view, visit https://review.coreboot.org/29071 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I95eb2b7be53efe6a7cedf9a2a515d608f2643cf7 Gerrit-Change-Number: 29071 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 12 Oct 2018 17:30:26 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd/stoneyridge: Remove errant parenthesis in southbridge.h
by Martin Roth (Code Review) 13 Oct '18

13 Oct '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/29073 ) Change subject: soc/amd/stoneyridge: Remove errant parenthesis in southbridge.h ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29073 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5f461d1573e416b5a8ee24329142e3c46b6a05e3 Gerrit-Change-Number: 29073 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Fri, 12 Oct 2018 17:29:20 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit October 2018