coreboot-gerrit October 2018

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Change in coreboot[master]: mb: Fix non-local header treated as local
by Elyes HAOUAS (Code Review) 14 Oct '18

14 Oct '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29098 to look at the new patch set (#3). Change subject: mb: Fix non-local header treated as local ...................................................................... mb: Fix non-local header treated as local Change-Id: Ib39305effdb00e032ca07e6d0e0d84cdf3dcf916 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/amd/inagua/mainboard.c M src/mainboard/amd/inagua/mptable.c M src/mainboard/amd/persimmon/mainboard.c M src/mainboard/amd/persimmon/mptable.c M src/mainboard/amd/south_station/mainboard.c M src/mainboard/amd/south_station/mptable.c M src/mainboard/amd/union_station/mainboard.c M src/mainboard/amd/union_station/mptable.c M src/mainboard/asrock/e350m1/mainboard.c M src/mainboard/elmex/pcm205400/mainboard.c M src/mainboard/elmex/pcm205400/mptable.c M src/mainboard/gizmosphere/gizmo/mainboard.c M src/mainboard/gizmosphere/gizmo/mptable.c M src/mainboard/lippert/frontrunner-af/mainboard.c M src/mainboard/lippert/frontrunner-af/mptable.c M src/mainboard/lippert/toucan-af/mainboard.c M src/mainboard/lippert/toucan-af/mptable.c M src/mainboard/pcengines/apu1/gpio_ftns.c M src/mainboard/pcengines/apu1/mainboard.c M src/mainboard/pcengines/apu1/mptable.c 20 files changed, 22 insertions(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/29098/3 -- To view, visit https://review.coreboot.org/29098 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ib39305effdb00e032ca07e6d0e0d84cdf3dcf916 Gerrit-Change-Number: 29098 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mb: Fix non-local header treated as local
by Elyes HAOUAS (Code Review) 14 Oct '18

14 Oct '18

Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/29098 ) Change subject: mb: Fix non-local header treated as local ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/29098 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib39305effdb00e032ca07e6d0e0d84cdf3dcf916 Gerrit-Change-Number: 29098 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 14 Oct 2018 09:16:12 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb: Fix non-local header treated as local
by Elyes HAOUAS (Code Review) 14 Oct '18

14 Oct '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29098 Change subject: mb: Fix non-local header treated as local ...................................................................... mb: Fix non-local header treated as local Change-Id: Ib39305effdb00e032ca07e6d0e0d84cdf3dcf916 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/amd/inagua/mainboard.c M src/mainboard/amd/persimmon/mainboard.c M src/mainboard/amd/south_station/mainboard.c M src/mainboard/amd/union_station/mainboard.c M src/mainboard/asrock/e350m1/mainboard.c M src/mainboard/elmex/pcm205400/mainboard.c M src/mainboard/gizmosphere/gizmo/mainboard.c M src/mainboard/lippert/frontrunner-af/mainboard.c M src/mainboard/lippert/toucan-af/mainboard.c M src/mainboard/pcengines/apu1/gpio_ftns.c M src/mainboard/pcengines/apu1/mainboard.c 11 files changed, 11 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/29098/1 diff --git a/src/mainboard/amd/inagua/mainboard.c b/src/mainboard/amd/inagua/mainboard.c index 4be64f5..bee1074 100644 --- a/src/mainboard/amd/inagua/mainboard.c +++ b/src/mainboard/amd/inagua/mainboard.c @@ -17,7 +17,7 @@ #include <device/device.h> #include <southbridge/amd/sb800/sb800.h> -#include "SBPLATFORM.h" /* Platform Specific Definitions */ +#include <SBPLATFORM.h> /* Platform Specific Definitions */ static void init_gpios(void) { diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c index 95aec3d..9d3849d 100644 --- a/src/mainboard/amd/persimmon/mainboard.c +++ b/src/mainboard/amd/persimmon/mainboard.c @@ -20,7 +20,7 @@ #include <southbridge/amd/common/amd_pci_util.h> #include <southbridge/amd/cimx/cimx_util.h> -#include "SBPLATFORM.h" +#include <SBPLATFORM.h> #include <southbridge/amd/cimx/sb800/pci_devs.h> #include <northbridge/amd/agesa/family14/pci_devs.h> diff --git a/src/mainboard/amd/south_station/mainboard.c b/src/mainboard/amd/south_station/mainboard.c index 1587d32..187f960 100644 --- a/src/mainboard/amd/south_station/mainboard.c +++ b/src/mainboard/amd/south_station/mainboard.c @@ -18,7 +18,7 @@ #include <device/device.h> #include <southbridge/amd/sb800/sb800.h> -#include "SBPLATFORM.h" /* Platform Specific Definitions */ +#include <SBPLATFORM.h> /* Platform Specific Definitions */ /** * Southstation using SB GPIO 17/18 to control the Red/Green LED diff --git a/src/mainboard/amd/union_station/mainboard.c b/src/mainboard/amd/union_station/mainboard.c index 7ed27d8..82ed66b 100644 --- a/src/mainboard/amd/union_station/mainboard.c +++ b/src/mainboard/amd/union_station/mainboard.c @@ -17,7 +17,7 @@ #include <device/device.h> #include <southbridge/amd/sb800/sb800.h> -#include "SBPLATFORM.h" /* Platform Specific Definitions */ +#include <SBPLATFORM.h> /* Platform Specific Definitions */ /********************************************** * Enable the dedicated functions of the board. diff --git a/src/mainboard/asrock/e350m1/mainboard.c b/src/mainboard/asrock/e350m1/mainboard.c index f837842..47b0966 100644 --- a/src/mainboard/asrock/e350m1/mainboard.c +++ b/src/mainboard/asrock/e350m1/mainboard.c @@ -18,7 +18,7 @@ #include <arch/io.h> #include <southbridge/amd/cimx/cimx_util.h> -#include "SBPLATFORM.h" +#include <SBPLATFORM.h> /********************************************** * Enable the dedicated functions of the board. diff --git a/src/mainboard/elmex/pcm205400/mainboard.c b/src/mainboard/elmex/pcm205400/mainboard.c index 8f8b735..4c29f3c 100644 --- a/src/mainboard/elmex/pcm205400/mainboard.c +++ b/src/mainboard/elmex/pcm205400/mainboard.c @@ -19,7 +19,7 @@ #include <arch/io.h> #include <southbridge/amd/common/amd_pci_util.h> #include <southbridge/amd/cimx/cimx_util.h> -#include "SBPLATFORM.h" +#include <SBPLATFORM.h> #include <southbridge/amd/cimx/sb800/pci_devs.h> #include <northbridge/amd/agesa/family14/pci_devs.h> diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c index b02af0d..c482778 100644 --- a/src/mainboard/gizmosphere/gizmo/mainboard.c +++ b/src/mainboard/gizmosphere/gizmo/mainboard.c @@ -22,7 +22,7 @@ #include <device/pci_ops.h> #include <southbridge/amd/sb800/sb800.h> -#include "SBPLATFORM.h" +#include <SBPLATFORM.h> /********************************************** * Enable the dedicated functions of the board. diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c index 80810cc..d4e1504 100644 --- a/src/mainboard/lippert/frontrunner-af/mainboard.c +++ b/src/mainboard/lippert/frontrunner-af/mainboard.c @@ -21,7 +21,7 @@ #include <device/pci_def.h> #include <southbridge/amd/sb800/sb800.h> #include <arch/acpi.h> -#include "SBPLATFORM.h" +#include <SBPLATFORM.h> #include "OEM.h" /* SMBUS0_BASE_ADDRESS */ #include <southbridge/amd/cimx/sb800/gpio_oem.h> #include "sema.h" diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c index c6ab265..42b31d9 100644 --- a/src/mainboard/lippert/toucan-af/mainboard.c +++ b/src/mainboard/lippert/toucan-af/mainboard.c @@ -21,7 +21,7 @@ #include <device/pci_def.h> #include <southbridge/amd/sb800/sb800.h> #include <arch/acpi.h> -#include "SBPLATFORM.h" +#include <SBPLATFORM.h> #include "OEM.h" /* SMBUS0_BASE_ADDRESS */ #include <southbridge/amd/cimx/sb800/gpio_oem.h> #include "mainboard/lippert/frontrunner-af/sema.h" diff --git a/src/mainboard/pcengines/apu1/gpio_ftns.c b/src/mainboard/pcengines/apu1/gpio_ftns.c index 018fc0a..4890700 100644 --- a/src/mainboard/pcengines/apu1/gpio_ftns.c +++ b/src/mainboard/pcengines/apu1/gpio_ftns.c @@ -15,7 +15,7 @@ #include <stdint.h> #include <arch/io.h> -#include "SBPLATFORM.h" +#include <SBPLATFORM.h> #include <southbridge/amd/cimx/cimx_util.h> #include "gpio_ftns.h" diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c index de94937..747db15 100644 --- a/src/mainboard/pcengines/apu1/mainboard.c +++ b/src/mainboard/pcengines/apu1/mainboard.c @@ -24,7 +24,7 @@ #include <arch/acpi.h> #include <smbios.h> #include <string.h> -#include "SBPLATFORM.h" +#include <SBPLATFORM.h> #include <southbridge/amd/cimx/sb800/pci_devs.h> #include <northbridge/amd/agesa/family14/pci_devs.h> #include <superio/nuvoton/nct5104d/nct5104d.h> -- To view, visit https://review.coreboot.org/29098 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib39305effdb00e032ca07e6d0e0d84cdf3dcf916 Gerrit-Change-Number: 29098 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: mb/asrock/g41m-vs3-r2: Allow to set the fixed duty cycle from rtc nvram
by Felix Held (Code Review) 13 Oct '18

13 Oct '18

Felix Held has posted comments on this change. ( https://review.coreboot.org/28714 ) Change subject: mb/asrock/g41m-vs3-r2: Allow to set the fixed duty cycle from rtc nvram ...................................................................... Patch Set 3: This patch adds superio-specific things to the mainboard directly; I'd strongly prefer if the code was added to the superio support. Have a look at the w83697hf or it8718f code and see how that's done there -- To view, visit https://review.coreboot.org/28714 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ifb5bbb578182e88f4f7ba4e0e47404241b1a1962 Gerrit-Change-Number: 28714 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sat, 13 Oct 2018 12:35:46 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: amd {cpu, drivers}: Replace MSR addresses with macros
by Elyes HAOUAS (Code Review) 13 Oct '18

13 Oct '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29097 Change subject: amd {cpu,drivers}: Replace MSR addresses with macros ...................................................................... amd {cpu,drivers}: Replace MSR addresses with macros Change-Id: I30d906e586d8f61701f961c247215d138cafe74d Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/cpu/amd/agesa/family14/model_14_init.c M src/cpu/amd/agesa/family15tn/model_15_init.c M src/cpu/amd/agesa/family16kb/model_16_init.c M src/cpu/amd/pi/00630F01/model_15_init.c M src/cpu/amd/pi/00660F01/model_15_init.c M src/cpu/amd/pi/00730F01/model_16_init.c M src/drivers/amd/agesa/s3_mtrr.c 7 files changed, 28 insertions(+), 28 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/29097/1 diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index 3f0501e..12f3ef1 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -55,11 +55,11 @@ /* Set shadow WB, RdMEM, WrMEM */ msr.lo = msr.hi = 0; - wrmsr (0x259, msr); + wrmsr(MTRR_FIX_16K_A0000, msr); msr.lo = msr.hi = 0x1e1e1e1e; - wrmsr(0x250, msr); - wrmsr(0x258, msr); - for (msrno = 0x268; msrno <= 0x26f; msrno++) + wrmsr(MTRR_FIX_64K_00000, msr); + wrmsr(MTRR_FIX_16K_80000, msr); + for (msrno = MTRR_FIX_4K_C0000; msrno <= MTRR_FIX_4K_F8000; msrno++) wrmsr(msrno, msr); msr = rdmsr(SYSCFG_MSR); diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index d188bcc..95f1baa 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -54,11 +54,11 @@ // BSP: make a0000-bffff UC, c0000-fffff WB, same as OntarioApMtrrSettingsList for APs msr.lo = msr.hi = 0; - wrmsr (0x259, msr); + wrmsr(MTRR_FIX_16K_A0000, msr); msr.lo = msr.hi = 0x1e1e1e1e; - wrmsr(0x250, msr); - wrmsr(0x258, msr); - for (msrno = 0x268; msrno <= 0x26f; msrno++) + wrmsr(MTRR_FIX_64K_00000, msr); + wrmsr(MTRR_FIX_16K_80000, msr); + for (msrno = MTRR_FIX_4K_C0000; msrno <= MTRR_FIX_4K_F8000; msrno++) wrmsr (msrno, msr); msr = rdmsr(SYSCFG_MSR); diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index 286bcc3..12d66f9 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -52,11 +52,11 @@ // BSP: make a0000-bffff UC, c0000-fffff WB, same as OntarioApMtrrSettingsList for APs msr.lo = msr.hi = 0; - wrmsr (0x259, msr); + wrmsr(MTRR_FIX_16K_A0000, msr); msr.lo = msr.hi = 0x1e1e1e1e; - wrmsr(0x250, msr); - wrmsr(0x258, msr); - for (msrno = 0x268; msrno <= 0x26f; msrno++) + wrmsr(MTRR_FIX_64K_00000, msr); + wrmsr(MTRR_FIX_16K_80000, msr); + for (msrno = MTRR_FIX_4K_C0000; msrno <= MTRR_FIX_4K_F8000; msrno++) wrmsr (msrno, msr); msr = rdmsr(SYSCFG_MSR); diff --git a/src/cpu/amd/pi/00630F01/model_15_init.c b/src/cpu/amd/pi/00630F01/model_15_init.c index 503d531..aa7afc2 100644 --- a/src/cpu/amd/pi/00630F01/model_15_init.c +++ b/src/cpu/amd/pi/00630F01/model_15_init.c @@ -54,11 +54,11 @@ * same as OntarioApMtrrSettingsList for APs */ msr.lo = msr.hi = 0; - wrmsr(0x259, msr); + wrmsr(MTRR_FIX_16K_A0000, msr); msr.lo = msr.hi = 0x1e1e1e1e; - wrmsr(0x250, msr); - wrmsr(0x258, msr); - for (msrno = 0x268; msrno <= 0x26f; msrno++) + wrmsr(MTRR_FIX_64K_00000, msr); + wrmsr(MTRR_FIX_16K_80000, msr); + for (msrno = MTRR_FIX_4K_C0000; msrno <= MTRR_FIX_4K_F8000; msrno++) wrmsr(msrno, msr); msr = rdmsr(SYSCFG_MSR); diff --git a/src/cpu/amd/pi/00660F01/model_15_init.c b/src/cpu/amd/pi/00660F01/model_15_init.c index 3f3a1fd..a7822cf 100644 --- a/src/cpu/amd/pi/00660F01/model_15_init.c +++ b/src/cpu/amd/pi/00660F01/model_15_init.c @@ -66,11 +66,11 @@ // BSP: make a0000-bffff UC, c0000-fffff WB msr.lo = msr.hi = 0; - wrmsr(0x259, msr); + wrmsr(MTRR_FIX_16K_A0000, msr); msr.lo = msr.hi = 0x1e1e1e1e; - wrmsr(0x250, msr); - wrmsr(0x258, msr); - for (msrno = 0x268; msrno <= 0x26f; msrno++) + wrmsr(MTRR_FIX_64K_00000, msr); + wrmsr(MTRR_FIX_16K_80000, msr); + for (msrno = MTRR_FIX_4K_C0000; msrno <= MTRR_FIX_4K_F8000; msrno++) wrmsr(msrno, msr); msr = rdmsr(SYSCFG_MSR); diff --git a/src/cpu/amd/pi/00730F01/model_16_init.c b/src/cpu/amd/pi/00730F01/model_16_init.c index f5121d1..ecaa3ef 100644 --- a/src/cpu/amd/pi/00730F01/model_16_init.c +++ b/src/cpu/amd/pi/00730F01/model_16_init.c @@ -51,11 +51,11 @@ * same as OntarioApMtrrSettingsList for APs */ msr.lo = msr.hi = 0; - wrmsr(0x259, msr); + wrmsr(MTRR_FIX_16K_A0000, msr); msr.lo = msr.hi = 0x1e1e1e1e; - wrmsr(0x250, msr); - wrmsr(0x258, msr); - for (msrno = 0x268; msrno <= 0x26f; msrno++) + wrmsr(MTRR_FIX_64K_00000, msr); + wrmsr(MTRR_FIX_16K_80000, msr); + for (msrno = MTRR_FIX_4K_C0000; msrno <= MTRR_FIX_4K_F8000; msrno++) wrmsr(msrno, msr); msr = rdmsr(SYSCFG_MSR); diff --git a/src/drivers/amd/agesa/s3_mtrr.c b/src/drivers/amd/agesa/s3_mtrr.c index c039abe..0a87ed3 100644 --- a/src/drivers/amd/agesa/s3_mtrr.c +++ b/src/drivers/amd/agesa/s3_mtrr.c @@ -89,21 +89,21 @@ msrPtr ++; msr_data.hi = *msrPtr; msrPtr ++; - wrmsr(0x250, msr_data); + wrmsr(MTRR_FIX_64K_00000, msr_data); msr_data.lo = *msrPtr; msrPtr ++; msr_data.hi = *msrPtr; msrPtr ++; - wrmsr(0x258, msr_data); + wrmsr(MTRR_FIX_16K_80000, msr_data); msr_data.lo = *msrPtr; msrPtr ++; msr_data.hi = *msrPtr; msrPtr ++; - wrmsr(0x259, msr_data); + wrmsr(MTRR_FIX_16K_A0000, msr_data); - for (msr = 0x268; msr <= 0x26F; msr++) { + for (msr = MTRR_FIX_4K_C0000; msr <= MTRR_FIX_4K_F8000; msr++) { msr_data.lo = *msrPtr; msrPtr ++; msr_data.hi = *msrPtr; -- To view, visit https://review.coreboot.org/29097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I30d906e586d8f61701f961c247215d138cafe74d Gerrit-Change-Number: 29097 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: mb/clevo/n130wu: Add mainboard
by Philipp Deppenwiese (Code Review) 13 Oct '18

13 Oct '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/28640 ) Change subject: mb/clevo/n130wu: Add mainboard ...................................................................... Patch Set 22: any updates and more descriptive commit message ?? -- To view, visit https://review.coreboot.org/28640 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I364f5849ef88f43b85efbd7a635a27e54d08c513 Gerrit-Change-Number: 28640 Gerrit-PatchSet: 22 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Comment-Date: Fri, 12 Oct 2018 23:30:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: util/abuild: When using blobs, enable 3rdparty/fsp by default
by Philipp Deppenwiese (Code Review) 13 Oct '18

13 Oct '18

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/28776 ) Change subject: util/abuild: When using blobs, enable 3rdparty/fsp by default ...................................................................... util/abuild: When using blobs, enable 3rdparty/fsp by default This is a no-op on non-FSP systems, but enables using it when supported. Change-Id: I66fe9b8587753ea017e13a752a7728e47287e9a0 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: https://review.coreboot.org/28776 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martinroth(a)google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M util/abuild/abuild 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Philipp Deppenwiese: Looks good to me, approved diff --git a/util/abuild/abuild b/util/abuild/abuild index 3228d09..9afd364 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -696,7 +696,7 @@ shift;; -B|--blobs) shift customizing="${customizing}, blobs" - configoptions="${configoptions}CONFIG_USE_BLOBS=y\n" + configoptions="${configoptions}CONFIG_USE_BLOBS=y\nCONFIG_ADD_FSP_BINARIES=y\nCONFIG_FSP_USE_REPO=y\n" ;; -A|--any-toolchain) shift customizing="${customizing}, any-toolchain" -- To view, visit https://review.coreboot.org/28776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I66fe9b8587753ea017e13a752a7728e47287e9a0 Gerrit-Change-Number: 28776 Gerrit-PatchSet: 7 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Naresh Solanki <naresh.solanki(a)intel.com>

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Change in coreboot[master]: util/abuild: When using blobs, enable 3rdparty/fsp by default
by Philipp Deppenwiese (Code Review) 13 Oct '18

13 Oct '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/28776 ) Change subject: util/abuild: When using blobs, enable 3rdparty/fsp by default ...................................................................... Patch Set 6: Code-Review+2 -- To view, visit https://review.coreboot.org/28776 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I66fe9b8587753ea017e13a752a7728e47287e9a0 Gerrit-Change-Number: 28776 Gerrit-PatchSet: 6 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Comment-Date: Fri, 12 Oct 2018 23:22:08 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: 3rdparty/blobs: Update to include QuarkFsp
by Philipp Deppenwiese (Code Review) 13 Oct '18

13 Oct '18

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/29030 ) Change subject: 3rdparty/blobs: Update to include QuarkFsp ...................................................................... 3rdparty/blobs: Update to include QuarkFsp Change-Id: I0032e86755750755e7ae6e2a53863e1600f96a5b Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-on: https://review.coreboot.org/29030 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martinroth(a)google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M 3rdparty/blobs 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Philipp Deppenwiese: Looks good to me, approved diff --git a/3rdparty/blobs b/3rdparty/blobs index 372012e..dd00ad1 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit 372012e8e1d0d01f3e77ff73b118665b41ff68b6 +Subproject commit dd00ad1260ef1dc0ba8c55c06ab10c7639dc3eb1 -- To view, visit https://review.coreboot.org/29030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I0032e86755750755e7ae6e2a53863e1600f96a5b Gerrit-Change-Number: 29030 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: 3rdparty/blobs: Update to include QuarkFsp
by Philipp Deppenwiese (Code Review) 13 Oct '18

13 Oct '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/29030 ) Change subject: 3rdparty/blobs: Update to include QuarkFsp ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0032e86755750755e7ae6e2a53863e1600f96a5b Gerrit-Change-Number: 29030 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 12 Oct 2018 23:21:32 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit October 2018