coreboot-gerrit October 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/octopus/variants/fleex: Disable I2C0 in devicetree
by Furquan Shaikh (Code Review) 05 Oct '18

05 Oct '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/28931 Change subject: mb/google/octopus/variants/fleex: Disable I2C0 in devicetree ...................................................................... mb/google/octopus/variants/fleex: Disable I2C0 in devicetree Fleex does not have any device on I2C0 and hence this change disables I2C0 device (16.0) in devicetree and gets rid of the I2C tuning parameters for I2C0. BUG=b:115600671 Change-Id: Ib799eae05b667cee2272bbd37f0ca44b7cec66cd Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/octopus/variants/fleex/overridetree.cb 1 file changed, 1 insertion(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/28931/1 diff --git a/src/mainboard/google/octopus/variants/fleex/overridetree.cb b/src/mainboard/google/octopus/variants/fleex/overridetree.cb index 792e057..c431e04 100644 --- a/src/mainboard/google/octopus/variants/fleex/overridetree.cb +++ b/src/mainboard/google/octopus/variants/fleex/overridetree.cb @@ -18,11 +18,6 @@ .speed_mhz = 1, .early_init = 1, }, - .i2c[0] = { - .speed = I2C_SPEED_FAST, - .rise_time_ns = 152, - .fall_time_ns = 30, - }, .i2c[5] = { .speed = I2C_SPEED_FAST, .rise_time_ns = 104, @@ -42,6 +37,7 @@ }" device domain 0 on + device pci 16.0 off end # - I2C 0 device pci 16.1 off end # - I2C 1 device pci 17.1 on chip drivers/i2c/da7219 -- To view, visit https://review.coreboot.org/28931 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib799eae05b667cee2272bbd37f0ca44b7cec66cd Gerrit-Change-Number: 28931 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: mb/google/octopus: Disable I2C3 in devicetree
by Furquan Shaikh (Code Review) 05 Oct '18

05 Oct '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/28930 Change subject: mb/google/octopus: Disable I2C3 in devicetree ...................................................................... mb/google/octopus: Disable I2C3 in devicetree I2C3 is connected to the debug header and won't be required unless connecting the debugger. This change disables I2C3 device (16.3) in devicetree. Change-Id: I650fa040075119a21864c83d8470dd2155c9edb9 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/octopus/variants/baseboard/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/28930/1 diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index cec4ba7..3d22525 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -148,7 +148,7 @@ device pci 16.0 on end # - I2C 0 device pci 16.1 on end # - I2C 1 device pci 16.2 off end # - I2C 2 - device pci 16.3 on end # - I2C 3 + device pci 16.3 off end # - I2C 3 device pci 17.0 on end # - I2C 4 device pci 17.1 on end # - I2C 5 device pci 17.2 on end # - I2C 6 -- To view, visit https://review.coreboot.org/28930 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I650fa040075119a21864c83d8470dd2155c9edb9 Gerrit-Change-Number: 28930 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: mb/google/kahlee: Don't set stapm parameters
by Martin Roth (Code Review) 05 Oct '18

05 Oct '18

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/28925 ) Change subject: mb/google/kahlee: Don't set stapm parameters ...................................................................... mb/google/kahlee: Don't set stapm parameters Setting the stapm parameters is causing S3 resume failures and performance issues. Removing these settings until more testing is done and the issues are solved. BUG=b:117252463, b:116870267 TEST=boot grunt Change-Id: I2299ab81fcc2af0529bfac3be562b05116c64a49 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/28925 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Raul Rangel <rrangel(a)chromium.org> Reviewed-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M src/mainboard/google/kahlee/variants/careena/devicetree.cb M src/mainboard/google/kahlee/variants/grunt/devicetree.cb 2 files changed, 10 insertions(+), 6 deletions(-) Approvals: build bot (Jenkins): Verified Richard Spiegel: Looks good to me, approved Raul Rangel: Looks good to me, approved diff --git a/src/mainboard/google/kahlee/variants/careena/devicetree.cb b/src/mainboard/google/kahlee/variants/careena/devicetree.cb index eb2acb9..08d4d4d 100644 --- a/src/mainboard/google/kahlee/variants/careena/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/careena/devicetree.cb @@ -20,9 +20,11 @@ register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" register "uma_size" = "32 * MiB" - register "stapm_percent" = "68" - register "stapm_time" = "2500" - register "stapm_power" = "7800" + + # Don't set STAPM values for now + # register "stapm_percent" = "68" + # register "stapm_time" = "2500" + # register "stapm_power" = "7800" # Enable I2C0 for audio, USB3 hub at 400kHz register "i2c[0]" = "{ diff --git a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb index 228ead2..128de7d 100644 --- a/src/mainboard/google/kahlee/variants/grunt/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/grunt/devicetree.cb @@ -20,9 +20,11 @@ register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" register "uma_mode" = "UMAMODE_SPECIFIED_SIZE" register "uma_size" = "32 * MiB" - register "stapm_percent" = "80" - register "stapm_time" = "2500" - register "stapm_power" = "7800" + + # For now, don't set STAPM values + # register "stapm_percent" = "80" + # register "stapm_time" = "2500" + # register "stapm_power" = "7800" # Enable I2C0 for audio, USB3 hub at 400kHz register "i2c[0]" = "{ -- To view, visit https://review.coreboot.org/28925 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I2299ab81fcc2af0529bfac3be562b05116c64a49 Gerrit-Change-Number: 28925 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: util/cbmem/Makefile: Remove .dependencies on `clean`
by Nico Huber (Code Review) 04 Oct '18

04 Oct '18

Nico Huber has uploaded a new patch set (#2). ( https://review.coreboot.org/28928 ) Change subject: util/cbmem/Makefile: Remove .dependencies on `clean` ...................................................................... util/cbmem/Makefile: Remove .dependencies on `clean` Change-Id: Ic122b3eaed54e29bbb3e11de84822169c81c04eb Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M util/cbmem/Makefile 1 file changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/28928/2 -- To view, visit https://review.coreboot.org/28928 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ic122b3eaed54e29bbb3e11de84822169c81c04eb Gerrit-Change-Number: 28928 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in coreboot[master]: Move compiler.h to commonlib
by Nico Huber (Code Review) 04 Oct '18

04 Oct '18

Nico Huber has uploaded a new patch set (#2). ( https://review.coreboot.org/28927 ) Change subject: Move compiler.h to commonlib ...................................................................... Move compiler.h to commonlib Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/arch/arm/include/arch/hlt.h M src/arch/arm/stages.c M src/arch/arm64/arm_tf.c M src/arch/arm64/boot.c M src/arch/arm64/include/arch/hlt.h M src/arch/arm64/transition.c M src/arch/mips/include/arch/hlt.h M src/arch/power8/include/arch/hlt.h M src/arch/riscv/include/arch/hlt.h M src/arch/riscv/include/arch/io.h M src/arch/x86/acpi.c M src/arch/x86/acpi_s3.c M src/arch/x86/acpigen.c M src/arch/x86/cbmem.c M src/arch/x86/exception.c M src/arch/x86/gdt.c M src/arch/x86/include/arch/acpi.h M src/arch/x86/include/arch/hlt.h M src/arch/x86/include/arch/io.h M src/arch/x86/include/arch/pci_io_cfg.h M src/arch/x86/include/arch/pci_mmio_cfg.h M src/arch/x86/include/arch/pirq_routing.h M src/arch/x86/include/arch/registers.h M src/arch/x86/include/arch/smp/atomic.h M src/arch/x86/include/arch/smp/mpspec.h M src/arch/x86/include/arch/smp/spinlock.h M src/arch/x86/mpspec.c M src/arch/x86/pirq_routing.c M src/arch/x86/postcar.c M src/arch/x86/smbios.c M src/arch/x86/timestamp.c M src/commonlib/fsp_relocate.c M src/commonlib/include/commonlib/cbfs_serialized.h R src/commonlib/include/commonlib/compiler.h M src/commonlib/include/commonlib/fmap_serialized.h M src/commonlib/include/commonlib/rmodule-defs.h M src/commonlib/include/commonlib/tcpa_log_serialized.h M src/commonlib/include/commonlib/timestamp_serialized.h M src/commonlib/lz4_wrapper.c M src/commonlib/storage/sdhci.c M src/console/die.c M src/console/post.c M src/cpu/allwinner/a10/clock.h M src/cpu/allwinner/a10/gpio.h M src/cpu/allwinner/a10/timer.h M src/cpu/allwinner/a10/uart.h M src/cpu/amd/car/disable_cache_as_ram.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/intel/microcode/microcode.c M src/cpu/intel/smm/gen1/smmrelocate.c M src/cpu/ti/am335x/clock.h M src/cpu/ti/am335x/gpio.h M src/cpu/ti/am335x/header.c M src/cpu/ti/am335x/header.h M src/cpu/ti/am335x/uart.h M src/cpu/x86/mp_init.c M src/cpu/x86/pae/pgtbl.c M src/cpu/x86/smm/smihandler.c M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/device/oprom/yabel/device.c M src/device/oprom/yabel/device.h M src/device/oprom/yabel/pmm.h M src/device/pci_rom.c M src/drivers/amd/agesa/romstage.c M src/drivers/amd/agesa/state_machine.c M src/drivers/elog/boot_count.c M src/drivers/elog/elog_internal.h M src/drivers/elog/gsmi.c M src/drivers/i2c/designware/dw_i2c.h M src/drivers/i2c/tpm/cr50.c M src/drivers/i2c/tpm/tis_atmel.c M src/drivers/intel/fsp1_0/fsp_util.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/fsp1_1/car.c M src/drivers/intel/fsp1_1/fsp_util.c M src/drivers/intel/fsp1_1/raminit.c M src/drivers/intel/fsp1_1/ramstage.c M src/drivers/intel/fsp1_1/romstage.c M src/drivers/intel/fsp2_0/graphics.c M src/drivers/intel/fsp2_0/hob_display.c M src/drivers/intel/fsp2_0/include/fsp/upd.h M src/drivers/intel/fsp2_0/include/fsp/util.h M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/intel/fsp2_0/notify.c M src/drivers/intel/fsp2_0/upd_display.c M src/drivers/intel/gma/intel_bios.h M src/drivers/intel/gma/opregion.h M src/drivers/intel/mipi_camera/chip.h M src/drivers/intel/wifi/wifi.c M src/drivers/mrc_cache/mrc_cache.c M src/drivers/siemens/nc_fpga/nc_fpga.h M src/drivers/spi/spi-generic.c M src/drivers/spi/tpm/tpm.c M src/drivers/usb/ehci.h M src/drivers/usb/usb_ch9.h M src/drivers/vpd/vpd_tables.h M src/ec/google/chromeec/crosec_proto.c M src/include/console/console.h M src/include/console/spi.h M src/include/cpu/amd/mtrr.h M src/include/cpu/x86/cache.h M src/include/cpu/x86/cr.h M src/include/cpu/x86/lapic.h M src/include/cpu/x86/msr.h M src/include/cpu/x86/smm.h M src/include/device/pci_ops.h M src/include/elog.h M src/include/halt.h M src/include/memory_info.h M src/include/reset.h M src/include/sar.h M src/include/smbios.h M src/include/vbe.h M src/lib/boot_device.c M src/lib/bootblock.c M src/lib/cbfs.c M src/lib/cbmem_common.c M src/lib/cbmem_console.c M src/lib/coreboot_table.c M src/lib/fallback_boot.c M src/lib/gpio.c M src/lib/hardwaremain.c M src/lib/imd.c M src/lib/imd_cbmem.c M src/lib/prog_loaders.c M src/lib/prog_ops.c M src/lib/reset.c M src/lib/timer.c M src/lib/timestamp.c M src/lib/wrdd.c M src/mainboard/emulation/qemu-i440fx/fw_cfg.c M src/mainboard/google/cyan/romstage.c M src/mainboard/google/cyan/spd/spd.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/kahlee/romstage.c M src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c M src/mainboard/google/kahlee/variants/baseboard/gpio.c M src/mainboard/google/kahlee/variants/baseboard/memory.c M src/mainboard/google/octopus/mainboard.c M src/mainboard/google/octopus/variants/baseboard/gpio.c M src/mainboard/google/octopus/variants/baseboard/memory.c M src/mainboard/google/octopus/variants/baseboard/nhlt.c M src/mainboard/google/poppy/ramstage.c M src/mainboard/google/poppy/variants/baseboard/gpio.c M src/mainboard/google/poppy/variants/baseboard/memory.c M src/mainboard/google/poppy/variants/baseboard/nhlt.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/reef/mainboard.c M src/mainboard/google/reef/variants/baseboard/gpio.c M src/mainboard/google/reef/variants/baseboard/memory.c M src/mainboard/google/reef/variants/baseboard/nhlt.c M src/mainboard/google/zoombini/memory.c M src/mainboard/google/zoombini/variants/baseboard/gpio.c M src/mainboard/google/zoombini/variants/baseboard/nhlt.c M src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c M src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c M src/mainboard/intel/coffeelake_rvp/memory.c M src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c M src/mainboard/intel/galileo/vboot.c M src/mainboard/intel/glkrvp/chromeos.c M src/mainboard/intel/glkrvp/variants/baseboard/boardid.c M src/mainboard/intel/glkrvp/variants/baseboard/gpio.c M src/mainboard/intel/glkrvp/variants/baseboard/memory.c M src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c M src/mainboard/siemens/mc_apl1/mainboard.c M src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c M src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c M src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h M src/mainboard/siemens/mc_tcu3/ptn3460.h M src/northbridge/amd/amdfam10/amdfam10.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/lx/raminit.c M src/northbridge/amd/pi/agesawrapper.c M src/northbridge/intel/e7505/raminit.c M src/northbridge/intel/haswell/haswell.h M src/northbridge/intel/haswell/pei_data.h M src/northbridge/intel/i945/raminit.h M src/northbridge/intel/nehalem/raminit.c M src/northbridge/intel/sandybridge/pei_data.h M src/northbridge/intel/sandybridge/raminit.h M src/northbridge/intel/sandybridge/raminit_mrc.c M src/security/tpm/tss/tcg-2.0/tss_structures.h M src/security/vboot/bootmode.c M src/security/vboot/vboot_common.c M src/security/vboot/vboot_common.h M src/security/vboot/vboot_logic.c M src/security/vboot/verstage.c M src/soc/amd/common/block/include/amdblocks/psp.h M src/soc/amd/common/block/pi/agesawrapper.c M src/soc/amd/common/block/pi/def_callouts.c M src/soc/amd/stoneyridge/BiosCallOuts.c M src/soc/amd/stoneyridge/gpio.c M src/soc/amd/stoneyridge/include/soc/nvs.h M src/soc/amd/stoneyridge/romstage.c M src/soc/amd/stoneyridge/usb.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cse.c M src/soc/intel/apollolake/include/soc/nvs.h M src/soc/intel/apollolake/include/soc/pm.h M src/soc/intel/apollolake/romstage.c M src/soc/intel/baytrail/gpio.c M src/soc/intel/baytrail/include/soc/device_nvs.h M src/soc/intel/baytrail/include/soc/efi_wrapper.h M src/soc/intel/baytrail/include/soc/gpio.h M src/soc/intel/baytrail/include/soc/mrc_wrapper.h M src/soc/intel/baytrail/include/soc/nvs.h M src/soc/intel/baytrail/include/soc/pmc.h M src/soc/intel/baytrail/southcluster.c M src/soc/intel/baytrail/spi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/chip.c M src/soc/intel/braswell/gpio.c M src/soc/intel/braswell/include/soc/device_nvs.h M src/soc/intel/braswell/include/soc/gpio.h M src/soc/intel/braswell/include/soc/nvs.h M src/soc/intel/braswell/include/soc/pm.h M src/soc/intel/braswell/southcluster.c M src/soc/intel/braswell/spi.c M src/soc/intel/broadwell/include/soc/device_nvs.h M src/soc/intel/broadwell/include/soc/gpio.h M src/soc/intel/broadwell/include/soc/me.h M src/soc/intel/broadwell/include/soc/nvs.h M src/soc/intel/broadwell/include/soc/pei_data.h M src/soc/intel/broadwell/include/soc/smm.h M src/soc/intel/broadwell/romstage/romstage.c M src/soc/intel/broadwell/spi.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/include/soc/nvs.h M src/soc/intel/cannonlake/include/soc/pm.h M src/soc/intel/cannonlake/reset.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/acpi_wake_source.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/ebda/ebda.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/gspi/gspi.c M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/common/block/pmc/pmclib.c M src/soc/intel/common/block/rtc/rtc.c M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/common/block/sram/sram.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/common/block/uart/uart.c M src/soc/intel/common/block/xdci/xdci.c M src/soc/intel/common/block/xhci/xhci.c M src/soc/intel/common/mma.c M src/soc/intel/common/vbt.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/fiamux.c M src/soc/intel/denverton_ns/romstage.c M src/soc/intel/fsp_baytrail/gpio.c M src/soc/intel/fsp_baytrail/include/soc/device_nvs.h M src/soc/intel/fsp_baytrail/include/soc/gpio.h M src/soc/intel/fsp_baytrail/include/soc/nvs.h M src/soc/intel/fsp_baytrail/include/soc/pmc.h M src/soc/intel/fsp_baytrail/spi.c M src/soc/intel/fsp_broadwell_de/include/soc/gpio.h M src/soc/intel/fsp_broadwell_de/include/soc/smm.h M src/soc/intel/fsp_broadwell_de/spi.c M src/soc/intel/quark/gpio_i2c.c M src/soc/intel/quark/include/soc/pei_wrapper.h M src/soc/intel/quark/include/soc/pm.h M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/include/soc/device_nvs.h M src/soc/intel/skylake/include/soc/me.h M src/soc/intel/skylake/include/soc/nvs.h M src/soc/intel/skylake/include/soc/pei_data.h M src/soc/intel/skylake/include/soc/pm.h M src/soc/intel/skylake/include/soc/smm.h M src/soc/intel/skylake/me.c M src/soc/intel/skylake/romstage/romstage_fsp20.c M src/soc/mediatek/common/mmu_operations.c M src/soc/mediatek/common/timer.c M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/include/soc/clk_rst.h M src/soc/nvidia/tegra124/include/soc/dma.h M src/soc/nvidia/tegra124/include/soc/emc.h M src/soc/nvidia/tegra124/include/soc/spi.h M src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/bootblock.c M src/soc/nvidia/tegra210/funitcfg.c M src/soc/nvidia/tegra210/include/soc/clk_rst.h M src/soc/nvidia/tegra210/include/soc/clst_clk.h M src/soc/nvidia/tegra210/include/soc/dma.h M src/soc/nvidia/tegra210/include/soc/emc.h M src/soc/nvidia/tegra210/include/soc/spi.h M src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c M src/soc/nvidia/tegra210/romstage.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/ipq40xx/include/soc/cdp.h M src/soc/qualcomm/ipq40xx/lcc.c M src/soc/qualcomm/ipq806x/include/soc/cdp.h M src/soc/qualcomm/ipq806x/lcc.c M src/soc/samsung/exynos5250/i2c.c M src/soc/samsung/exynos5250/include/soc/power.h M src/soc/samsung/exynos5420/i2c.c M src/soc/samsung/exynos5420/include/soc/dmc.h M src/soc/samsung/exynos5420/include/soc/power.h M src/southbridge/amd/sb700/sata.c M src/southbridge/intel/bd82x6x/me.h M src/southbridge/intel/bd82x6x/nvs.h M src/southbridge/intel/common/gpio.h M src/southbridge/intel/common/smihandler.c M src/southbridge/intel/common/spi.c M src/southbridge/intel/fsp_bd82x6x/gpio.h M src/southbridge/intel/fsp_bd82x6x/me.h M src/southbridge/intel/fsp_bd82x6x/nvs.h M src/southbridge/intel/fsp_i89xx/gpio.h M src/southbridge/intel/fsp_i89xx/me.h M src/southbridge/intel/fsp_i89xx/nvs.h M src/southbridge/intel/fsp_rangeley/gpio.h M src/southbridge/intel/fsp_rangeley/nvs.h M src/southbridge/intel/fsp_rangeley/spi.c M src/southbridge/intel/i82801dx/nvs.h M src/southbridge/intel/i82801gx/nvs.h M src/southbridge/intel/i82801ix/nvs.h M src/southbridge/intel/i82801jx/nvs.h M src/southbridge/intel/ibexpeak/me.h M src/southbridge/intel/ibexpeak/nvs.h M src/southbridge/intel/lynxpoint/lp_gpio.h M src/southbridge/intel/lynxpoint/me.h M src/southbridge/intel/lynxpoint/nvs.h M src/southbridge/ricoh/rl5c476/rl5c476.h M src/vendorcode/google/chromeos/gnvs.h M util/cbfstool/Makefile.inc M util/cbfstool/cbfs.h D util/cbfstool/compiler.h M util/cbfstool/fit.c M util/cbfstool/flashmap/fmap.h M util/cbfstool/ifwitool.c D util/cbmem/compiler.h 336 files changed, 354 insertions(+), 408 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/28927/2 -- To view, visit https://review.coreboot.org/28927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Gerrit-Change-Number: 28927 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

1 0

Change in coreboot[master]: util/cbmem/Makefile: Remove .dependencies on `clean`
by Nico Huber (Code Review) 04 Oct '18

04 Oct '18

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/28928 Change subject: util/cbmem/Makefile: Remove .dependencies on `clean` ...................................................................... util/cbmem/Makefile: Remove .dependencies on `clean` Change-Id: Ic122b3eaed54e29bbb3e11de84822169c81c04eb Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M util/cbmem/Makefile 1 file changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/28928/1 diff --git a/util/cbmem/Makefile b/util/cbmem/Makefile index 694cac7..711e17e 100644 --- a/util/cbmem/Makefile +++ b/util/cbmem/Makefile @@ -29,14 +29,13 @@ $(PROGRAM): $(OBJS) clean: - rm -f $(PROGRAM) *.o *~ junit.xml + rm -f $(PROGRAM) *.o .dependencies *~ junit.xml install: $(PROGRAM) $(INSTALL) -d $(DESTDIR)$(PREFIX)/sbin/ $(INSTALL) cbmem $(DESTDIR)$(PREFIX)/sbin/ distclean: clean - rm -f .dependencies .dependencies: @$(CC) $(CFLAGS) $(CPPFLAGS) -MM *.c > .dependencies -- To view, visit https://review.coreboot.org/28928 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic122b3eaed54e29bbb3e11de84822169c81c04eb Gerrit-Change-Number: 28928 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

1 0

Change in coreboot[master]: Move compiler.h to commonlib
by Nico Huber (Code Review) 04 Oct '18

04 Oct '18

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/28927 Change subject: Move compiler.h to commonlib ...................................................................... Move compiler.h to commonlib Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M src/arch/arm/include/arch/hlt.h M src/arch/arm/stages.c M src/arch/arm64/arm_tf.c M src/arch/arm64/boot.c M src/arch/arm64/include/arch/hlt.h M src/arch/arm64/transition.c M src/arch/mips/include/arch/hlt.h M src/arch/power8/include/arch/hlt.h M src/arch/riscv/include/arch/hlt.h M src/arch/riscv/include/arch/io.h M src/arch/x86/acpi.c M src/arch/x86/acpi_s3.c M src/arch/x86/acpigen.c M src/arch/x86/cbmem.c M src/arch/x86/exception.c M src/arch/x86/gdt.c M src/arch/x86/include/arch/acpi.h M src/arch/x86/include/arch/hlt.h M src/arch/x86/include/arch/io.h M src/arch/x86/include/arch/pci_io_cfg.h M src/arch/x86/include/arch/pci_mmio_cfg.h M src/arch/x86/include/arch/pirq_routing.h M src/arch/x86/include/arch/registers.h M src/arch/x86/include/arch/smp/atomic.h M src/arch/x86/include/arch/smp/mpspec.h M src/arch/x86/include/arch/smp/spinlock.h M src/arch/x86/mpspec.c M src/arch/x86/pirq_routing.c M src/arch/x86/postcar.c M src/arch/x86/smbios.c M src/arch/x86/timestamp.c M src/commonlib/fsp_relocate.c M src/commonlib/include/commonlib/cbfs_serialized.h R src/commonlib/include/commonlib/compiler.h M src/commonlib/include/commonlib/fmap_serialized.h M src/commonlib/include/commonlib/rmodule-defs.h M src/commonlib/include/commonlib/tcpa_log_serialized.h M src/commonlib/include/commonlib/timestamp_serialized.h M src/commonlib/lz4_wrapper.c M src/commonlib/storage/sdhci.c M src/console/die.c M src/console/post.c M src/cpu/allwinner/a10/clock.h M src/cpu/allwinner/a10/gpio.h M src/cpu/allwinner/a10/timer.h M src/cpu/allwinner/a10/uart.h M src/cpu/amd/car/disable_cache_as_ram.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/intel/microcode/microcode.c M src/cpu/intel/smm/gen1/smmrelocate.c M src/cpu/ti/am335x/clock.h M src/cpu/ti/am335x/gpio.h M src/cpu/ti/am335x/header.c M src/cpu/ti/am335x/header.h M src/cpu/ti/am335x/uart.h M src/cpu/x86/mp_init.c M src/cpu/x86/pae/pgtbl.c M src/cpu/x86/smm/smihandler.c M src/cpu/x86/smm/smm_module_handler.c M src/cpu/x86/smm/smm_module_loader.c M src/device/oprom/yabel/device.c M src/device/oprom/yabel/device.h M src/device/oprom/yabel/pmm.h M src/device/pci_rom.c M src/drivers/amd/agesa/romstage.c M src/drivers/amd/agesa/state_machine.c M src/drivers/elog/boot_count.c M src/drivers/elog/elog_internal.h M src/drivers/elog/gsmi.c M src/drivers/i2c/designware/dw_i2c.h M src/drivers/i2c/tpm/cr50.c M src/drivers/i2c/tpm/tis_atmel.c M src/drivers/intel/fsp1_0/fsp_util.c M src/drivers/intel/fsp1_0/fsp_util.h M src/drivers/intel/fsp1_1/car.c M src/drivers/intel/fsp1_1/fsp_util.c M src/drivers/intel/fsp1_1/raminit.c M src/drivers/intel/fsp1_1/ramstage.c M src/drivers/intel/fsp1_1/romstage.c M src/drivers/intel/fsp2_0/graphics.c M src/drivers/intel/fsp2_0/hob_display.c M src/drivers/intel/fsp2_0/include/fsp/upd.h M src/drivers/intel/fsp2_0/include/fsp/util.h M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/intel/fsp2_0/notify.c M src/drivers/intel/fsp2_0/upd_display.c M src/drivers/intel/gma/intel_bios.h M src/drivers/intel/gma/opregion.h M src/drivers/intel/mipi_camera/chip.h M src/drivers/intel/wifi/wifi.c M src/drivers/mrc_cache/mrc_cache.c M src/drivers/siemens/nc_fpga/nc_fpga.h M src/drivers/spi/spi-generic.c M src/drivers/spi/tpm/tpm.c M src/drivers/usb/ehci.h M src/drivers/usb/usb_ch9.h M src/drivers/vpd/vpd_tables.h M src/ec/google/chromeec/crosec_proto.c M src/include/console/console.h M src/include/console/spi.h M src/include/cpu/amd/mtrr.h M src/include/cpu/x86/cache.h M src/include/cpu/x86/cr.h M src/include/cpu/x86/lapic.h M src/include/cpu/x86/msr.h M src/include/cpu/x86/smm.h M src/include/device/pci_ops.h M src/include/elog.h M src/include/halt.h M src/include/memory_info.h M src/include/reset.h M src/include/sar.h M src/include/smbios.h M src/include/vbe.h M src/lib/boot_device.c M src/lib/bootblock.c M src/lib/cbfs.c M src/lib/cbmem_common.c M src/lib/cbmem_console.c M src/lib/coreboot_table.c M src/lib/fallback_boot.c M src/lib/gpio.c M src/lib/hardwaremain.c M src/lib/imd.c M src/lib/imd_cbmem.c M src/lib/prog_loaders.c M src/lib/prog_ops.c M src/lib/reset.c M src/lib/timer.c M src/lib/timestamp.c M src/lib/wrdd.c M src/mainboard/emulation/qemu-i440fx/fw_cfg.c M src/mainboard/google/cyan/romstage.c M src/mainboard/google/cyan/spd/spd.c M src/mainboard/google/kahlee/mainboard.c M src/mainboard/google/kahlee/romstage.c M src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c M src/mainboard/google/kahlee/variants/baseboard/gpio.c M src/mainboard/google/kahlee/variants/baseboard/memory.c M src/mainboard/google/octopus/mainboard.c M src/mainboard/google/octopus/variants/baseboard/gpio.c M src/mainboard/google/octopus/variants/baseboard/memory.c M src/mainboard/google/octopus/variants/baseboard/nhlt.c M src/mainboard/google/poppy/ramstage.c M src/mainboard/google/poppy/variants/baseboard/gpio.c M src/mainboard/google/poppy/variants/baseboard/memory.c M src/mainboard/google/poppy/variants/baseboard/nhlt.c M src/mainboard/google/poppy/variants/nami/mainboard.c M src/mainboard/google/reef/mainboard.c M src/mainboard/google/reef/variants/baseboard/gpio.c M src/mainboard/google/reef/variants/baseboard/memory.c M src/mainboard/google/reef/variants/baseboard/nhlt.c M src/mainboard/google/zoombini/memory.c M src/mainboard/google/zoombini/variants/baseboard/gpio.c M src/mainboard/google/zoombini/variants/baseboard/nhlt.c M src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c M src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c M src/mainboard/intel/coffeelake_rvp/memory.c M src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c M src/mainboard/intel/galileo/vboot.c M src/mainboard/intel/glkrvp/chromeos.c M src/mainboard/intel/glkrvp/variants/baseboard/boardid.c M src/mainboard/intel/glkrvp/variants/baseboard/gpio.c M src/mainboard/intel/glkrvp/variants/baseboard/memory.c M src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c M src/mainboard/siemens/mc_apl1/mainboard.c M src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c M src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c M src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h M src/mainboard/siemens/mc_tcu3/ptn3460.h M src/northbridge/amd/amdfam10/amdfam10.h M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/lx/raminit.c M src/northbridge/amd/pi/agesawrapper.c M src/northbridge/intel/e7505/raminit.c M src/northbridge/intel/haswell/haswell.h M src/northbridge/intel/haswell/pei_data.h M src/northbridge/intel/i945/raminit.h M src/northbridge/intel/nehalem/raminit.c M src/northbridge/intel/sandybridge/pei_data.h M src/northbridge/intel/sandybridge/raminit.h M src/northbridge/intel/sandybridge/raminit_mrc.c M src/security/tpm/tss/tcg-2.0/tss_structures.h M src/security/vboot/bootmode.c M src/security/vboot/vboot_common.c M src/security/vboot/vboot_common.h M src/security/vboot/vboot_logic.c M src/security/vboot/verstage.c M src/soc/amd/common/block/include/amdblocks/psp.h M src/soc/amd/common/block/pi/agesawrapper.c M src/soc/amd/common/block/pi/def_callouts.c M src/soc/amd/stoneyridge/BiosCallOuts.c M src/soc/amd/stoneyridge/gpio.c M src/soc/amd/stoneyridge/include/soc/nvs.h M src/soc/amd/stoneyridge/romstage.c M src/soc/amd/stoneyridge/usb.c M src/soc/intel/apollolake/chip.c M src/soc/intel/apollolake/cse.c M src/soc/intel/apollolake/include/soc/nvs.h M src/soc/intel/apollolake/include/soc/pm.h M src/soc/intel/apollolake/romstage.c M src/soc/intel/baytrail/gpio.c M src/soc/intel/baytrail/include/soc/device_nvs.h M src/soc/intel/baytrail/include/soc/efi_wrapper.h M src/soc/intel/baytrail/include/soc/gpio.h M src/soc/intel/baytrail/include/soc/mrc_wrapper.h M src/soc/intel/baytrail/include/soc/nvs.h M src/soc/intel/baytrail/include/soc/pmc.h M src/soc/intel/baytrail/southcluster.c M src/soc/intel/baytrail/spi.c M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/chip.c M src/soc/intel/braswell/gpio.c M src/soc/intel/braswell/include/soc/device_nvs.h M src/soc/intel/braswell/include/soc/gpio.h M src/soc/intel/braswell/include/soc/nvs.h M src/soc/intel/braswell/include/soc/pm.h M src/soc/intel/braswell/southcluster.c M src/soc/intel/braswell/spi.c M src/soc/intel/broadwell/include/soc/device_nvs.h M src/soc/intel/broadwell/include/soc/gpio.h M src/soc/intel/broadwell/include/soc/me.h M src/soc/intel/broadwell/include/soc/nvs.h M src/soc/intel/broadwell/include/soc/pei_data.h M src/soc/intel/broadwell/include/soc/smm.h M src/soc/intel/broadwell/romstage/romstage.c M src/soc/intel/broadwell/spi.c M src/soc/intel/cannonlake/chip.c M src/soc/intel/cannonlake/include/soc/nvs.h M src/soc/intel/cannonlake/include/soc/pm.h M src/soc/intel/cannonlake/reset.c M src/soc/intel/cannonlake/romstage/romstage.c M src/soc/intel/common/acpi_wake_source.c M src/soc/intel/common/block/acpi/acpi.c M src/soc/intel/common/block/cpu/mp_init.c M src/soc/intel/common/block/ebda/ebda.c M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/common/block/gspi/gspi.c M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/common/block/pmc/pmclib.c M src/soc/intel/common/block/rtc/rtc.c M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/common/block/sram/sram.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/common/block/uart/uart.c M src/soc/intel/common/block/xdci/xdci.c M src/soc/intel/common/block/xhci/xhci.c M src/soc/intel/common/mma.c M src/soc/intel/common/vbt.c M src/soc/intel/denverton_ns/acpi.c M src/soc/intel/denverton_ns/fiamux.c M src/soc/intel/denverton_ns/romstage.c M src/soc/intel/fsp_baytrail/gpio.c M src/soc/intel/fsp_baytrail/include/soc/device_nvs.h M src/soc/intel/fsp_baytrail/include/soc/gpio.h M src/soc/intel/fsp_baytrail/include/soc/nvs.h M src/soc/intel/fsp_baytrail/include/soc/pmc.h M src/soc/intel/fsp_baytrail/spi.c M src/soc/intel/fsp_broadwell_de/include/soc/gpio.h M src/soc/intel/fsp_broadwell_de/include/soc/smm.h M src/soc/intel/fsp_broadwell_de/spi.c M src/soc/intel/quark/gpio_i2c.c M src/soc/intel/quark/include/soc/pei_wrapper.h M src/soc/intel/quark/include/soc/pm.h M src/soc/intel/skylake/acpi.c M src/soc/intel/skylake/chip_fsp20.c M src/soc/intel/skylake/include/soc/device_nvs.h M src/soc/intel/skylake/include/soc/me.h M src/soc/intel/skylake/include/soc/nvs.h M src/soc/intel/skylake/include/soc/pei_data.h M src/soc/intel/skylake/include/soc/pm.h M src/soc/intel/skylake/include/soc/smm.h M src/soc/intel/skylake/me.c M src/soc/intel/skylake/romstage/romstage_fsp20.c M src/soc/mediatek/common/mmu_operations.c M src/soc/mediatek/common/timer.c M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/include/soc/clk_rst.h M src/soc/nvidia/tegra124/include/soc/dma.h M src/soc/nvidia/tegra124/include/soc/emc.h M src/soc/nvidia/tegra124/include/soc/spi.h M src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/bootblock.c M src/soc/nvidia/tegra210/funitcfg.c M src/soc/nvidia/tegra210/include/soc/clk_rst.h M src/soc/nvidia/tegra210/include/soc/clst_clk.h M src/soc/nvidia/tegra210/include/soc/dma.h M src/soc/nvidia/tegra210/include/soc/emc.h M src/soc/nvidia/tegra210/include/soc/spi.h M src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c M src/soc/nvidia/tegra210/romstage.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/ipq40xx/include/soc/cdp.h M src/soc/qualcomm/ipq40xx/lcc.c M src/soc/qualcomm/ipq806x/include/soc/cdp.h M src/soc/qualcomm/ipq806x/lcc.c M src/soc/samsung/exynos5250/i2c.c M src/soc/samsung/exynos5250/include/soc/power.h M src/soc/samsung/exynos5420/i2c.c M src/soc/samsung/exynos5420/include/soc/dmc.h M src/soc/samsung/exynos5420/include/soc/power.h M src/southbridge/amd/sb700/sata.c M src/southbridge/intel/bd82x6x/me.h M src/southbridge/intel/bd82x6x/nvs.h M src/southbridge/intel/common/gpio.h M src/southbridge/intel/common/smihandler.c M src/southbridge/intel/common/spi.c M src/southbridge/intel/fsp_bd82x6x/gpio.h M src/southbridge/intel/fsp_bd82x6x/me.h M src/southbridge/intel/fsp_bd82x6x/nvs.h M src/southbridge/intel/fsp_i89xx/gpio.h M src/southbridge/intel/fsp_i89xx/me.h M src/southbridge/intel/fsp_i89xx/nvs.h M src/southbridge/intel/fsp_rangeley/gpio.h M src/southbridge/intel/fsp_rangeley/nvs.h M src/southbridge/intel/fsp_rangeley/spi.c M src/southbridge/intel/i82801dx/nvs.h M src/southbridge/intel/i82801gx/nvs.h M src/southbridge/intel/i82801ix/nvs.h M src/southbridge/intel/i82801jx/nvs.h M src/southbridge/intel/ibexpeak/me.h M src/southbridge/intel/ibexpeak/nvs.h M src/southbridge/intel/lynxpoint/lp_gpio.h M src/southbridge/intel/lynxpoint/me.h M src/southbridge/intel/lynxpoint/nvs.h M src/southbridge/ricoh/rl5c476/rl5c476.h M src/vendorcode/google/chromeos/gnvs.h M util/cbfstool/Makefile.inc M util/cbfstool/cbfs.h D util/cbfstool/compiler.h M util/cbfstool/fit.c M util/cbfstool/flashmap/fmap.h M util/cbfstool/ifwitool.c D util/cbmem/compiler.h 336 files changed, 354 insertions(+), 408 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/28927/1 diff --git a/src/arch/arm/include/arch/hlt.h b/src/arch/arm/include/arch/hlt.h index fd2aac9..4f80079 100644 --- a/src/arch/arm/include/arch/hlt.h +++ b/src/arch/arm/include/arch/hlt.h @@ -14,7 +14,7 @@ #ifndef ARCH_HLT_H #define ARCH_HLT_H -#include <compiler.h> +#include <commonlib/compiler.h> static __always_inline void hlt(void) { diff --git a/src/arch/arm/stages.c b/src/arch/arm/stages.c index 1fae886..49c64a6 100644 --- a/src/arch/arm/stages.c +++ b/src/arch/arm/stages.c @@ -26,7 +26,7 @@ #include <arch/stages.h> #include <arch/cache.h> -#include <compiler.h> +#include <commonlib/compiler.h> /** * generic stage entry point. override this if board specific code is needed. diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c index 88416ea..06f6f12 100644 --- a/src/arch/arm64/arm_tf.c +++ b/src/arch/arm64/arm_tf.c @@ -21,7 +21,7 @@ #include <assert.h> #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <program_loading.h> /* diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c index 95c51d3..5acfe2c 100644 --- a/src/arch/arm64/boot.c +++ b/src/arch/arm64/boot.c @@ -19,7 +19,7 @@ #include <arch/transition.h> #include <arm_tf.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <program_loading.h> #include <rules.h> diff --git a/src/arch/arm64/include/arch/hlt.h b/src/arch/arm64/include/arch/hlt.h index fd2aac9..4f80079 100644 --- a/src/arch/arm64/include/arch/hlt.h +++ b/src/arch/arm64/include/arch/hlt.h @@ -14,7 +14,7 @@ #ifndef ARCH_HLT_H #define ARCH_HLT_H -#include <compiler.h> +#include <commonlib/compiler.h> static __always_inline void hlt(void) { diff --git a/src/arch/arm64/transition.c b/src/arch/arm64/transition.c index ee5e570..ab74cf4 100644 --- a/src/arch/arm64/transition.c +++ b/src/arch/arm64/transition.c @@ -18,7 +18,7 @@ #include <arch/mmu.h> #include <arch/transition.h> #include <assert.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> /* Litte-endian, No XN-forced, Instr cache disabled, diff --git a/src/arch/mips/include/arch/hlt.h b/src/arch/mips/include/arch/hlt.h index dd66c44..ffe6979 100644 --- a/src/arch/mips/include/arch/hlt.h +++ b/src/arch/mips/include/arch/hlt.h @@ -16,7 +16,7 @@ #ifndef __MIPS_ARCH_HLT_H #define __MIPS_ARCH_HLT_H -#include <compiler.h> +#include <commonlib/compiler.h> static inline __always_inline void hlt(void) { diff --git a/src/arch/power8/include/arch/hlt.h b/src/arch/power8/include/arch/hlt.h index 19c7ecc..dc8a820 100644 --- a/src/arch/power8/include/arch/hlt.h +++ b/src/arch/power8/include/arch/hlt.h @@ -11,7 +11,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> static __always_inline void hlt(void) { diff --git a/src/arch/riscv/include/arch/hlt.h b/src/arch/riscv/include/arch/hlt.h index 2ea2e01..188e12a 100644 --- a/src/arch/riscv/include/arch/hlt.h +++ b/src/arch/riscv/include/arch/hlt.h @@ -11,7 +11,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> static __always_inline void hlt(void) { diff --git a/src/arch/riscv/include/arch/io.h b/src/arch/riscv/include/arch/io.h index 6fd0cac..08a2c69 100644 --- a/src/arch/riscv/include/arch/io.h +++ b/src/arch/riscv/include/arch/io.h @@ -16,7 +16,7 @@ #include <endian.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> static __always_inline uint8_t read8(const volatile void *addr) { diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c index d75d889..4d9de0b 100644 --- a/src/arch/x86/acpi.c +++ b/src/arch/x86/acpi.c @@ -44,7 +44,7 @@ #include <arch/acpigen.h> #include <device/pci.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/lapic_def.h> #include <cpu/cpu.h> #include <cbfs.h> diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c index ebf291c..ad80fad 100644 --- a/src/arch/x86/acpi_s3.c +++ b/src/arch/x86/acpi_s3.c @@ -17,7 +17,7 @@ #include <string.h> #include <arch/acpi.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/cpu.h> #include <fallback.h> #include <timestamp.h> diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c index a630ef2..6631b69 100644 --- a/src/arch/x86/acpigen.c +++ b/src/arch/x86/acpigen.c @@ -28,7 +28,7 @@ #include <lib.h> #include <string.h> #include <arch/acpigen.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> diff --git a/src/arch/x86/cbmem.c b/src/arch/x86/cbmem.c index 52f8f8a..5653c86 100644 --- a/src/arch/x86/cbmem.c +++ b/src/arch/x86/cbmem.c @@ -13,7 +13,7 @@ #include <stdlib.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/acpi.h> #if IS_ENABLED(CONFIG_LATE_CBMEM_INIT) diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c index 201e835..10feaaa 100644 --- a/src/arch/x86/exception.c +++ b/src/arch/x86/exception.c @@ -15,7 +15,7 @@ #include <arch/early_variables.h> #include <arch/exception.h> #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <console/streams.h> #include <cpu/x86/cr.h> diff --git a/src/arch/x86/gdt.c b/src/arch/x86/gdt.c index 24a1c81..3d07741 100644 --- a/src/arch/x86/gdt.c +++ b/src/arch/x86/gdt.c @@ -15,7 +15,7 @@ #include <types.h> #include <string.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cbmem.h> #include <console/console.h> #include <cpu/x86/gdt.h> diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h index c84adda..17a7722 100644 --- a/src/arch/x86/include/arch/acpi.h +++ b/src/arch/x86/include/arch/acpi.h @@ -54,7 +54,7 @@ #if !defined(__ASSEMBLER__) && !defined(__ACPI__) && !defined(__ROMCC__) #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <rules.h> #include <commonlib/helpers.h> #include <device/device.h> diff --git a/src/arch/x86/include/arch/hlt.h b/src/arch/x86/include/arch/hlt.h index cf7176a..eaf8cd8 100644 --- a/src/arch/x86/include/arch/hlt.h +++ b/src/arch/x86/include/arch/hlt.h @@ -20,7 +20,7 @@ __builtin_hlt(); } #else -#include <compiler.h> +#include <commonlib/compiler.h> static __always_inline void hlt(void) { diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h index 64b5f12..7fe1788 100644 --- a/src/arch/x86/include/arch/io.h +++ b/src/arch/x86/include/arch/io.h @@ -14,7 +14,7 @@ #ifndef _ASM_IO_H #define _ASM_IO_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <endian.h> #include <stdint.h> #include <rules.h> diff --git a/src/arch/x86/include/arch/pci_io_cfg.h b/src/arch/x86/include/arch/pci_io_cfg.h index 15d1a13..8e1ebe1 100644 --- a/src/arch/x86/include/arch/pci_io_cfg.h +++ b/src/arch/x86/include/arch/pci_io_cfg.h @@ -14,7 +14,7 @@ #ifndef _PCI_IO_CFG_H #define _PCI_IO_CFG_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> static __always_inline diff --git a/src/arch/x86/include/arch/pci_mmio_cfg.h b/src/arch/x86/include/arch/pci_mmio_cfg.h index a5ca574..fe27e82 100644 --- a/src/arch/x86/include/arch/pci_mmio_cfg.h +++ b/src/arch/x86/include/arch/pci_mmio_cfg.h @@ -17,7 +17,7 @@ #define _PCI_MMIO_CFG_H #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define DEFAULT_PCIEXBAR CONFIG_MMCONF_BASE_ADDRESS diff --git a/src/arch/x86/include/arch/pirq_routing.h b/src/arch/x86/include/arch/pirq_routing.h index 0117912..6ad684c 100644 --- a/src/arch/x86/include/arch/pirq_routing.h +++ b/src/arch/x86/include/arch/pirq_routing.h @@ -28,7 +28,7 @@ #define MAX_INTX_ENTRIES 4 #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24)) #define PIRQ_VERSION 0x0100 diff --git a/src/arch/x86/include/arch/registers.h b/src/arch/x86/include/arch/registers.h index 9a618f4..e982238 100644 --- a/src/arch/x86/include/arch/registers.h +++ b/src/arch/x86/include/arch/registers.h @@ -16,7 +16,7 @@ #ifndef __ARCH_REGISTERS_H #define __ARCH_REGISTERS_H -#include <compiler.h> +#include <commonlib/compiler.h> #if !defined(__ASSEMBLER__) #define DOWNTO8(A) \ diff --git a/src/arch/x86/include/arch/smp/atomic.h b/src/arch/x86/include/arch/smp/atomic.h index b12da12..b970dd6 100644 --- a/src/arch/x86/include/arch/smp/atomic.h +++ b/src/arch/x86/include/arch/smp/atomic.h @@ -14,7 +14,7 @@ #ifndef ARCH_SMP_ATOMIC_H #define ARCH_SMP_ATOMIC_H -#include <compiler.h> +#include <commonlib/compiler.h> /* * Make sure gcc doesn't try to be clever and move things around diff --git a/src/arch/x86/include/arch/smp/mpspec.h b/src/arch/x86/include/arch/smp/mpspec.h index 8b3e8bb8..dd889ac 100644 --- a/src/arch/x86/include/arch/smp/mpspec.h +++ b/src/arch/x86/include/arch/smp/mpspec.h @@ -16,7 +16,7 @@ #ifndef __ASM_MPSPEC_H #define __ASM_MPSPEC_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <cpu/x86/lapic_def.h> diff --git a/src/arch/x86/include/arch/smp/spinlock.h b/src/arch/x86/include/arch/smp/spinlock.h index 212cd8c..52d0cc6 100644 --- a/src/arch/x86/include/arch/smp/spinlock.h +++ b/src/arch/x86/include/arch/smp/spinlock.h @@ -14,7 +14,7 @@ #ifndef ARCH_SMP_SPINLOCK_H #define ARCH_SMP_SPINLOCK_H -#include <compiler.h> +#include <commonlib/compiler.h> #if !defined(__PRE_RAM__) \ || IS_ENABLED(CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK) \ diff --git a/src/arch/x86/mpspec.c b/src/arch/x86/mpspec.c index 8280171..3032d42 100644 --- a/src/arch/x86/mpspec.c +++ b/src/arch/x86/mpspec.c @@ -17,7 +17,7 @@ #include <device/path.h> #include <device/pci_ids.h> #include <cpu/cpu.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/smp/mpspec.h> #include <string.h> #include <arch/cpu.h> diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c index 96117fc..f57aabe 100644 --- a/src/arch/x86/pirq_routing.c +++ b/src/arch/x86/pirq_routing.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ #include <console/console.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/pirq_routing.h> #include <string.h> #include <device/pci.h> diff --git a/src/arch/x86/postcar.c b/src/arch/x86/postcar.c index 6497b73..eea8407 100644 --- a/src/arch/x86/postcar.c +++ b/src/arch/x86/postcar.c @@ -15,7 +15,7 @@ #include <arch/cpu.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <main_decl.h> #include <program_loading.h> diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index fc3a0a7..fb1efc1 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -20,7 +20,7 @@ #include <stdlib.h> #include <string.h> #include <smbios.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <version.h> #include <device/device.h> diff --git a/src/arch/x86/timestamp.c b/src/arch/x86/timestamp.c index b0aac9c..65d6897 100644 --- a/src/arch/x86/timestamp.c +++ b/src/arch/x86/timestamp.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/tsc.h> #include <timestamp.h> diff --git a/src/commonlib/fsp_relocate.c b/src/commonlib/fsp_relocate.c index d96edd2..59221c9 100644 --- a/src/commonlib/fsp_relocate.c +++ b/src/commonlib/fsp_relocate.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <commonlib/endian.h> #include <commonlib/fsp.h> diff --git a/src/commonlib/include/commonlib/cbfs_serialized.h b/src/commonlib/include/commonlib/cbfs_serialized.h index e8f027f..653b0ef 100644 --- a/src/commonlib/include/commonlib/cbfs_serialized.h +++ b/src/commonlib/include/commonlib/cbfs_serialized.h @@ -48,7 +48,7 @@ #define _CBFS_SERIALIZED_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> /** These are standard values for the known compression algorithms that coreboot knows about for stages and diff --git a/src/include/compiler.h b/src/commonlib/include/commonlib/compiler.h similarity index 79% rename from src/include/compiler.h rename to src/commonlib/include/commonlib/compiler.h index 96c2045..2e0c454 100644 --- a/src/include/compiler.h +++ b/src/commonlib/include/commonlib/compiler.h @@ -13,20 +13,39 @@ * GNU General Public License for more details. */ -#ifndef __COMPILER_H__ -#define __COMPILER_H__ +#ifndef _COMMONLIB_COMPILER_H_ +#define _COMMONLIB_COMPILER_H_ +#ifndef __packed #if defined(__WIN32) || defined(__WIN64) #define __packed __attribute__((gcc_struct, packed)) #else #define __packed __attribute__((packed)) #endif +#endif +#ifndef __aligned #define __aligned(x) __attribute__((aligned(x))) +#endif + +#ifndef __always_unused #define __always_unused __attribute__((unused)) +#endif + +#ifndef __must_check #define __must_check __attribute__((warn_unused_result)) +#endif + +#ifndef __weak #define __weak __attribute__((weak)) +#endif + +#ifndef __noreturn #define __noreturn __attribute__((noreturn)) +#endif + +#ifndef __always_inline #define __always_inline inline __attribute__((always_inline)) +#endif #endif diff --git a/src/commonlib/include/commonlib/fmap_serialized.h b/src/commonlib/include/commonlib/fmap_serialized.h index cea231b..b1ae22b 100644 --- a/src/commonlib/include/commonlib/fmap_serialized.h +++ b/src/commonlib/include/commonlib/fmap_serialized.h @@ -37,7 +37,7 @@ #define FLASHMAP_SERIALIZED_H__ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define FMAP_SIGNATURE "__FMAP__" #define FMAP_VER_MAJOR 1 /* this header's FMAP minor version */ diff --git a/src/commonlib/include/commonlib/rmodule-defs.h b/src/commonlib/include/commonlib/rmodule-defs.h index 485d638..8c785d8 100644 --- a/src/commonlib/include/commonlib/rmodule-defs.h +++ b/src/commonlib/include/commonlib/rmodule-defs.h @@ -17,7 +17,7 @@ #include <stdint.h> #include <stddef.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define RMODULE_MAGIC 0xf8fe #define RMODULE_VERSION_1 1 diff --git a/src/commonlib/include/commonlib/tcpa_log_serialized.h b/src/commonlib/include/commonlib/tcpa_log_serialized.h index 6dfb566..6b54ac9 100644 --- a/src/commonlib/include/commonlib/tcpa_log_serialized.h +++ b/src/commonlib/include/commonlib/tcpa_log_serialized.h @@ -16,7 +16,7 @@ #ifndef __TCPA_LOG_SERIALIZED_H__ #define __TCPA_LOG_SERIALIZED_H__ -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> #define MAX_TCPA_LOG_ENTRIES 50 diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index 304e43f..08b5a9f 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -17,7 +17,7 @@ #define __TIMESTAMP_SERIALIZED_H__ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> struct timestamp_entry { uint32_t entry_id; diff --git a/src/commonlib/lz4_wrapper.c b/src/commonlib/lz4_wrapper.c index 8f51608..3fd822b 100644 --- a/src/commonlib/lz4_wrapper.c +++ b/src/commonlib/lz4_wrapper.c @@ -34,7 +34,7 @@ #include <commonlib/helpers.h> #include <stdint.h> #include <string.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* LZ4 comes with its own supposedly portable memory access functions, but they * seem to be very inefficient in practice (at least on ARM64). Since coreboot diff --git a/src/commonlib/storage/sdhci.c b/src/commonlib/storage/sdhci.c index 158e28b..f3bb8d2 100644 --- a/src/commonlib/storage/sdhci.c +++ b/src/commonlib/storage/sdhci.c @@ -22,7 +22,7 @@ #include <commonlib/sd_mmc_ctrlr.h> #include <commonlib/sdhci.h> #include <commonlib/storage.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <delay.h> #include <endian.h> #include <halt.h> diff --git a/src/console/die.c b/src/console/die.c index 5941125..d2f00b4 100644 --- a/src/console/die.c +++ b/src/console/die.c @@ -15,7 +15,7 @@ */ #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <halt.h> diff --git a/src/console/post.c b/src/console/post.c index 969c7c7..8cfaaec 100644 --- a/src/console/post.c +++ b/src/console/post.c @@ -16,7 +16,7 @@ #include <arch/io.h> #include <elog.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <pc80/mc146818rtc.h> diff --git a/src/cpu/allwinner/a10/clock.h b/src/cpu/allwinner/a10/clock.h index 815a94d..2d18087 100644 --- a/src/cpu/allwinner/a10/clock.h +++ b/src/cpu/allwinner/a10/clock.h @@ -23,7 +23,7 @@ #include "memmap.h" #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* CPU_AHB_APB0 config values */ #define CPU_CLK_SRC_MASK (3 << 16) diff --git a/src/cpu/allwinner/a10/gpio.h b/src/cpu/allwinner/a10/gpio.h index a126801..0fbf984 100644 --- a/src/cpu/allwinner/a10/gpio.h +++ b/src/cpu/allwinner/a10/gpio.h @@ -19,7 +19,7 @@ #define __CPU_ALLWINNER_A10_PINMUX_H #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define GPIO_BASE 0x01C20800 diff --git a/src/cpu/allwinner/a10/timer.h b/src/cpu/allwinner/a10/timer.h index e24bf66..fee8917 100644 --- a/src/cpu/allwinner/a10/timer.h +++ b/src/cpu/allwinner/a10/timer.h @@ -23,7 +23,7 @@ #include "memmap.h" #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* TMRx_CTRL values */ #define TIMER_CTRL_MODE_SINGLE (1 << 7) diff --git a/src/cpu/allwinner/a10/uart.h b/src/cpu/allwinner/a10/uart.h index 92a87e5..c5a686b 100644 --- a/src/cpu/allwinner/a10/uart.h +++ b/src/cpu/allwinner/a10/uart.h @@ -26,7 +26,7 @@ #define CPU_ALLWINNER_A10_UART_H #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> struct a10_uart { union { diff --git a/src/cpu/amd/car/disable_cache_as_ram.c b/src/cpu/amd/car/disable_cache_as_ram.c index 36d4120..94594c3 100644 --- a/src/cpu/amd/car/disable_cache_as_ram.c +++ b/src/cpu/amd/car/disable_cache_as_ram.c @@ -19,7 +19,7 @@ * WARNING: this file will be used by both any AP cores and core 0 / node 0 */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/cache.h> #include <cpu/x86/msr.h> diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c index 4911eca..a89fdb1 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.c +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include "init_cpus.h" #if IS_ENABLED(CONFIG_HAVE_OPTION_TABLE) diff --git a/src/cpu/intel/microcode/microcode.c b/src/cpu/intel/microcode/microcode.c index 8cfcb95..0c4793b 100644 --- a/src/cpu/intel/microcode/microcode.c +++ b/src/cpu/intel/microcode/microcode.c @@ -24,7 +24,7 @@ #else #include <arch/cbfs.h> #endif -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/cpu.h> #include <cpu/x86/msr.h> #include <cpu/intel/microcode.h> diff --git a/src/cpu/intel/smm/gen1/smmrelocate.c b/src/cpu/intel/smm/gen1/smmrelocate.c index a5a9de3..99be0a0 100644 --- a/src/cpu/intel/smm/gen1/smmrelocate.c +++ b/src/cpu/intel/smm/gen1/smmrelocate.c @@ -18,7 +18,7 @@ #include <types.h> #include <string.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/pci.h> #include <cpu/cpu.h> diff --git a/src/cpu/ti/am335x/clock.h b/src/cpu/ti/am335x/clock.h index 564838a..cc798a3 100644 --- a/src/cpu/ti/am335x/clock.h +++ b/src/cpu/ti/am335x/clock.h @@ -16,7 +16,7 @@ #define __CPU_TI_AM335X_CLOCK_H__ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> enum { CM_ST_NO_SLEEP = 0x0, diff --git a/src/cpu/ti/am335x/gpio.h b/src/cpu/ti/am335x/gpio.h index 41fc3d3..1d48581 100644 --- a/src/cpu/ti/am335x/gpio.h +++ b/src/cpu/ti/am335x/gpio.h @@ -16,7 +16,7 @@ #define __CPU_TI_AM335X_GPIO_H__ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> enum { AM335X_GPIO_BITS_PER_BANK = 32 diff --git a/src/cpu/ti/am335x/header.c b/src/cpu/ti/am335x/header.c index a260425..3505645 100644 --- a/src/cpu/ti/am335x/header.c +++ b/src/cpu/ti/am335x/header.c @@ -15,7 +15,7 @@ #include <stddef.h> #include <stdint.h> #include <symbols.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include "header.h" diff --git a/src/cpu/ti/am335x/header.h b/src/cpu/ti/am335x/header.h index 64d75c7..1022896 100644 --- a/src/cpu/ti/am335x/header.h +++ b/src/cpu/ti/am335x/header.h @@ -16,7 +16,7 @@ #define __CPU_TI_AM335X_HEADER_H #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> struct configuration_header_toc_item { // Offset from the start address of the TOC to the actual address of diff --git a/src/cpu/ti/am335x/uart.h b/src/cpu/ti/am335x/uart.h index 7a65076..c908662 100644 --- a/src/cpu/ti/am335x/uart.h +++ b/src/cpu/ti/am335x/uart.h @@ -15,7 +15,7 @@ #ifndef AM335X_UART_H #define AM335X_UART_H -#include <compiler.h> +#include <commonlib/compiler.h> #define AM335X_UART0_BASE 0x44e09000 #define AM335X_UART1_BASE 0x48020000 diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 08cd1f5..a72868c 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -16,7 +16,7 @@ #include <console/console.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <rmodule.h> #include <arch/cpu.h> #include <cpu/cpu.h> diff --git a/src/cpu/x86/pae/pgtbl.c b/src/cpu/x86/pae/pgtbl.c index cf6bf16..b147aa9 100644 --- a/src/cpu/x86/pae/pgtbl.c +++ b/src/cpu/x86/pae/pgtbl.c @@ -14,7 +14,7 @@ */ #include <cbfs.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <commonlib/helpers.h> #include <console/console.h> #include <cpu/cpu.h> diff --git a/src/cpu/x86/smm/smihandler.c b/src/cpu/x86/smm/smihandler.c index 99a6289..5d8c697 100644 --- a/src/cpu/x86/smm/smihandler.c +++ b/src/cpu/x86/smm/smihandler.c @@ -15,7 +15,7 @@ */ #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> diff --git a/src/cpu/x86/smm/smm_module_handler.c b/src/cpu/x86/smm/smm_module_handler.c index 4fa8a34..e6cfc02 100644 --- a/src/cpu/x86/smm/smm_module_handler.c +++ b/src/cpu/x86/smm/smm_module_handler.c @@ -14,7 +14,7 @@ */ #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <rmodule.h> diff --git a/src/cpu/x86/smm/smm_module_loader.c b/src/cpu/x86/smm/smm_module_loader.c index 9fd8c49..a032f13 100644 --- a/src/cpu/x86/smm/smm_module_loader.c +++ b/src/cpu/x86/smm/smm_module_loader.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <string.h> #include <rmodule.h> #include <cpu/x86/smm.h> diff --git a/src/device/oprom/yabel/device.c b/src/device/oprom/yabel/device.c index cd1abfb..616869f 100644 --- a/src/device/oprom/yabel/device.c +++ b/src/device/oprom/yabel/device.c @@ -33,7 +33,7 @@ *****************************************************************************/ -#include <compiler.h> +#include <commonlib/compiler.h> #include "device.h" #include "compat/rtas.h" #include <string.h> diff --git a/src/device/oprom/yabel/device.h b/src/device/oprom/yabel/device.h index 1028ef1..5485db5 100644 --- a/src/device/oprom/yabel/device.h +++ b/src/device/oprom/yabel/device.h @@ -36,7 +36,7 @@ #define DEVICE_LIB_H #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <endian.h> #include "compat/of.h" #include "debug.h" diff --git a/src/device/oprom/yabel/pmm.h b/src/device/oprom/yabel/pmm.h index 3c96700..993bb54 100644 --- a/src/device/oprom/yabel/pmm.h +++ b/src/device/oprom/yabel/pmm.h @@ -35,7 +35,7 @@ #define _YABEL_PMM_H_ #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* PMM Structure see PMM Spec Version 1.01 Chapter 3.1.1 * (search web for specspmm101.pdf) diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 517fb33..272c921 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -19,7 +19,7 @@ #include <console/console.h> #include <commonlib/endian.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/drivers/amd/agesa/romstage.c b/src/drivers/amd/agesa/romstage.c index 90fa059..f2b8f90 100644 --- a/src/drivers/amd/agesa/romstage.c +++ b/src/drivers/amd/agesa/romstage.c @@ -18,7 +18,7 @@ #include <cbmem.h> #include <cpu/amd/car.h> #include <cpu/x86/bist.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <halt.h> #include <program_loading.h> diff --git a/src/drivers/amd/agesa/state_machine.c b/src/drivers/amd/agesa/state_machine.c index 673bf9b..2c0cb9e 100644 --- a/src/drivers/amd/agesa/state_machine.c +++ b/src/drivers/amd/agesa/state_machine.c @@ -21,7 +21,7 @@ #include <bootstate.h> #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <northbridge/amd/agesa/state_machine.h> #include <northbridge/amd/agesa/agesa_helper.h> diff --git a/src/drivers/elog/boot_count.c b/src/drivers/elog/boot_count.c index f1ae9d8..f372f37 100644 --- a/src/drivers/elog/boot_count.c +++ b/src/drivers/elog/boot_count.c @@ -18,7 +18,7 @@ #include <pc80/mc146818rtc.h> #include <stddef.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <elog.h> /* diff --git a/src/drivers/elog/elog_internal.h b/src/drivers/elog/elog_internal.h index 3ccee90c..a0c7432 100644 --- a/src/drivers/elog/elog_internal.h +++ b/src/drivers/elog/elog_internal.h @@ -16,7 +16,7 @@ #ifndef ELOG_INTERNAL_H_ #define ELOG_INTERNAL_H_ -#include <compiler.h> +#include <commonlib/compiler.h> /* ELOG header */ struct elog_header { u32 magic; diff --git a/src/drivers/elog/gsmi.c b/src/drivers/elog/gsmi.c index cced4a1..bf2da78 100644 --- a/src/drivers/elog/gsmi.c +++ b/src/drivers/elog/gsmi.c @@ -13,9 +13,8 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> -#include <compiler.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <elog.h> diff --git a/src/drivers/i2c/designware/dw_i2c.h b/src/drivers/i2c/designware/dw_i2c.h index ccdb3d2..ea2a9d1 100644 --- a/src/drivers/i2c/designware/dw_i2c.h +++ b/src/drivers/i2c/designware/dw_i2c.h @@ -16,7 +16,7 @@ #ifndef __DRIVERS_I2C_DESIGNWARE_I2C_H__ #define __DRIVERS_I2C_DESIGNWARE_I2C_H__ -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/i2c.h> #include <stdint.h> diff --git a/src/drivers/i2c/tpm/cr50.c b/src/drivers/i2c/tpm/cr50.c index 14a84de..8a0fae1 100644 --- a/src/drivers/i2c/tpm/cr50.c +++ b/src/drivers/i2c/tpm/cr50.c @@ -31,7 +31,7 @@ #include <arch/early_variables.h> #include <commonlib/endian.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> #include <string.h> #include <types.h> diff --git a/src/drivers/i2c/tpm/tis_atmel.c b/src/drivers/i2c/tpm/tis_atmel.c index 2bea135..dbc6602 100644 --- a/src/drivers/i2c/tpm/tis_atmel.c +++ b/src/drivers/i2c/tpm/tis_atmel.c @@ -14,7 +14,7 @@ #include <arch/early_variables.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <string.h> #include <assert.h> #include <commonlib/endian.h> diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c index 5d866bf..cc236ea 100644 --- a/src/drivers/intel/fsp1_0/fsp_util.c +++ b/src/drivers/intel/fsp1_0/fsp_util.c @@ -15,7 +15,7 @@ #include <types.h> #include <string.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <bootstate.h> #include <cbmem.h> diff --git a/src/drivers/intel/fsp1_0/fsp_util.h b/src/drivers/intel/fsp1_0/fsp_util.h index 594a259..6a4e2f5 100644 --- a/src/drivers/intel/fsp1_0/fsp_util.h +++ b/src/drivers/intel/fsp1_0/fsp_util.h @@ -16,7 +16,7 @@ #ifndef FSP_UTIL_H #define FSP_UTIL_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <chipset_fsp_util.h> #include "fsp_values.h" diff --git a/src/drivers/intel/fsp1_1/car.c b/src/drivers/intel/fsp1_1/car.c index 686a4c8..d8e84c3 100644 --- a/src/drivers/intel/fsp1_1/car.c +++ b/src/drivers/intel/fsp1_1/car.c @@ -14,7 +14,7 @@ */ #include <arch/early_variables.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <fsp/car.h> #include <fsp/util.h> diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c index 0116ac2..96466ff 100644 --- a/src/drivers/intel/fsp1_1/fsp_util.c +++ b/src/drivers/intel/fsp1_1/fsp_util.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <bootstate.h> #include <cbmem.h> #include <console/console.h> diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index e5714ae..f35a961 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -15,7 +15,7 @@ #include <arch/acpi.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <fsp/memmap.h> #include <fsp/romstage.h> diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c index a4609df..fede893 100644 --- a/src/drivers/intel/fsp1_1/ramstage.c +++ b/src/drivers/intel/fsp1_1/ramstage.c @@ -18,7 +18,7 @@ #include <arch/acpi.h> #include <cbmem.h> #include <cbfs.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <fsp/memmap.h> #include <fsp/ramstage.h> diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 0f13efe..98ff31c 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -20,7 +20,7 @@ #include <arch/cbfs.h> #include <arch/early_variables.h> #include <assert.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cbmem.h> #include <cpu/intel/microcode.h> diff --git a/src/drivers/intel/fsp2_0/graphics.c b/src/drivers/intel/fsp2_0/graphics.c index ae1442e..03585c8 100644 --- a/src/drivers/intel/fsp2_0/graphics.c +++ b/src/drivers/intel/fsp2_0/graphics.c @@ -10,7 +10,7 @@ * (at your option) any later version. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <cbfs.h> #include <console/console.h> #include <fsp/util.h> diff --git a/src/drivers/intel/fsp2_0/hob_display.c b/src/drivers/intel/fsp2_0/hob_display.c index 977facb..6f63b2a 100644 --- a/src/drivers/intel/fsp2_0/hob_display.c +++ b/src/drivers/intel/fsp2_0/hob_display.c @@ -9,7 +9,7 @@ * (at your option) any later version. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <fsp/util.h> diff --git a/src/drivers/intel/fsp2_0/include/fsp/upd.h b/src/drivers/intel/fsp2_0/include/fsp/upd.h index 580257b..e0ccb44 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/upd.h +++ b/src/drivers/intel/fsp2_0/include/fsp/upd.h @@ -12,7 +12,7 @@ #ifndef _FSP2_0_UPD_H_ #define _FSP2_0_UPD_H_ -#include <compiler.h> +#include <commonlib/compiler.h> struct FSP_UPD_HEADER { /// diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h index e7778ec..0467f77 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/util.h +++ b/src/drivers/intel/fsp2_0/include/fsp/util.h @@ -13,7 +13,7 @@ #ifndef _FSP2_0_UTIL_H_ #define _FSP2_0_UTIL_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <boot/coreboot_tables.h> #include <commonlib/region.h> #include <arch/cpu.h> diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index accb70b..0277b0d 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -11,7 +11,7 @@ * (at your option) any later version. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <security/vboot/antirollback.h> #include <arch/io.h> #include <arch/cpu.h> diff --git a/src/drivers/intel/fsp2_0/notify.c b/src/drivers/intel/fsp2_0/notify.c index 6d6d623..f5e9977 100644 --- a/src/drivers/intel/fsp2_0/notify.c +++ b/src/drivers/intel/fsp2_0/notify.c @@ -12,7 +12,7 @@ #include <arch/cpu.h> #include <bootstate.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <fsp/util.h> #include <soc/intel/common/util.h> diff --git a/src/drivers/intel/fsp2_0/upd_display.c b/src/drivers/intel/fsp2_0/upd_display.c index 415505e..647b2c0 100644 --- a/src/drivers/intel/fsp2_0/upd_display.c +++ b/src/drivers/intel/fsp2_0/upd_display.c @@ -10,7 +10,7 @@ */ #include <arch/cpu.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <fsp/util.h> #include <lib.h> diff --git a/src/drivers/intel/gma/intel_bios.h b/src/drivers/intel/gma/intel_bios.h index 048985d..9c319c5 100644 --- a/src/drivers/intel/gma/intel_bios.h +++ b/src/drivers/intel/gma/intel_bios.h @@ -28,7 +28,7 @@ #ifndef _I830_BIOS_H_ #define _I830_BIOS_H_ -#include <compiler.h> +#include <commonlib/compiler.h> struct vbt_header { u8 signature[20]; /**< Always starts with 'VBT$' */ diff --git a/src/drivers/intel/gma/opregion.h b/src/drivers/intel/gma/opregion.h index e6d8648..1caeca7 100644 --- a/src/drivers/intel/gma/opregion.h +++ b/src/drivers/intel/gma/opregion.h @@ -19,7 +19,7 @@ #define _COMMON_GMA_H_ #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <commonlib/helpers.h> /* IGD PCI Configuration register */ diff --git a/src/drivers/intel/mipi_camera/chip.h b/src/drivers/intel/mipi_camera/chip.h index a66b8ac..ce34396 100644 --- a/src/drivers/intel/mipi_camera/chip.h +++ b/src/drivers/intel/mipi_camera/chip.h @@ -17,7 +17,7 @@ #define __INTEL_MIPI_CAMERA_CHIP_H__ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define MAX_PWDB_ENTRIES 12 diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c index cdce6e2..266dad9 100644 --- a/src/drivers/intel/wifi/wifi.c +++ b/src/drivers/intel/wifi/wifi.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/acpi_device.h> #include <arch/acpigen.h> #include <console/console.h> diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c index eec1591..ca1082e 100644 --- a/src/drivers/mrc_cache/mrc_cache.c +++ b/src/drivers/mrc_cache/mrc_cache.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <string.h> #include <boot_device.h> #include <bootstate.h> diff --git a/src/drivers/siemens/nc_fpga/nc_fpga.h b/src/drivers/siemens/nc_fpga/nc_fpga.h index fe6636f..a86a9b2 100644 --- a/src/drivers/siemens/nc_fpga/nc_fpga.h +++ b/src/drivers/siemens/nc_fpga/nc_fpga.h @@ -16,7 +16,7 @@ #ifndef _SIEMENS_NC_FPGA_H_ #define _SIEMENS_NC_FPGA_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #define NC_MAGIC_OFFSET 0x020 #define NC_FPGA_MAGIC 0x4E433746 diff --git a/src/drivers/spi/spi-generic.c b/src/drivers/spi/spi-generic.c index f1b11ae..5fb327d 100644 --- a/src/drivers/spi/spi-generic.c +++ b/src/drivers/spi/spi-generic.c @@ -15,7 +15,7 @@ */ #include <assert.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <spi-generic.h> #include <string.h> diff --git a/src/drivers/spi/tpm/tpm.c b/src/drivers/spi/tpm/tpm.c index bdd40a8..4f80b50 100644 --- a/src/drivers/spi/tpm/tpm.c +++ b/src/drivers/spi/tpm/tpm.c @@ -17,7 +17,7 @@ #include <arch/early_variables.h> #include <assert.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <commonlib/endian.h> #include <console/console.h> #include <delay.h> diff --git a/src/drivers/usb/ehci.h b/src/drivers/usb/ehci.h index 33b7854..575f0e5 100644 --- a/src/drivers/usb/ehci.h +++ b/src/drivers/usb/ehci.h @@ -19,7 +19,7 @@ #ifndef EHCI_H #define EHCI_H -#include <compiler.h> +#include <commonlib/compiler.h> /* EHCI register interface, corresponds to EHCI Revision 0.95 specification */ diff --git a/src/drivers/usb/usb_ch9.h b/src/drivers/usb/usb_ch9.h index d7f39dd..9f90dcc 100644 --- a/src/drivers/usb/usb_ch9.h +++ b/src/drivers/usb/usb_ch9.h @@ -17,7 +17,7 @@ #ifndef USB_CH9_H #define USB_CH9_H -#include <compiler.h> +#include <commonlib/compiler.h> #define USB_DIR_OUT 0 /* to device */ #define USB_DIR_IN 0x80 /* to host */ diff --git a/src/drivers/vpd/vpd_tables.h b/src/drivers/vpd/vpd_tables.h index 822ed08..5e16c6c 100644 --- a/src/drivers/vpd/vpd_tables.h +++ b/src/drivers/vpd/vpd_tables.h @@ -9,7 +9,7 @@ #ifndef __LIB_VPD_TABLES_H__ #define __LIB_VPD_TABLES_H__ -#include <compiler.h> +#include <commonlib/compiler.h> #include <inttypes.h> #define VPD_ENTRY_MAGIC "_SM_" diff --git a/src/ec/google/chromeec/crosec_proto.c b/src/ec/google/chromeec/crosec_proto.c index 2529854..9d64b1f 100644 --- a/src/ec/google/chromeec/crosec_proto.c +++ b/src/ec/google/chromeec/crosec_proto.c @@ -14,7 +14,7 @@ */ #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <delay.h> #include <stdint.h> diff --git a/src/include/console/console.h b/src/include/console/console.h index ff20782..67ea412 100644 --- a/src/include/console/console.h +++ b/src/include/console/console.h @@ -19,7 +19,7 @@ #include <stdint.h> #include <rules.h> #include <arch/cpu.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/post_codes.h> #include <commonlib/loglevel.h> diff --git a/src/include/console/spi.h b/src/include/console/spi.h index 42566eb..0086e74 100644 --- a/src/include/console/spi.h +++ b/src/include/console/spi.h @@ -18,7 +18,7 @@ #include <rules.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> void spiconsole_init(void); void spiconsole_tx_byte(unsigned char c); diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index 9661b63..9f9f6be 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -38,7 +38,7 @@ #if !defined(__PRE_RAM__) && !defined(__ASSEMBLER__) -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/msr.h> void amd_setup_mtrrs(void); diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index 81d2ae7..9a14c69 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -16,7 +16,7 @@ #ifndef CPU_X86_CACHE #define CPU_X86_CACHE -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/cr.h> #define CR0_CacheDisable (CR0_CD) diff --git a/src/include/cpu/x86/cr.h b/src/include/cpu/x86/cr.h index 229a67d..7299884 100644 --- a/src/include/cpu/x86/cr.h +++ b/src/include/cpu/x86/cr.h @@ -18,7 +18,7 @@ #if !defined(__ASSEMBLER__) -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> #include <arch/cpu.h> diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index 5ac3c5e..9968807 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -1,7 +1,7 @@ #ifndef CPU_X86_LAPIC_H #define CPU_X86_LAPIC_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/lapic_def.h> #include <cpu/x86/msr.h> #include <halt.h> diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 290c54a..b955b32 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -1,7 +1,7 @@ #ifndef CPU_X86_MSR_H #define CPU_X86_MSR_H -#include <compiler.h> +#include <commonlib/compiler.h> /* Intel SDM: Table 2-1 * IA-32 architectural MSR: Extended Feature Enable Register diff --git a/src/include/cpu/x86/smm.h b/src/include/cpu/x86/smm.h index 9942772..c62a625 100644 --- a/src/include/cpu/x86/smm.h +++ b/src/include/cpu/x86/smm.h @@ -22,7 +22,7 @@ #include <arch/cpu.h> #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define SMM_DEFAULT_BASE 0x30000 #define SMM_DEFAULT_SIZE 0x10000 diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h index 9e9baa0..746e7c9 100644 --- a/src/include/device/pci_ops.h +++ b/src/include/device/pci_ops.h @@ -1,7 +1,7 @@ #ifndef PCI_OPS_H #define PCI_OPS_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> #include <device/device.h> #include <arch/pci_ops.h> diff --git a/src/include/elog.h b/src/include/elog.h index b64953c..f3e5366 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -16,7 +16,7 @@ #ifndef ELOG_H_ #define ELOG_H_ -#include <compiler.h> +#include <commonlib/compiler.h> /* SMI command code for GSMI event logging */ #define ELOG_GSMI_APM_CNT 0xEF diff --git a/src/include/halt.h b/src/include/halt.h index e8f1b51..8509c66 100644 --- a/src/include/halt.h +++ b/src/include/halt.h @@ -20,7 +20,7 @@ #ifdef __ROMCC__ #include <lib/halt.c> #else -#include <compiler.h> +#include <commonlib/compiler.h> /** * halt the system reliably */ diff --git a/src/include/memory_info.h b/src/include/memory_info.h index c9554b8..baf1dee 100644 --- a/src/include/memory_info.h +++ b/src/include/memory_info.h @@ -17,7 +17,7 @@ #define _MEMORY_INFO_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define DIMM_INFO_SERIAL_SIZE 4 #define DIMM_INFO_PART_NUMBER_SIZE 21 diff --git a/src/include/reset.h b/src/include/reset.h index 4899916..fa29d36 100644 --- a/src/include/reset.h +++ b/src/include/reset.h @@ -1,7 +1,7 @@ #ifndef RESET_H #define RESET_H -#include <compiler.h> +#include <commonlib/compiler.h> /* Generic reset functions. Call from code that wants to trigger a reset. */ diff --git a/src/include/sar.h b/src/include/sar.h index e1e0fcb..88e20f6 100644 --- a/src/include/sar.h +++ b/src/include/sar.h @@ -15,7 +15,7 @@ #ifndef _SAR_H_ #define _SAR_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> #define NUM_SAR_LIMITS 4 diff --git a/src/include/smbios.h b/src/include/smbios.h index 631a1a5..1dd2b1e 100644 --- a/src/include/smbios.h +++ b/src/include/smbios.h @@ -19,7 +19,7 @@ #define SMBIOS_H #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> unsigned long smbios_write_tables(unsigned long start); int smbios_add_string(u8 *start, const char *str); diff --git a/src/include/vbe.h b/src/include/vbe.h index ceceff2..fc4e36e 100644 --- a/src/include/vbe.h +++ b/src/include/vbe.h @@ -13,7 +13,7 @@ #ifndef VBE_H #define VBE_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <boot/coreboot_tables.h> // these structs are for input from and output to OF typedef struct { diff --git a/src/lib/boot_device.c b/src/lib/boot_device.c index c5afce7..ddc77eb 100644 --- a/src/lib/boot_device.c +++ b/src/lib/boot_device.c @@ -14,7 +14,7 @@ */ #include <boot_device.h> -#include <compiler.h> +#include <commonlib/compiler.h> void __weak boot_device_init(void) { diff --git a/src/lib/bootblock.c b/src/lib/bootblock.c index d74bebf..3915548 100644 --- a/src/lib/bootblock.c +++ b/src/lib/bootblock.c @@ -16,7 +16,7 @@ #include <arch/exception.h> #include <bootblock_common.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <delay.h> #include <pc80/mc146818rtc.h> diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index ca1fc84..88c18e5 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -20,7 +20,7 @@ #include <boot_device.h> #include <cbfs.h> #include <commonlib/compression.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <endian.h> #include <lib.h> #include <symbols.h> diff --git a/src/lib/cbmem_common.c b/src/lib/cbmem_common.c index 2451fca..ba30c5d 100644 --- a/src/lib/cbmem_common.c +++ b/src/lib/cbmem_common.c @@ -14,7 +14,7 @@ */ #include <console/console.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <bootstate.h> #include <rules.h> #include <symbols.h> diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c index d971670..08d5409 100644 --- a/src/lib/cbmem_console.c +++ b/src/lib/cbmem_console.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <console/cbmem_console.h> #include <console/uart.h> diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 62b3aaa..093690e 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -16,7 +16,7 @@ */ #include <arch/cbconfig.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <console/uart.h> #include <ip_checksum.h> diff --git a/src/lib/fallback_boot.c b/src/lib/fallback_boot.c index a079910..896eae1 100644 --- a/src/lib/fallback_boot.c +++ b/src/lib/fallback_boot.c @@ -1,5 +1,5 @@ #include <fallback.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <watchdog.h> /* Implement platform specific override. */ diff --git a/src/lib/gpio.c b/src/lib/gpio.c index 4cc039a..589e91e 100644 --- a/src/lib/gpio.c +++ b/src/lib/gpio.c @@ -15,7 +15,7 @@ #include <assert.h> #include <base3.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <delay.h> #include <gpio.h> diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index 6fd55d7..5eb8e7b 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -21,7 +21,7 @@ #include <adainit.h> #include <arch/exception.h> #include <bootstate.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <console/post_codes.h> #include <cbmem.h> diff --git a/src/lib/imd.c b/src/lib/imd.c index d17cc81..8e46423 100644 --- a/src/lib/imd.c +++ b/src/lib/imd.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <assert.h> #include <cbmem.h> #include <console/console.h> diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c index 83d5c1f..33881cb 100644 --- a/src/lib/imd_cbmem.c +++ b/src/lib/imd_cbmem.c @@ -15,7 +15,7 @@ #include <bootstate.h> #include <bootmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cbmem.h> #include <imd.h> diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 1c192d1..bb6cfd3 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -17,7 +17,7 @@ #include <stdlib.h> #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <fallback.h> #include <halt.h> diff --git a/src/lib/prog_ops.c b/src/lib/prog_ops.c index 5e670d3..d7403e3 100644 --- a/src/lib/prog_ops.c +++ b/src/lib/prog_ops.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <program_loading.h> /* For each segment of a program loaded this function is called*/ diff --git a/src/lib/reset.c b/src/lib/reset.c index d5676e5..56c7abd 100644 --- a/src/lib/reset.c +++ b/src/lib/reset.c @@ -14,7 +14,7 @@ */ #include <arch/cache.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <halt.h> #include <reset.h> diff --git a/src/lib/timer.c b/src/lib/timer.c index 2cb76dd..21e8074 100644 --- a/src/lib/timer.c +++ b/src/lib/timer.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <timer.h> #include <delay.h> #include <thread.h> diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 120934d..1b18b92 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -17,7 +17,7 @@ #include <assert.h> #include <stddef.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cbmem.h> #include <symbols.h> diff --git a/src/lib/wrdd.c b/src/lib/wrdd.c index a8390cf..697872e 100644 --- a/src/lib/wrdd.c +++ b/src/lib/wrdd.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <wrdd.h> uint16_t __weak wifi_regulatory_domain(void) diff --git a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c index 7e33374..f26add0 100644 --- a/src/mainboard/emulation/qemu-i440fx/fw_cfg.c +++ b/src/mainboard/emulation/qemu-i440fx/fw_cfg.c @@ -11,7 +11,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <string.h> #include <swab.h> #include <smbios.h> diff --git a/src/mainboard/google/cyan/romstage.c b/src/mainboard/google/cyan/romstage.c index e56e3d2..3dcbd84 100644 --- a/src/mainboard/google/cyan/romstage.c +++ b/src/mainboard/google/cyan/romstage.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/romstage.h> #include <baseboard/variants.h> #include <chip.h> diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c index 106faf4..93ef7e5 100644 --- a/src/mainboard/google/cyan/spd/spd.c +++ b/src/mainboard/google/cyan/spd/spd.c @@ -16,7 +16,7 @@ #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <gpio.h> #include <lib.h> diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c index 2540bcd..303a05b 100644 --- a/src/mainboard/google/kahlee/mainboard.c +++ b/src/mainboard/google/kahlee/mainboard.c @@ -14,7 +14,7 @@ */ #include <string.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <arch/acpi.h> diff --git a/src/mainboard/google/kahlee/romstage.c b/src/mainboard/google/kahlee/romstage.c index 50e9931..ae7568c 100644 --- a/src/mainboard/google/kahlee/romstage.c +++ b/src/mainboard/google/kahlee/romstage.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <amdblocks/dimm_spd.h> #include <baseboard/variants.h> #include <soc/romstage.h> diff --git a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c index 6d34d4a..7f83c1a 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c +++ b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <amdblocks/agesawrapper.h> #include <variant/gpio.h> #include <boardid.h> diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 95064bc..b26c7f7 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <baseboard/variants.h> #include <soc/gpio.h> #include <soc/southbridge.h> diff --git a/src/mainboard/google/kahlee/variants/baseboard/memory.c b/src/mainboard/google/kahlee/variants/baseboard/memory.c index 280140b..1b73a9e 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/memory.c +++ b/src/mainboard/google/kahlee/variants/baseboard/memory.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <gpio.h> /* src/include/gpio.h */ #include <spd_bin.h> diff --git a/src/mainboard/google/octopus/mainboard.c b/src/mainboard/google/octopus/mainboard.c index 6effa7c..21150d9 100644 --- a/src/mainboard/google/octopus/mainboard.c +++ b/src/mainboard/google/octopus/mainboard.c @@ -16,7 +16,7 @@ #include <arch/acpi.h> #include <baseboard/variants.h> #include <boardid.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <device/pci_def.h> diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index 2b9d4b4..fccbbc8 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -17,7 +17,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing' diff --git a/src/mainboard/google/octopus/variants/baseboard/memory.c b/src/mainboard/google/octopus/variants/baseboard/memory.c index b7a3fc6..f9b2f1b 100644 --- a/src/mainboard/google/octopus/variants/baseboard/memory.c +++ b/src/mainboard/google/octopus/variants/baseboard/memory.c @@ -15,7 +15,7 @@ #include <baseboard/variants.h> #include <boardid.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <gpio.h> #include <soc/meminit.h> #include <variant/gpio.h> diff --git a/src/mainboard/google/octopus/variants/baseboard/nhlt.c b/src/mainboard/google/octopus/variants/baseboard/nhlt.c index b71aadf..56ec8cb 100644 --- a/src/mainboard/google/octopus/variants/baseboard/nhlt.c +++ b/src/mainboard/google/octopus/variants/baseboard/nhlt.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <nhlt.h> #include <soc/nhlt.h> diff --git a/src/mainboard/google/poppy/ramstage.c b/src/mainboard/google/poppy/ramstage.c index ea15aea..45c77a5 100644 --- a/src/mainboard/google/poppy/ramstage.c +++ b/src/mainboard/google/poppy/ramstage.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <baseboard/variants.h> #include <soc/ramstage.h> diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c index c1b8e4c..31bb17a 100644 --- a/src/mainboard/google/poppy/variants/baseboard/gpio.c +++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c @@ -16,7 +16,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* Pad configuration in ramstage */ /* Leave eSPI pins untouched from default settings */ diff --git a/src/mainboard/google/poppy/variants/baseboard/memory.c b/src/mainboard/google/poppy/variants/baseboard/memory.c index 95f2b95..f0ff381 100644 --- a/src/mainboard/google/poppy/variants/baseboard/memory.c +++ b/src/mainboard/google/poppy/variants/baseboard/memory.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <gpio.h> #include <variant/gpio.h> diff --git a/src/mainboard/google/poppy/variants/baseboard/nhlt.c b/src/mainboard/google/poppy/variants/baseboard/nhlt.c index 927cb24..81e78d6 100644 --- a/src/mainboard/google/poppy/variants/baseboard/nhlt.c +++ b/src/mainboard/google/poppy/variants/baseboard/nhlt.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <nhlt.h> #include <soc/nhlt.h> diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c index 2052ae0..d9189fe 100644 --- a/src/mainboard/google/poppy/variants/nami/mainboard.c +++ b/src/mainboard/google/poppy/variants/nami/mainboard.c @@ -19,7 +19,7 @@ #include <cbfs.h> #include <chip.h> #include <commonlib/cbfs_serialized.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <drivers/intel/gma/opregion.h> #include <ec/google/chromeec/ec.h> diff --git a/src/mainboard/google/reef/mainboard.c b/src/mainboard/google/reef/mainboard.c index 6db9ac6..bf8a9ac 100644 --- a/src/mainboard/google/reef/mainboard.c +++ b/src/mainboard/google/reef/mainboard.c @@ -16,7 +16,7 @@ #include <arch/acpi.h> #include <baseboard/variants.h> #include <boardid.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <ec/ec.h> diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c index 3cd765b..587bc8e 100644 --- a/src/mainboard/google/reef/variants/baseboard/gpio.c +++ b/src/mainboard/google/reef/variants/baseboard/gpio.c @@ -16,7 +16,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing' diff --git a/src/mainboard/google/reef/variants/baseboard/memory.c b/src/mainboard/google/reef/variants/baseboard/memory.c index 2ee3fb4..f2d89d5 100644 --- a/src/mainboard/google/reef/variants/baseboard/memory.c +++ b/src/mainboard/google/reef/variants/baseboard/memory.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <gpio.h> #include <soc/meminit.h> #include <variant/gpio.h> diff --git a/src/mainboard/google/reef/variants/baseboard/nhlt.c b/src/mainboard/google/reef/variants/baseboard/nhlt.c index 1887669..adc76bd 100644 --- a/src/mainboard/google/reef/variants/baseboard/nhlt.c +++ b/src/mainboard/google/reef/variants/baseboard/nhlt.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <nhlt.h> #include <soc/nhlt.h> diff --git a/src/mainboard/google/zoombini/memory.c b/src/mainboard/google/zoombini/memory.c index 802467c..87a7a37 100644 --- a/src/mainboard/google/zoombini/memory.c +++ b/src/mainboard/google/zoombini/memory.c @@ -15,7 +15,7 @@ #include <baseboard/variants.h> #include <baseboard/gpio.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <gpio.h> #include <soc/cnl_memcfg_init.h> diff --git a/src/mainboard/google/zoombini/variants/baseboard/gpio.c b/src/mainboard/google/zoombini/variants/baseboard/gpio.c index f8c84b4..7fdf9cd 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/gpio.c +++ b/src/mainboard/google/zoombini/variants/baseboard/gpio.c @@ -15,7 +15,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* Pad configuration in ramstage */ static const struct pad_config gpio_table[] = { diff --git a/src/mainboard/google/zoombini/variants/baseboard/nhlt.c b/src/mainboard/google/zoombini/variants/baseboard/nhlt.c index ffaa6e5..ace1720 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/nhlt.c +++ b/src/mainboard/google/zoombini/variants/baseboard/nhlt.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <nhlt.h> #include <soc/nhlt.h> diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c index fa9d0e9..22f327a 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/gpio.c @@ -16,7 +16,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* Pad configuration in ramstage*/ static const struct pad_config gpio_table[] = { diff --git a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c index 6f3629e..34668de 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c +++ b/src/mainboard/intel/cannonlake_rvp/variants/baseboard/nhlt.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <nhlt.h> #include <soc/nhlt.h> diff --git a/src/mainboard/intel/coffeelake_rvp/memory.c b/src/mainboard/intel/coffeelake_rvp/memory.c index 7058be4..a4407ea 100644 --- a/src/mainboard/intel/coffeelake_rvp/memory.c +++ b/src/mainboard/intel/coffeelake_rvp/memory.c @@ -16,7 +16,7 @@ #include <baseboard/variants.h> #include <baseboard/gpio.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <gpio.h> #include <soc/cnl_memcfg_init.h> diff --git a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c index 4d53eca..939d56c 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c +++ b/src/mainboard/intel/coffeelake_rvp/variants/baseboard/nhlt.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <nhlt.h> #include <soc/nhlt.h> diff --git a/src/mainboard/intel/galileo/vboot.c b/src/mainboard/intel/galileo/vboot.c index 8242754..7ef3691 100644 --- a/src/mainboard/intel/galileo/vboot.c +++ b/src/mainboard/intel/galileo/vboot.c @@ -14,7 +14,7 @@ #include <assert.h> #include <bootmode.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <delay.h> #include <device/i2c_simple.h> diff --git a/src/mainboard/intel/glkrvp/chromeos.c b/src/mainboard/intel/glkrvp/chromeos.c index 76c83e1..ff2db62 100644 --- a/src/mainboard/intel/glkrvp/chromeos.c +++ b/src/mainboard/intel/glkrvp/chromeos.c @@ -15,7 +15,7 @@ #include <baseboard/variants.h> #include <boot/coreboot_tables.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <ec/google/chromeec/ec.h> #include <gpio.h> #include <vendorcode/google/chromeos/chromeos.h> diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c index f6f31bb..13085ec 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/boardid.c @@ -15,7 +15,7 @@ #include <baseboard/variants.h> #include <boardid.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <ec/google/chromeec/ec.h> int variant_board_id(void) diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c index a27047e..a9f2812 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c @@ -16,7 +16,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing' diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c index 56fac2a..be0bcda 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/memory.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/memory.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <gpio.h> #include <soc/meminit.h> #include <variant/gpio.h> diff --git a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c index 51da3ad..8448cea 100644 --- a/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c +++ b/src/mainboard/intel/glkrvp/variants/baseboard/nhlt.c @@ -14,7 +14,7 @@ */ #include <baseboard/variants.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <nhlt.h> #include <soc/nhlt.h> diff --git a/src/mainboard/siemens/mc_apl1/mainboard.c b/src/mainboard/siemens/mc_apl1/mainboard.c index b81da5f..a64220b 100644 --- a/src/mainboard/siemens/mc_apl1/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/mainboard.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c index 28aad8a..75c54ad 100644 --- a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c +++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c @@ -15,7 +15,7 @@ */ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <baseboard/variants.h> /* diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c index 13b7ab8..63b6912 100644 --- a/src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c +++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/memory.c @@ -16,7 +16,7 @@ #include <baseboard/variants.h> #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/meminit.h> const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle = { diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h index 90b509c..b21f071 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl1/include/variant/ptn3460.h @@ -17,7 +17,7 @@ #define PTN3460_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define PTN_SLAVE_ADR 0x20 #define PTN_I2C_CONTROLLER 0 diff --git a/src/mainboard/siemens/mc_tcu3/ptn3460.h b/src/mainboard/siemens/mc_tcu3/ptn3460.h index 5988c93..188a569 100644 --- a/src/mainboard/siemens/mc_tcu3/ptn3460.h +++ b/src/mainboard/siemens/mc_tcu3/ptn3460.h @@ -16,7 +16,7 @@ #ifndef PTN3460_H_ #define PTN3460_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <delay.h> #include "lcd_panel.h" diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index 5102b0b..1359f17 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -18,7 +18,7 @@ #define AMDFAM10_H #include <inttypes.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> #include <device/device.h> #include "early_ht.h" diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h index 6a69cfa..be114a0 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.h +++ b/src/northbridge/amd/amdmct/mct/mct_d.h @@ -23,7 +23,7 @@ #define DQS_TRAIN_DEBUG 0 #include <inttypes.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include "mct_d_gcc.h" #include <console/console.h> #include <northbridge/amd/amdfam10/debug.h> diff --git a/src/northbridge/amd/lx/raminit.c b/src/northbridge/amd/lx/raminit.c index 55dcefd..07c475e 100644 --- a/src/northbridge/amd/lx/raminit.c +++ b/src/northbridge/amd/lx/raminit.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/msr.h> #include <cpu/amd/lxdef.h> diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c index d083883..ba1304d 100644 --- a/src/northbridge/amd/pi/agesawrapper.c +++ b/src/northbridge/amd/pi/agesawrapper.c @@ -16,7 +16,7 @@ #include <AGESA.h> #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <delay.h> #include <cpu/x86/mtrr.h> #include <FchPlatform.h> diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 4919e65..67f1ea4 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -24,7 +24,7 @@ * Steven James 02/06/2003 */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> #include <device/pci_def.h> #include <arch/io.h> diff --git a/src/northbridge/intel/haswell/haswell.h b/src/northbridge/intel/haswell/haswell.h index d8868a1..155873b 100644 --- a/src/northbridge/intel/haswell/haswell.h +++ b/src/northbridge/intel/haswell/haswell.h @@ -202,7 +202,7 @@ #define DMIDRCCFG 0xeb4 /* 32bit */ #ifndef __ASSEMBLER__ -#include <compiler.h> +#include <commonlib/compiler.h> static inline void barrier(void) { asm("" ::: "memory"); } struct ied_header { diff --git a/src/northbridge/intel/haswell/pei_data.h b/src/northbridge/intel/haswell/pei_data.h index f4023e0..a79cb14 100644 --- a/src/northbridge/intel/haswell/pei_data.h +++ b/src/northbridge/intel/haswell/pei_data.h @@ -30,7 +30,7 @@ #ifndef PEI_DATA_H #define PEI_DATA_H -#include <compiler.h> +#include <commonlib/compiler.h> typedef void (*tx_byte_func)(unsigned char byte); #define PEI_VERSION 15 diff --git a/src/northbridge/intel/i945/raminit.h b/src/northbridge/intel/i945/raminit.h index 7d85557..d9aef49 100644 --- a/src/northbridge/intel/i945/raminit.h +++ b/src/northbridge/intel/i945/raminit.h @@ -16,7 +16,7 @@ #ifndef RAMINIT_H #define RAMINIT_H -#include <compiler.h> +#include <commonlib/compiler.h> #define DIMM_SOCKETS 2 diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index 490fd09..3083e84 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -15,7 +15,7 @@ */ #include <stdlib.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <string.h> #include <arch/io.h> diff --git a/src/northbridge/intel/sandybridge/pei_data.h b/src/northbridge/intel/sandybridge/pei_data.h index 41fc33f..3088b00 100644 --- a/src/northbridge/intel/sandybridge/pei_data.h +++ b/src/northbridge/intel/sandybridge/pei_data.h @@ -30,7 +30,7 @@ #ifndef PEI_DATA_H #define PEI_DATA_H -#include <compiler.h> +#include <commonlib/compiler.h> typedef struct { uint16_t mode; // 0: Disable, 1: Enable, 2: Auto, 3: Smart Auto diff --git a/src/northbridge/intel/sandybridge/raminit.h b/src/northbridge/intel/sandybridge/raminit.h index 66a94f4..ef14f8c 100644 --- a/src/northbridge/intel/sandybridge/raminit.h +++ b/src/northbridge/intel/sandybridge/raminit.h @@ -16,7 +16,7 @@ #ifndef RAMINIT_H #define RAMINIT_H -#include <compiler.h> +#include <commonlib/compiler.h> #include "pei_data.h" struct sys_info { diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 39b540c..77ed1a3 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <console/usb.h> #include <bootmode.h> diff --git a/src/security/tpm/tss/tcg-2.0/tss_structures.h b/src/security/tpm/tss/tcg-2.0/tss_structures.h index 11fb714..de6f824 100644 --- a/src/security/tpm/tss/tcg-2.0/tss_structures.h +++ b/src/security/tpm/tss/tcg-2.0/tss_structures.h @@ -12,7 +12,7 @@ * constants and structures needed for functions used in coreboot. */ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <types.h> #include "../common/tss_common.h" diff --git a/src/security/vboot/bootmode.c b/src/security/vboot/bootmode.c index ba7edff..c44cbe6 100644 --- a/src/security/vboot/bootmode.c +++ b/src/security/vboot/bootmode.c @@ -17,7 +17,7 @@ #include <bootmode.h> #include <bootstate.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <rules.h> #include <string.h> #include <vb2_api.h> diff --git a/src/security/vboot/vboot_common.c b/src/security/vboot/vboot_common.c index ae5bdb6..6db1692 100644 --- a/src/security/vboot/vboot_common.c +++ b/src/security/vboot/vboot_common.c @@ -16,7 +16,7 @@ #include <boot/coreboot_tables.h> #include <boot_device.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/cbmem_console.h> #include <console/console.h> #include <fmap.h> diff --git a/src/security/vboot/vboot_common.h b/src/security/vboot/vboot_common.h index 8f03788..17f2b35 100644 --- a/src/security/vboot/vboot_common.h +++ b/src/security/vboot/vboot_common.h @@ -17,7 +17,7 @@ #include <commonlib/region.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <vboot_api.h> #include <vboot_struct.h> diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index a0e6a32..c6f5c94 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -16,7 +16,7 @@ #include <arch/exception.h> #include <assert.h> #include <bootmode.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <console/vtxprintf.h> #include <delay.h> diff --git a/src/security/vboot/verstage.c b/src/security/vboot/verstage.c index fd75250..b5502be 100644 --- a/src/security/vboot/verstage.c +++ b/src/security/vboot/verstage.c @@ -15,7 +15,7 @@ #include <arch/exception.h> #include <arch/hlt.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <program_loading.h> #include <security/vboot/vboot_common.h> diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h index 6e1a1f0..2aca267 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp.h +++ b/src/soc/amd/common/block/include/amdblocks/psp.h @@ -19,7 +19,7 @@ #include <amdblocks/agesawrapper.h> #include <soc/pci_devs.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* Extra, Special Purpose Registers in the PSP PCI Config Space */ diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c index 7ef2bda..651f98e 100644 --- a/src/soc/amd/common/block/pi/agesawrapper.c +++ b/src/soc/amd/common/block/pi/agesawrapper.c @@ -19,7 +19,7 @@ #include <cpu/x86/mtrr.h> #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <delay.h> #include <rules.h> #include <rmodule.h> diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c index 56bd866..bbf4f0f 100644 --- a/src/soc/amd/common/block/pi/def_callouts.c +++ b/src/soc/amd/common/block/pi/def_callouts.c @@ -15,7 +15,7 @@ */ #include <cbfs.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/lapic.h> #include <cpu/x86/mp.h> #include <timer.h> diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c index 027ba4e..03f80e4 100644 --- a/src/soc/amd/stoneyridge/BiosCallOuts.c +++ b/src/soc/amd/stoneyridge/BiosCallOuts.c @@ -15,7 +15,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/pci_def.h> #include <amdblocks/BiosCallOuts.h> diff --git a/src/soc/amd/stoneyridge/gpio.c b/src/soc/amd/stoneyridge/gpio.c index b4b7acf..503082c 100644 --- a/src/soc/amd/stoneyridge/gpio.c +++ b/src/soc/amd/stoneyridge/gpio.c @@ -21,7 +21,7 @@ #include <soc/gpio.h> #include <soc/southbridge.h> #include <assert.h> -#include <compiler.h> +#include <commonlib/compiler.h> static const struct soc_amd_event gpio_event_table[] = { { GPIO_1, GEVENT_19 }, diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h index 1477358..ff82d8b 100644 --- a/src/soc/amd/stoneyridge/include/soc/nvs.h +++ b/src/soc/amd/stoneyridge/include/soc/nvs.h @@ -25,7 +25,7 @@ #define __SOC_STONEYRIDGE_NVS_H__ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> #include <vendorcode/google/chromeos/gnvs.h> #include <soc/southbridge.h> diff --git a/src/soc/amd/stoneyridge/romstage.c b/src/soc/amd/stoneyridge/romstage.c index a5acaf6..48f0661 100644 --- a/src/soc/amd/stoneyridge/romstage.c +++ b/src/soc/amd/stoneyridge/romstage.c @@ -17,7 +17,7 @@ #include <arch/io.h> #include <arch/cpu.h> #include <arch/acpi.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/amd/mtrr.h> diff --git a/src/soc/amd/stoneyridge/usb.c b/src/soc/amd/stoneyridge/usb.c index 6007af1..3d3f62f 100644 --- a/src/soc/amd/stoneyridge/usb.c +++ b/src/soc/amd/stoneyridge/usb.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 4ea8971..6568a02 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -20,7 +20,7 @@ #include <arch/acpi.h> #include <bootstate.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/mp.h> diff --git a/src/soc/intel/apollolake/cse.c b/src/soc/intel/apollolake/cse.c index 8842500..bc077a6 100644 --- a/src/soc/intel/apollolake/cse.c +++ b/src/soc/intel/apollolake/cse.c @@ -22,7 +22,7 @@ #include <soc/pci_devs.h> #include <device/pci_ops.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define PCI_ME_HFSTS1 0x40 #define PCI_ME_HFSTS2 0x48 diff --git a/src/soc/intel/apollolake/include/soc/nvs.h b/src/soc/intel/apollolake/include/soc/nvs.h index 3250aeb..98b3ec9 100644 --- a/src/soc/intel/apollolake/include/soc/nvs.h +++ b/src/soc/intel/apollolake/include/soc/nvs.h @@ -25,7 +25,7 @@ #define _SOC_APOLLOLAKE_NVS_H_ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <vendorcode/google/chromeos/gnvs.h> typedef struct global_nvs_t { diff --git a/src/soc/intel/apollolake/include/soc/pm.h b/src/soc/intel/apollolake/include/soc/pm.h index 6de39a0..fc558b3 100644 --- a/src/soc/intel/apollolake/include/soc/pm.h +++ b/src/soc/intel/apollolake/include/soc/pm.h @@ -19,7 +19,7 @@ #define _SOC_APOLLOLAKE_PM_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/acpi.h> #include <soc/gpe.h> #include <soc/iomap.h> diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 4168771..801340d 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -24,7 +24,7 @@ #include <bootmode.h> #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/pae.h> @@ -52,7 +52,6 @@ #include <timestamp.h> #include <timer.h> #include <delay.h> -#include <compiler.h> #include "chip.h" static const uint8_t hob_variable_guid[16] = { diff --git a/src/soc/intel/baytrail/gpio.c b/src/soc/intel/baytrail/gpio.c index 5da5104..92023b2 100644 --- a/src/soc/intel/baytrail/gpio.c +++ b/src/soc/intel/baytrail/gpio.c @@ -14,7 +14,7 @@ */ #include <device/pci.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <soc/gpio.h> #include <soc/pmc.h> diff --git a/src/soc/intel/baytrail/include/soc/device_nvs.h b/src/soc/intel/baytrail/include/soc/device_nvs.h index bc6f7ec..b942cc2 100644 --- a/src/soc/intel/baytrail/include/soc/device_nvs.h +++ b/src/soc/intel/baytrail/include/soc/device_nvs.h @@ -17,7 +17,7 @@ #define _BAYTRAIL_DEVICE_NVS_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define LPSS_NVS_SIO_DMA1 0 #define LPSS_NVS_I2C1 1 diff --git a/src/soc/intel/baytrail/include/soc/efi_wrapper.h b/src/soc/intel/baytrail/include/soc/efi_wrapper.h index 3425aae..37a9ab7 100644 --- a/src/soc/intel/baytrail/include/soc/efi_wrapper.h +++ b/src/soc/intel/baytrail/include/soc/efi_wrapper.h @@ -29,7 +29,7 @@ #ifndef __EFI_WRAPPER_H__ #define __EFI_WRAPPER_H__ -#include <compiler.h> +#include <commonlib/compiler.h> #define EFI_WRAPPER_VER 2 diff --git a/src/soc/intel/baytrail/include/soc/gpio.h b/src/soc/intel/baytrail/include/soc/gpio.h index 93e80cb..f4960a8 100644 --- a/src/soc/intel/baytrail/include/soc/gpio.h +++ b/src/soc/intel/baytrail/include/soc/gpio.h @@ -17,7 +17,7 @@ #define _BAYTRAIL_GPIO_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> #include <soc/iomap.h> diff --git a/src/soc/intel/baytrail/include/soc/mrc_wrapper.h b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h index d3547c2..a660a7b 100644 --- a/src/soc/intel/baytrail/include/soc/mrc_wrapper.h +++ b/src/soc/intel/baytrail/include/soc/mrc_wrapper.h @@ -28,7 +28,7 @@ #ifndef _MRC_WRAPPER_H_ #define _MRC_WRAPPER_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #define MRC_PARAMS_VER 5 diff --git a/src/soc/intel/baytrail/include/soc/nvs.h b/src/soc/intel/baytrail/include/soc/nvs.h index 715929d..e474881 100644 --- a/src/soc/intel/baytrail/include/soc/nvs.h +++ b/src/soc/intel/baytrail/include/soc/nvs.h @@ -18,7 +18,7 @@ #define _BAYTRAIL_NVS_H_ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <vendorcode/google/chromeos/gnvs.h> #include <soc/device_nvs.h> diff --git a/src/soc/intel/baytrail/include/soc/pmc.h b/src/soc/intel/baytrail/include/soc/pmc.h index c287d9c..d1e19a5 100644 --- a/src/soc/intel/baytrail/include/soc/pmc.h +++ b/src/soc/intel/baytrail/include/soc/pmc.h @@ -16,7 +16,7 @@ #ifndef _BAYTRAIL_PMC_H_ #define _BAYTRAIL_PMC_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/acpi.h> #define IOCOM1 0x3f8 diff --git a/src/soc/intel/baytrail/southcluster.c b/src/soc/intel/baytrail/southcluster.c index 83f4227..171e782 100644 --- a/src/soc/intel/baytrail/southcluster.c +++ b/src/soc/intel/baytrail/southcluster.c @@ -19,7 +19,7 @@ #include <arch/acpi.h> #include <bootstate.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <device/device.h> diff --git a/src/soc/intel/baytrail/spi.c b/src/soc/intel/baytrail/spi.c index c42b398..a7f9b25 100644 --- a/src/soc/intel/baytrail/spi.c +++ b/src/soc/intel/baytrail/spi.c @@ -14,7 +14,7 @@ /* This file is derived from the flashrom project. */ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdlib.h> #include <string.h> #include <bootstate.h> diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index 0a683fb..a7851a8 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -22,7 +22,7 @@ #include <arch/smp/mpspec.h> #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/cpu.h> #include <cpu/intel/turbo.h> diff --git a/src/soc/intel/braswell/chip.c b/src/soc/intel/braswell/chip.c index 35cbd15..e5d3196 100644 --- a/src/soc/intel/braswell/chip.c +++ b/src/soc/intel/braswell/chip.c @@ -15,7 +15,7 @@ */ #include <chip.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/braswell/gpio.c b/src/soc/intel/braswell/gpio.c index 23be45a..b68d7e9 100644 --- a/src/soc/intel/braswell/gpio.c +++ b/src/soc/intel/braswell/gpio.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/pci.h> #include <soc/gpio.h> diff --git a/src/soc/intel/braswell/include/soc/device_nvs.h b/src/soc/intel/braswell/include/soc/device_nvs.h index 8ed534e..1316af5 100644 --- a/src/soc/intel/braswell/include/soc/device_nvs.h +++ b/src/soc/intel/braswell/include/soc/device_nvs.h @@ -18,7 +18,7 @@ #define _SOC_DEVICE_NVS_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define LPSS_NVS_SIO_DMA1 0 #define LPSS_NVS_I2C1 1 diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h index 6b382fc..a36da6b 100644 --- a/src/soc/intel/braswell/include/soc/gpio.h +++ b/src/soc/intel/braswell/include/soc/gpio.h @@ -18,7 +18,7 @@ #define _SOC_GPIO_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> #include <soc/gpio_defs.h> #include <soc/iomap.h> diff --git a/src/soc/intel/braswell/include/soc/nvs.h b/src/soc/intel/braswell/include/soc/nvs.h index 05831bb..c7e8a69 100644 --- a/src/soc/intel/braswell/include/soc/nvs.h +++ b/src/soc/intel/braswell/include/soc/nvs.h @@ -19,7 +19,7 @@ #define _SOC_NVS_H_ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <rules.h> #include <soc/device_nvs.h> #include <vendorcode/google/chromeos/gnvs.h> diff --git a/src/soc/intel/braswell/include/soc/pm.h b/src/soc/intel/braswell/include/soc/pm.h index 5ac29f4..c5c1877 100644 --- a/src/soc/intel/braswell/include/soc/pm.h +++ b/src/soc/intel/braswell/include/soc/pm.h @@ -17,7 +17,7 @@ #ifndef _SOC_PM_H_ #define _SOC_PM_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/acpi.h> #define IOCOM1 0x3f8 diff --git a/src/soc/intel/braswell/southcluster.c b/src/soc/intel/braswell/southcluster.c index 24d4b8b..b2d87c8 100644 --- a/src/soc/intel/braswell/southcluster.c +++ b/src/soc/intel/braswell/southcluster.c @@ -21,7 +21,7 @@ #include <bootstate.h> #include <cbmem.h> #include "chip.h" -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <device/device.h> diff --git a/src/soc/intel/braswell/spi.c b/src/soc/intel/braswell/spi.c index f2d178d..7624b22 100644 --- a/src/soc/intel/braswell/spi.c +++ b/src/soc/intel/braswell/spi.c @@ -26,7 +26,7 @@ #include <spi_flash.h> #include <spi-generic.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdlib.h> #include <string.h> diff --git a/src/soc/intel/broadwell/include/soc/device_nvs.h b/src/soc/intel/broadwell/include/soc/device_nvs.h index d17b3d4..bad0f6b 100644 --- a/src/soc/intel/broadwell/include/soc/device_nvs.h +++ b/src/soc/intel/broadwell/include/soc/device_nvs.h @@ -17,7 +17,7 @@ #define _BROADWELL_DEVICE_NVS_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define SIO_NVS_DMA 0 #define SIO_NVS_I2C0 1 diff --git a/src/soc/intel/broadwell/include/soc/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h index d5ff7bb..afd3a21 100644 --- a/src/soc/intel/broadwell/include/soc/gpio.h +++ b/src/soc/intel/broadwell/include/soc/gpio.h @@ -17,7 +17,7 @@ #define _BROADWELL_GPIO_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define CROS_GPIO_DEVICE_NAME "PCH-LP" #define CROS_GPIO_ACPI_DEVICE_NAME "INT3437:00" diff --git a/src/soc/intel/broadwell/include/soc/me.h b/src/soc/intel/broadwell/include/soc/me.h index 34b4481..c563eac 100644 --- a/src/soc/intel/broadwell/include/soc/me.h +++ b/src/soc/intel/broadwell/include/soc/me.h @@ -16,7 +16,7 @@ #ifndef _BROADWELL_ME_H_ #define _BROADWELL_ME_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <commonlib/loglevel.h> #define ME_RETRY 100000 /* 1 second */ diff --git a/src/soc/intel/broadwell/include/soc/nvs.h b/src/soc/intel/broadwell/include/soc/nvs.h index 2e51e1b..4a38e3e 100644 --- a/src/soc/intel/broadwell/include/soc/nvs.h +++ b/src/soc/intel/broadwell/include/soc/nvs.h @@ -18,7 +18,7 @@ #define _BROADWELL_NVS_H_ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/device_nvs.h> #include <vendorcode/google/chromeos/gnvs.h> diff --git a/src/soc/intel/broadwell/include/soc/pei_data.h b/src/soc/intel/broadwell/include/soc/pei_data.h index d12011e..64b9825 100644 --- a/src/soc/intel/broadwell/include/soc/pei_data.h +++ b/src/soc/intel/broadwell/include/soc/pei_data.h @@ -30,7 +30,7 @@ #define PEI_DATA_H #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define PEI_VERSION 22 diff --git a/src/soc/intel/broadwell/include/soc/smm.h b/src/soc/intel/broadwell/include/soc/smm.h index 9a749c9..4655847 100644 --- a/src/soc/intel/broadwell/include/soc/smm.h +++ b/src/soc/intel/broadwell/include/soc/smm.h @@ -17,7 +17,7 @@ #define _BROADWELL_SMM_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/msr.h> struct ied_header { diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c index 142f3b3..17d4320 100644 --- a/src/soc/intel/broadwell/romstage/romstage.c +++ b/src/soc/intel/broadwell/romstage/romstage.c @@ -20,7 +20,7 @@ #include <arch/cbfs.h> #include <arch/early_variables.h> #include <bootmode.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cbfs.h> #include <cbmem.h> diff --git a/src/soc/intel/broadwell/spi.c b/src/soc/intel/broadwell/spi.c index 7d862f2..b9638cf 100644 --- a/src/soc/intel/broadwell/spi.c +++ b/src/soc/intel/broadwell/spi.c @@ -13,7 +13,7 @@ /* This file is derived from the flashrom project. */ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdlib.h> #include <string.h> #include <bootstate.h> diff --git a/src/soc/intel/cannonlake/chip.c b/src/soc/intel/cannonlake/chip.c index 34a2fe0..44a1f9b 100644 --- a/src/soc/intel/cannonlake/chip.c +++ b/src/soc/intel/cannonlake/chip.c @@ -14,7 +14,7 @@ */ #include <chip.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/soc/intel/cannonlake/include/soc/nvs.h b/src/soc/intel/cannonlake/include/soc/nvs.h index 1e55625..b58ca98 100644 --- a/src/soc/intel/cannonlake/include/soc/nvs.h +++ b/src/soc/intel/cannonlake/include/soc/nvs.h @@ -19,7 +19,7 @@ #define _SOC_NVS_H_ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <vendorcode/google/chromeos/gnvs.h> typedef struct global_nvs_t { diff --git a/src/soc/intel/cannonlake/include/soc/pm.h b/src/soc/intel/cannonlake/include/soc/pm.h index 1494d56..bef2d34 100644 --- a/src/soc/intel/cannonlake/include/soc/pm.h +++ b/src/soc/intel/cannonlake/include/soc/pm.h @@ -142,7 +142,7 @@ #include <arch/acpi.h> #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/gpe.h> #include <soc/iomap.h> #include <soc/smbus.h> diff --git a/src/soc/intel/cannonlake/reset.c b/src/soc/intel/cannonlake/reset.c index 140fbff..eaa9e1e 100644 --- a/src/soc/intel/cannonlake/reset.c +++ b/src/soc/intel/cannonlake/reset.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index 8bdabbf..36ed21b 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -19,7 +19,7 @@ #include <chip.h> #include <cpu/x86/mtrr.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <fsp/util.h> #include <intelblocks/chip.h> diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c index e0d8bfb..d3aaa25 100644 --- a/src/soc/intel/common/acpi_wake_source.c +++ b/src/soc/intel/common/acpi_wake_source.c @@ -16,7 +16,7 @@ #include <arch/acpi.h> #include <bootstate.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <soc/nvs.h> #include <stdint.h> diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 8fdaeee..b3ac186 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -18,7 +18,7 @@ #include <arch/smp/mpspec.h> #include <bootstate.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/intel/reset.h> #include <cpu/intel/turbo.h> #include <cpu/x86/msr.h> diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c index dd5cc44..622fd1d 100644 --- a/src/soc/intel/common/block/cpu/mp_init.c +++ b/src/soc/intel/common/block/cpu/mp_init.c @@ -16,7 +16,7 @@ #include <arch/io.h> #include <assert.h> #include <bootstate.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> diff --git a/src/soc/intel/common/block/ebda/ebda.c b/src/soc/intel/common/block/ebda/ebda.c index 41c77a8..bc09c75 100644 --- a/src/soc/intel/common/block/ebda/ebda.c +++ b/src/soc/intel/common/block/ebda/ebda.c @@ -14,7 +14,7 @@ */ #include <arch/ebda.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <intelblocks/ebda.h> #include <string.h> diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index 74a5cae..044cf6f 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <assert.h> #include <console/console.h> #include <device/pci.h> diff --git a/src/soc/intel/common/block/gspi/gspi.c b/src/soc/intel/common/block/gspi/gspi.c index fc7dd46..933c19d 100644 --- a/src/soc/intel/common/block/gspi/gspi.c +++ b/src/soc/intel/common/block/gspi/gspi.c @@ -17,7 +17,7 @@ #include <arch/early_variables.h> #include <arch/io.h> #include <assert.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <delay.h> #include <device/device.h> diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index ef8417a..91f038d 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index c8e8026..489da9f 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -15,7 +15,7 @@ #include <arch/acpi.h> #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/smm.h> #include <device/pci.h> diff --git a/src/soc/intel/common/block/pmc/pmclib.c b/src/soc/intel/common/block/pmc/pmclib.c index 52bfaec..15d58da 100644 --- a/src/soc/intel/common/block/pmc/pmclib.c +++ b/src/soc/intel/common/block/pmc/pmclib.c @@ -16,7 +16,7 @@ #include <arch/early_variables.h> #include <arch/io.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <halt.h> #include <intelblocks/pmclib.h> diff --git a/src/soc/intel/common/block/rtc/rtc.c b/src/soc/intel/common/block/rtc/rtc.c index bfa11bd..540c755 100644 --- a/src/soc/intel/common/block/rtc/rtc.c +++ b/src/soc/intel/common/block/rtc/rtc.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <intelblocks/pcr.h> #include <intelblocks/rtc.h> #include <soc/pcr_ids.h> diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index e4c13dd..6325954 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -16,7 +16,7 @@ #include <arch/hlt.h> #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <cpu/x86/smm.h> diff --git a/src/soc/intel/common/block/sram/sram.c b/src/soc/intel/common/block/sram/sram.c index 9028952..53a2561 100644 --- a/src/soc/intel/common/block/sram/sram.c +++ b/src/soc/intel/common/block/sram/sram.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 45ee940..6afe32a 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -15,7 +15,7 @@ #include <arch/io.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index 12b99e7..037d68d 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -15,7 +15,7 @@ #include <arch/acpi.h> #include <assert.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cbmem.h> #include <console/uart.h> #include <device/device.h> diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c index eb330ee..c421940 100644 --- a/src/soc/intel/common/block/xdci/xdci.c +++ b/src/soc/intel/common/block/xdci/xdci.c @@ -15,7 +15,7 @@ */ #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index c38d19f..3434812 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c index 541a7b4..a4e0c32 100644 --- a/src/soc/intel/common/mma.c +++ b/src/soc/intel/common/mma.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <bootstate.h> #include <cbfs.h> #include <cbmem.h> diff --git a/src/soc/intel/common/vbt.c b/src/soc/intel/common/vbt.c index ab52dc8..469bcd8 100644 --- a/src/soc/intel/common/vbt.c +++ b/src/soc/intel/common/vbt.c @@ -14,7 +14,7 @@ */ #include <cbfs.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <arch/acpi.h> #include <bootmode.h> diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 6a947ff..3d13aa1 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -19,7 +19,7 @@ #include <arch/acpi.h> #include <arch/acpigen.h> #include <arch/smp/mpspec.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/smm.h> #include <string.h> #include <device/pci.h> diff --git a/src/soc/intel/denverton_ns/fiamux.c b/src/soc/intel/denverton_ns/fiamux.c index 418ccfa..b6a90e8 100644 --- a/src/soc/intel/denverton_ns/fiamux.c +++ b/src/soc/intel/denverton_ns/fiamux.c @@ -15,7 +15,7 @@ * */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <soc/fiamux.h> diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c index 3da349a..bc84d57 100644 --- a/src/soc/intel/denverton_ns/romstage.c +++ b/src/soc/intel/denverton_ns/romstage.c @@ -15,7 +15,7 @@ */ #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/mtrr.h> #include <reset.h> diff --git a/src/soc/intel/fsp_baytrail/gpio.c b/src/soc/intel/fsp_baytrail/gpio.c index 72cf158..fbe6f73 100644 --- a/src/soc/intel/fsp_baytrail/gpio.c +++ b/src/soc/intel/fsp_baytrail/gpio.c @@ -14,7 +14,7 @@ */ #include <device/pci.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <soc/gpio.h> #include <soc/pmc.h> diff --git a/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h b/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h index 8eff8cd..909d559 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h +++ b/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h @@ -17,7 +17,7 @@ #define _BAYTRAIL_DEVICE_NVS_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define LPSS_NVS_SIO_DMA1 0 #define LPSS_NVS_I2C1 1 diff --git a/src/soc/intel/fsp_baytrail/include/soc/gpio.h b/src/soc/intel/fsp_baytrail/include/soc/gpio.h index 7677554..e1a1787 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/gpio.h +++ b/src/soc/intel/fsp_baytrail/include/soc/gpio.h @@ -17,7 +17,7 @@ #define _BAYTRAIL_GPIO_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> #include <soc/iomap.h> diff --git a/src/soc/intel/fsp_baytrail/include/soc/nvs.h b/src/soc/intel/fsp_baytrail/include/soc/nvs.h index f0bf888..215029a 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/nvs.h +++ b/src/soc/intel/fsp_baytrail/include/soc/nvs.h @@ -17,7 +17,7 @@ #ifndef _BAYTRAIL_NVS_H_ #define _BAYTRAIL_NVS_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/device_nvs.h> typedef struct { diff --git a/src/soc/intel/fsp_baytrail/include/soc/pmc.h b/src/soc/intel/fsp_baytrail/include/soc/pmc.h index 9bafdc2..9fc5c96 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/pmc.h +++ b/src/soc/intel/fsp_baytrail/include/soc/pmc.h @@ -17,7 +17,7 @@ #ifndef _BAYTRAIL_PMC_H_ #define _BAYTRAIL_PMC_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/acpi.h> #define IOCOM1 0x3f8 diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c index d8b1d55..51e743e 100644 --- a/src/soc/intel/fsp_baytrail/spi.c +++ b/src/soc/intel/fsp_baytrail/spi.c @@ -16,7 +16,7 @@ /* This file is derived from the flashrom project. */ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdlib.h> #include <string.h> #include <commonlib/helpers.h> diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h b/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h index 07deeb0..03da936 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/gpio.h @@ -16,7 +16,7 @@ #define FSP_BROADWELL_DE_GPIO_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* Chipset owned GPIO configuration registers */ #define GPIO_1_USE_SEL 0x00 diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/smm.h b/src/soc/intel/fsp_broadwell_de/include/soc/smm.h index 2a737ac..2300d3f 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/smm.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/smm.h @@ -18,7 +18,7 @@ #define _BROADWELL_SMM_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/msr.h> struct ied_header { diff --git a/src/soc/intel/fsp_broadwell_de/spi.c b/src/soc/intel/fsp_broadwell_de/spi.c index 1b1589d..a4f0d8e 100644 --- a/src/soc/intel/fsp_broadwell_de/spi.c +++ b/src/soc/intel/fsp_broadwell_de/spi.c @@ -16,7 +16,7 @@ /* This file is derived from the flashrom project. */ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdlib.h> #include <string.h> #include <delay.h> diff --git a/src/soc/intel/quark/gpio_i2c.c b/src/soc/intel/quark/gpio_i2c.c index 100257b..f280b3b 100644 --- a/src/soc/intel/quark/gpio_i2c.c +++ b/src/soc/intel/quark/gpio_i2c.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <delay.h> #include <device/device.h> diff --git a/src/soc/intel/quark/include/soc/pei_wrapper.h b/src/soc/intel/quark/include/soc/pei_wrapper.h index 9e63a72..63a57ae 100644 --- a/src/soc/intel/quark/include/soc/pei_wrapper.h +++ b/src/soc/intel/quark/include/soc/pei_wrapper.h @@ -31,7 +31,7 @@ #define _PEI_WRAPPER_H_ #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define PEI_VERSION 22 diff --git a/src/soc/intel/quark/include/soc/pm.h b/src/soc/intel/quark/include/soc/pm.h index ae19cc6..b002644 100644 --- a/src/soc/intel/quark/include/soc/pm.h +++ b/src/soc/intel/quark/include/soc/pm.h @@ -18,7 +18,7 @@ #define _SOC_PM_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/acpi.h> struct chipset_power_state { diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index d2ec7e7..ab3d898 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -23,7 +23,7 @@ #include <arch/smp/mpspec.h> #include <cbmem.h> #include <chip.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/cpu.h> #include <cpu/x86/smm.h> diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c index c2c0745..a403c96 100644 --- a/src/soc/intel/skylake/chip_fsp20.c +++ b/src/soc/intel/skylake/chip_fsp20.c @@ -21,7 +21,7 @@ #include <arch/acpi.h> #include <arch/io.h> #include <chip.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <bootstate.h> #include <console/console.h> #include <device/device.h> diff --git a/src/soc/intel/skylake/include/soc/device_nvs.h b/src/soc/intel/skylake/include/soc/device_nvs.h index 2b7d126..fc7ef27 100644 --- a/src/soc/intel/skylake/include/soc/device_nvs.h +++ b/src/soc/intel/skylake/include/soc/device_nvs.h @@ -18,7 +18,7 @@ #define _SOC_DEVICE_NVS_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define SIO_NVS_I2C0 0 #define SIO_NVS_I2C1 1 diff --git a/src/soc/intel/skylake/include/soc/me.h b/src/soc/intel/skylake/include/soc/me.h index 590bfb7..c90d3c2 100644 --- a/src/soc/intel/skylake/include/soc/me.h +++ b/src/soc/intel/skylake/include/soc/me.h @@ -18,7 +18,7 @@ #ifndef _SKYLAKE_ME_H_ #define _SKYLAKE_ME_H_ -#include <compiler.h> +#include <commonlib/compiler.h> /* * Management Engine PCI registers diff --git a/src/soc/intel/skylake/include/soc/nvs.h b/src/soc/intel/skylake/include/soc/nvs.h index 53fdded..5d1655d 100644 --- a/src/soc/intel/skylake/include/soc/nvs.h +++ b/src/soc/intel/skylake/include/soc/nvs.h @@ -19,7 +19,7 @@ #define _SOC_NVS_H_ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <rules.h> #include <vendorcode/google/chromeos/gnvs.h> diff --git a/src/soc/intel/skylake/include/soc/pei_data.h b/src/soc/intel/skylake/include/soc/pei_data.h index 5848583..96ca77b 100644 --- a/src/soc/intel/skylake/include/soc/pei_data.h +++ b/src/soc/intel/skylake/include/soc/pei_data.h @@ -31,7 +31,7 @@ #define _PEI_DATA_H_ #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> #define PEI_VERSION 22 diff --git a/src/soc/intel/skylake/include/soc/pm.h b/src/soc/intel/skylake/include/soc/pm.h index b7d6446..f5c30f2 100644 --- a/src/soc/intel/skylake/include/soc/pm.h +++ b/src/soc/intel/skylake/include/soc/pm.h @@ -17,7 +17,7 @@ #ifndef _SOC_PM_H_ #define _SOC_PM_H_ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/acpi.h> #include <arch/io.h> #include <soc/gpe.h> diff --git a/src/soc/intel/skylake/include/soc/smm.h b/src/soc/intel/skylake/include/soc/smm.h index 0f857e0..0656e93 100644 --- a/src/soc/intel/skylake/include/soc/smm.h +++ b/src/soc/intel/skylake/include/soc/smm.h @@ -18,7 +18,7 @@ #define _SOC_SMM_H_ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/msr.h> #include <fsp/memmap.h> #include <intelblocks/smihandler.h> diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c index 5a4fe6b..eddc6c1 100644 --- a/src/soc/intel/skylake/me.c +++ b/src/soc/intel/skylake/me.c @@ -16,7 +16,7 @@ #include <arch/io.h> #include <bootstate.h> #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/pci.h> #include <device/pci_ids.h> diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 45fb2d0..f4c2608 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -18,7 +18,7 @@ #include <arch/io.h> #include <arch/symbols.h> #include <assert.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> #include <cbmem.h> diff --git a/src/soc/mediatek/common/mmu_operations.c b/src/soc/mediatek/common/mmu_operations.c index 27a03e3..fb6e28c 100644 --- a/src/soc/mediatek/common/mmu_operations.c +++ b/src/soc/mediatek/common/mmu_operations.c @@ -14,7 +14,7 @@ */ #include <arch/mmu.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <symbols.h> #include <soc/emi.h> #include <soc/mmu_operations.h> diff --git a/src/soc/mediatek/common/timer.c b/src/soc/mediatek/common/timer.c index 6e4315c..a2f9c5a 100644 --- a/src/soc/mediatek/common/timer.c +++ b/src/soc/mediatek/common/timer.c @@ -14,7 +14,7 @@ */ #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <timer.h> #include <delay.h> diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c index cfc469b..0c1097f 100644 --- a/src/soc/mediatek/common/uart.c +++ b/src/soc/mediatek/common/uart.c @@ -19,7 +19,7 @@ #include <console/uart.h> #include <drivers/uart/uart8250reg.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/addressmap.h> diff --git a/src/soc/nvidia/tegra124/include/soc/clk_rst.h b/src/soc/nvidia/tegra124/include/soc/clk_rst.h index 7cac4ba..1c08b83 100644 --- a/src/soc/nvidia/tegra124/include/soc/clk_rst.h +++ b/src/soc/nvidia/tegra124/include/soc/clk_rst.h @@ -16,7 +16,7 @@ #ifndef _TEGRA124_CLK_RST_H_ #define _TEGRA124_CLK_RST_H_ -#include <compiler.h> +#include <commonlib/compiler.h> /* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */ struct __packed clk_rst_ctlr { diff --git a/src/soc/nvidia/tegra124/include/soc/dma.h b/src/soc/nvidia/tegra124/include/soc/dma.h index 4cb1dea..e7ba439 100644 --- a/src/soc/nvidia/tegra124/include/soc/dma.h +++ b/src/soc/nvidia/tegra124/include/soc/dma.h @@ -19,7 +19,7 @@ #define __NVIDIA_TEGRA124_DMA_H__ #include <inttypes.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/addressmap.h> /* diff --git a/src/soc/nvidia/tegra124/include/soc/emc.h b/src/soc/nvidia/tegra124/include/soc/emc.h index 1311f9e..b1f0352 100644 --- a/src/soc/nvidia/tegra124/include/soc/emc.h +++ b/src/soc/nvidia/tegra124/include/soc/emc.h @@ -19,7 +19,7 @@ #include <stddef.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> enum { EMC_PIN_RESET_MASK = 1 << 8, diff --git a/src/soc/nvidia/tegra124/include/soc/spi.h b/src/soc/nvidia/tegra124/include/soc/spi.h index 80ced37..c0b7ac6 100644 --- a/src/soc/nvidia/tegra124/include/soc/spi.h +++ b/src/soc/nvidia/tegra124/include/soc/spi.h @@ -19,7 +19,7 @@ #include <spi-generic.h> #include <soc/dma.h> #include <stddef.h> -#include <compiler.h> +#include <commonlib/compiler.h> struct tegra_spi_regs { u32 command1; /* 0x000: SPI_COMMAND1 */ diff --git a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c index a8b2e69..6e7775b 100644 --- a/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c +++ b/src/soc/nvidia/tegra124/lp0/tegra_lp0_resume.c @@ -15,7 +15,7 @@ */ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* Function unit addresses. */ enum { diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c index 5cb8112..72b4dde 100644 --- a/src/soc/nvidia/tegra124/uart.c +++ b/src/soc/nvidia/tegra124/uart.c @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> #include <boot/coreboot_tables.h> #include <console/console.h> /* for __console definition */ diff --git a/src/soc/nvidia/tegra210/bootblock.c b/src/soc/nvidia/tegra210/bootblock.c index 4d1ddf5..f8a6e11 100644 --- a/src/soc/nvidia/tegra210/bootblock.c +++ b/src/soc/nvidia/tegra210/bootblock.c @@ -17,7 +17,7 @@ #include <arch/hlt.h> #include <arch/stages.h> #include <bootblock_common.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <delay.h> #include <program_loading.h> diff --git a/src/soc/nvidia/tegra210/funitcfg.c b/src/soc/nvidia/tegra210/funitcfg.c index e8d0c97..25460b1 100644 --- a/src/soc/nvidia/tegra210/funitcfg.c +++ b/src/soc/nvidia/tegra210/funitcfg.c @@ -14,7 +14,7 @@ */ #include <arch/io.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <soc/funitcfg.h> diff --git a/src/soc/nvidia/tegra210/include/soc/clk_rst.h b/src/soc/nvidia/tegra210/include/soc/clk_rst.h index 652bcaa..a0d9c5e 100644 --- a/src/soc/nvidia/tegra210/include/soc/clk_rst.h +++ b/src/soc/nvidia/tegra210/include/soc/clk_rst.h @@ -17,7 +17,7 @@ #define _TEGRA210_CLK_RST_H_ #include <stdint.h> #include <stddef.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* Clock/Reset Controller (CLK_RST_CONTROLLER_) regs */ struct __packed clk_rst_ctlr { diff --git a/src/soc/nvidia/tegra210/include/soc/clst_clk.h b/src/soc/nvidia/tegra210/include/soc/clst_clk.h index 0b9b18d..59e017b 100644 --- a/src/soc/nvidia/tegra210/include/soc/clst_clk.h +++ b/src/soc/nvidia/tegra210/include/soc/clst_clk.h @@ -16,7 +16,7 @@ #ifndef _TEGRA210_CLST_CLK_H_ #define _TEGRA210_CLST_CLK_H_ -#include <compiler.h> +#include <commonlib/compiler.h> /* Cluster Clock (CLUSTER_CLOCKS_PUBLIC_) regs */ struct __packed clst_clk_ctlr { diff --git a/src/soc/nvidia/tegra210/include/soc/dma.h b/src/soc/nvidia/tegra210/include/soc/dma.h index f8bd92b..787d92c 100644 --- a/src/soc/nvidia/tegra210/include/soc/dma.h +++ b/src/soc/nvidia/tegra210/include/soc/dma.h @@ -18,7 +18,7 @@ #define __NVIDIA_TEGRA210_DMA_H__ #include <inttypes.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/addressmap.h> /* diff --git a/src/soc/nvidia/tegra210/include/soc/emc.h b/src/soc/nvidia/tegra210/include/soc/emc.h index 8ba23a0..0d8ba8c 100644 --- a/src/soc/nvidia/tegra210/include/soc/emc.h +++ b/src/soc/nvidia/tegra210/include/soc/emc.h @@ -19,7 +19,7 @@ #include <stddef.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> enum { EMC_PIN_RESET_MASK = 1 << 8, diff --git a/src/soc/nvidia/tegra210/include/soc/spi.h b/src/soc/nvidia/tegra210/include/soc/spi.h index 7508792..ed93684 100644 --- a/src/soc/nvidia/tegra210/include/soc/spi.h +++ b/src/soc/nvidia/tegra210/include/soc/spi.h @@ -17,7 +17,7 @@ #ifndef __NVIDIA_TEGRA210_SPI_H__ #define __NVIDIA_TEGRA210_SPI_H__ -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/dma.h> #include <spi-generic.h> #include <stddef.h> diff --git a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c index 108b3b0..d771a77 100644 --- a/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c +++ b/src/soc/nvidia/tegra210/lp0/tegra_lp0_resume.c @@ -15,7 +15,7 @@ */ #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* Function unit addresses. */ enum { diff --git a/src/soc/nvidia/tegra210/romstage.c b/src/soc/nvidia/tegra210/romstage.c index 8958a6b..5382d5e 100644 --- a/src/soc/nvidia/tegra210/romstage.c +++ b/src/soc/nvidia/tegra210/romstage.c @@ -17,7 +17,7 @@ #include <arch/stages.h> #include <cbfs.h> #include <cbmem.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/cbmem_console.h> #include <console/console.h> #include <lib.h> diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c index 97dc740..cadc1fd 100644 --- a/src/soc/nvidia/tegra210/uart.c +++ b/src/soc/nvidia/tegra210/uart.c @@ -19,7 +19,7 @@ #include <console/uart.h> #include <drivers/uart/uart8250reg.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> struct tegra210_uart { union { diff --git a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h index dbff384..375a0e6 100644 --- a/src/soc/qualcomm/ipq40xx/include/soc/cdp.h +++ b/src/soc/qualcomm/ipq40xx/include/soc/cdp.h @@ -32,7 +32,7 @@ #define _IPQ40XX_CDP_H_ #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> unsigned smem_get_board_machtype(void); diff --git a/src/soc/qualcomm/ipq40xx/lcc.c b/src/soc/qualcomm/ipq40xx/lcc.c index 5d3738c..9c7e76d 100644 --- a/src/soc/qualcomm/ipq40xx/lcc.c +++ b/src/soc/qualcomm/ipq40xx/lcc.c @@ -29,7 +29,7 @@ #include <stdlib.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <delay.h> #include <console/console.h> #include <soc/clock.h> diff --git a/src/soc/qualcomm/ipq806x/include/soc/cdp.h b/src/soc/qualcomm/ipq806x/include/soc/cdp.h index f6afb31..d64228c 100644 --- a/src/soc/qualcomm/ipq806x/include/soc/cdp.h +++ b/src/soc/qualcomm/ipq806x/include/soc/cdp.h @@ -17,7 +17,7 @@ #define _IPQ806X_CDP_H_ #include <types.h> -#include <compiler.h> +#include <commonlib/compiler.h> unsigned smem_get_board_machtype(void); diff --git a/src/soc/qualcomm/ipq806x/lcc.c b/src/soc/qualcomm/ipq806x/lcc.c index 99994e9..04a284b 100644 --- a/src/soc/qualcomm/ipq806x/lcc.c +++ b/src/soc/qualcomm/ipq806x/lcc.c @@ -29,7 +29,7 @@ #include <stdlib.h> #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <delay.h> #include <console/console.h> #include <soc/clock.h> diff --git a/src/soc/samsung/exynos5250/i2c.c b/src/soc/samsung/exynos5250/i2c.c index 19ef6678..22a22d9 100644 --- a/src/soc/samsung/exynos5250/i2c.c +++ b/src/soc/samsung/exynos5250/i2c.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> #include <assert.h> #include <console/console.h> diff --git a/src/soc/samsung/exynos5250/include/soc/power.h b/src/soc/samsung/exynos5250/include/soc/power.h index b5a4c33..ab0ffb9 100644 --- a/src/soc/samsung/exynos5250/include/soc/power.h +++ b/src/soc/samsung/exynos5250/include/soc/power.h @@ -18,7 +18,7 @@ #ifndef CPU_SAMSUNG_EXYNOS5250_POWER_H #define CPU_SAMSUNG_EXYNOS5250_POWER_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/cpu.h> /* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */ diff --git a/src/soc/samsung/exynos5420/i2c.c b/src/soc/samsung/exynos5420/i2c.c index dd5ffd2..2565118 100644 --- a/src/soc/samsung/exynos5420/i2c.c +++ b/src/soc/samsung/exynos5420/i2c.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <arch/io.h> #include <assert.h> #include <console/console.h> diff --git a/src/soc/samsung/exynos5420/include/soc/dmc.h b/src/soc/samsung/exynos5420/include/soc/dmc.h index b19b660..70e9f8c 100644 --- a/src/soc/samsung/exynos5420/include/soc/dmc.h +++ b/src/soc/samsung/exynos5420/include/soc/dmc.h @@ -14,7 +14,7 @@ #ifndef CPU_SAMSUNG_EXYNOS5420_DMC_H #define CPU_SAMSUNG_EXYNOS5420_DMC_H -#include <compiler.h> +#include <commonlib/compiler.h> #define DMC_INTERLEAVE_SIZE 0x1f diff --git a/src/soc/samsung/exynos5420/include/soc/power.h b/src/soc/samsung/exynos5420/include/soc/power.h index c5709a5..6a6a24e 100644 --- a/src/soc/samsung/exynos5420/include/soc/power.h +++ b/src/soc/samsung/exynos5420/include/soc/power.h @@ -18,7 +18,7 @@ #ifndef CPU_SAMSUNG_EXYNOS5420_POWER_H #define CPU_SAMSUNG_EXYNOS5420_POWER_H -#include <compiler.h> +#include <commonlib/compiler.h> #include <soc/cpu.h> /* Enable HW thermal trip with PS_HOLD_CONTROL register ENABLE_HW_TRIP bit */ diff --git a/src/southbridge/amd/sb700/sata.c b/src/southbridge/amd/sb700/sata.c index 6caffee..9606355 100644 --- a/src/southbridge/amd/sb700/sata.c +++ b/src/southbridge/amd/sb700/sata.c @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <device/device.h> #include <delay.h> diff --git a/src/southbridge/intel/bd82x6x/me.h b/src/southbridge/intel/bd82x6x/me.h index b0f2a6e..f5d76e3 100644 --- a/src/southbridge/intel/bd82x6x/me.h +++ b/src/southbridge/intel/bd82x6x/me.h @@ -17,7 +17,7 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include <compiler.h> +#include <commonlib/compiler.h> #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/bd82x6x/nvs.h b/src/southbridge/intel/bd82x6x/nvs.h index 537139d..e1cd2ed 100644 --- a/src/southbridge/intel/bd82x6x/nvs.h +++ b/src/southbridge/intel/bd82x6x/nvs.h @@ -15,7 +15,7 @@ */ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> #include "vendorcode/google/chromeos/gnvs.h" diff --git a/src/southbridge/intel/common/gpio.h b/src/southbridge/intel/common/gpio.h index 97b7783..e1d3726 100644 --- a/src/southbridge/intel/common/gpio.h +++ b/src/southbridge/intel/common/gpio.h @@ -17,7 +17,7 @@ #define INTEL_COMMON_GPIO_H #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> /* ICH7 GPIOBASE */ #define GPIO_USE_SEL 0x00 diff --git a/src/southbridge/intel/common/smihandler.c b/src/southbridge/intel/common/smihandler.c index 0fd8ab0..bee4ff0 100644 --- a/src/southbridge/intel/common/smihandler.c +++ b/src/southbridge/intel/common/smihandler.c @@ -17,7 +17,7 @@ #include <types.h> #include <arch/io.h> #include <arch/acpi.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <console/console.h> #include <cpu/x86/cache.h> #include <device/pci_def.h> diff --git a/src/southbridge/intel/common/spi.c b/src/southbridge/intel/common/spi.c index 180a629..ee6a17d 100644 --- a/src/southbridge/intel/common/spi.c +++ b/src/southbridge/intel/common/spi.c @@ -19,7 +19,7 @@ #include <stdint.h> #include <stdlib.h> #include <string.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <bootstate.h> #include <commonlib/helpers.h> #include <delay.h> diff --git a/src/southbridge/intel/fsp_bd82x6x/gpio.h b/src/southbridge/intel/fsp_bd82x6x/gpio.h index 3279be8..73c3dec 100644 --- a/src/southbridge/intel/fsp_bd82x6x/gpio.h +++ b/src/southbridge/intel/fsp_bd82x6x/gpio.h @@ -17,7 +17,7 @@ #ifndef INTEL_BD82X6X_GPIO_H #define INTEL_BD82X6X_GPIO_H -#include <compiler.h> +#include <commonlib/compiler.h> #define GPIO_MODE_NATIVE 0 #define GPIO_MODE_GPIO 1 diff --git a/src/southbridge/intel/fsp_bd82x6x/me.h b/src/southbridge/intel/fsp_bd82x6x/me.h index b0f2a6e..f5d76e3 100644 --- a/src/southbridge/intel/fsp_bd82x6x/me.h +++ b/src/southbridge/intel/fsp_bd82x6x/me.h @@ -17,7 +17,7 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include <compiler.h> +#include <commonlib/compiler.h> #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/fsp_bd82x6x/nvs.h b/src/southbridge/intel/fsp_bd82x6x/nvs.h index c8af5b9..f5aa6e3 100644 --- a/src/southbridge/intel/fsp_bd82x6x/nvs.h +++ b/src/southbridge/intel/fsp_bd82x6x/nvs.h @@ -15,7 +15,7 @@ */ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include "vendorcode/google/chromeos/gnvs.h" typedef struct global_nvs_t { diff --git a/src/southbridge/intel/fsp_i89xx/gpio.h b/src/southbridge/intel/fsp_i89xx/gpio.h index b89ab3e..5d25795 100644 --- a/src/southbridge/intel/fsp_i89xx/gpio.h +++ b/src/southbridge/intel/fsp_i89xx/gpio.h @@ -17,7 +17,7 @@ #ifndef INTEL_I89XX_GPIO_H #define INTEL_I89XX_GPIO_H -#include <compiler.h> +#include <commonlib/compiler.h> #define GPIO_MODE_NATIVE 0 #define GPIO_MODE_GPIO 1 diff --git a/src/southbridge/intel/fsp_i89xx/me.h b/src/southbridge/intel/fsp_i89xx/me.h index b0f2a6e..f5d76e3 100644 --- a/src/southbridge/intel/fsp_i89xx/me.h +++ b/src/southbridge/intel/fsp_i89xx/me.h @@ -17,7 +17,7 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include <compiler.h> +#include <commonlib/compiler.h> #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/fsp_i89xx/nvs.h b/src/southbridge/intel/fsp_i89xx/nvs.h index c8af5b9..f5aa6e3 100644 --- a/src/southbridge/intel/fsp_i89xx/nvs.h +++ b/src/southbridge/intel/fsp_i89xx/nvs.h @@ -15,7 +15,7 @@ */ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include "vendorcode/google/chromeos/gnvs.h" typedef struct global_nvs_t { diff --git a/src/southbridge/intel/fsp_rangeley/gpio.h b/src/southbridge/intel/fsp_rangeley/gpio.h index d8fbcb9..3f53bee 100644 --- a/src/southbridge/intel/fsp_rangeley/gpio.h +++ b/src/southbridge/intel/fsp_rangeley/gpio.h @@ -17,7 +17,7 @@ #ifndef INTEL_RANGELEY_GPIO_H #define INTEL_RANGELEY_GPIO_H -#include <compiler.h> +#include <commonlib/compiler.h> #define GPIO_MODE_NATIVE 0 #define GPIO_MODE_GPIO 1 diff --git a/src/southbridge/intel/fsp_rangeley/nvs.h b/src/southbridge/intel/fsp_rangeley/nvs.h index fd33290..a88307f 100644 --- a/src/southbridge/intel/fsp_rangeley/nvs.h +++ b/src/southbridge/intel/fsp_rangeley/nvs.h @@ -14,7 +14,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> typedef struct { /* Miscellaneous */ diff --git a/src/southbridge/intel/fsp_rangeley/spi.c b/src/southbridge/intel/fsp_rangeley/spi.c index 0512bcf..6b1a976 100644 --- a/src/southbridge/intel/fsp_rangeley/spi.c +++ b/src/southbridge/intel/fsp_rangeley/spi.c @@ -17,7 +17,7 @@ #include <stdint.h> #include <stdlib.h> #include <string.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <commonlib/helpers.h> #include <delay.h> #include <arch/io.h> diff --git a/src/southbridge/intel/i82801dx/nvs.h b/src/southbridge/intel/i82801dx/nvs.h index bdc6b45..07d94ee 100644 --- a/src/southbridge/intel/i82801dx/nvs.h +++ b/src/southbridge/intel/i82801dx/nvs.h @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> typedef struct { /* Miscellaneous */ diff --git a/src/southbridge/intel/i82801gx/nvs.h b/src/southbridge/intel/i82801gx/nvs.h index 483eddb..ad3a14d 100644 --- a/src/southbridge/intel/i82801gx/nvs.h +++ b/src/southbridge/intel/i82801gx/nvs.h @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> typedef struct { /* Miscellaneous */ diff --git a/src/southbridge/intel/i82801ix/nvs.h b/src/southbridge/intel/i82801ix/nvs.h index 483eddb..ad3a14d 100644 --- a/src/southbridge/intel/i82801ix/nvs.h +++ b/src/southbridge/intel/i82801ix/nvs.h @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> typedef struct { /* Miscellaneous */ diff --git a/src/southbridge/intel/i82801jx/nvs.h b/src/southbridge/intel/i82801jx/nvs.h index 16c49bb..3040da7 100644 --- a/src/southbridge/intel/i82801jx/nvs.h +++ b/src/southbridge/intel/i82801jx/nvs.h @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#include <compiler.h> +#include <commonlib/compiler.h> typedef struct { /* Miscellaneous */ diff --git a/src/southbridge/intel/ibexpeak/me.h b/src/southbridge/intel/ibexpeak/me.h index 6423d8d..9febb72 100644 --- a/src/southbridge/intel/ibexpeak/me.h +++ b/src/southbridge/intel/ibexpeak/me.h @@ -17,7 +17,7 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include <compiler.h> +#include <commonlib/compiler.h> #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/ibexpeak/nvs.h b/src/southbridge/intel/ibexpeak/nvs.h index 7b9fd24..8a83eca 100644 --- a/src/southbridge/intel/ibexpeak/nvs.h +++ b/src/southbridge/intel/ibexpeak/nvs.h @@ -15,7 +15,7 @@ */ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include "vendorcode/google/chromeos/gnvs.h" typedef struct global_nvs_t { diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.h b/src/southbridge/intel/lynxpoint/lp_gpio.h index 6c21db2..f5412d2 100644 --- a/src/southbridge/intel/lynxpoint/lp_gpio.h +++ b/src/southbridge/intel/lynxpoint/lp_gpio.h @@ -16,7 +16,7 @@ #ifndef INTEL_LYNXPOINT_LP_GPIO_H #define INTEL_LYNXPOINT_LP_GPIO_H -#include <compiler.h> +#include <commonlib/compiler.h> /* LynxPoint LP GPIOBASE Registers */ #define GPIO_OWNER(set) (0x00 + ((set) * 4)) diff --git a/src/southbridge/intel/lynxpoint/me.h b/src/southbridge/intel/lynxpoint/me.h index cef2e55..2ac4228 100644 --- a/src/southbridge/intel/lynxpoint/me.h +++ b/src/southbridge/intel/lynxpoint/me.h @@ -17,7 +17,7 @@ #ifndef _INTEL_ME_H #define _INTEL_ME_H -#include <compiler.h> +#include <commonlib/compiler.h> #define ME_RETRY 100000 /* 1 second */ #define ME_DELAY 10 /* 10 us */ diff --git a/src/southbridge/intel/lynxpoint/nvs.h b/src/southbridge/intel/lynxpoint/nvs.h index fd0d8bc..46df0a4 100644 --- a/src/southbridge/intel/lynxpoint/nvs.h +++ b/src/southbridge/intel/lynxpoint/nvs.h @@ -15,7 +15,7 @@ */ #include <commonlib/helpers.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include "vendorcode/google/chromeos/gnvs.h" typedef struct global_nvs_t { diff --git a/src/southbridge/ricoh/rl5c476/rl5c476.h b/src/southbridge/ricoh/rl5c476/rl5c476.h index 0639fd1..2667be0 100644 --- a/src/southbridge/ricoh/rl5c476/rl5c476.h +++ b/src/southbridge/ricoh/rl5c476/rl5c476.h @@ -17,7 +17,7 @@ /* rl5c476 routines and defines*/ -#include <compiler.h> +#include <commonlib/compiler.h> #include <stdint.h> diff --git a/src/vendorcode/google/chromeos/gnvs.h b/src/vendorcode/google/chromeos/gnvs.h index 77c2f0a..540e772 100644 --- a/src/vendorcode/google/chromeos/gnvs.h +++ b/src/vendorcode/google/chromeos/gnvs.h @@ -16,7 +16,7 @@ #ifndef __VENDORCODE_GOOGLE_CHROMEOS_GNVS_H #define __VENDORCODE_GOOGLE_CHROMEOS_GNVS_H -#include <compiler.h> +#include <commonlib/compiler.h> #define BOOT_REASON_OTHER 0 #define BOOT_REASON_S3DIAG 9 diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index 8e4d8b6..950092f 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -131,7 +131,7 @@ $(objutil)/cbfstool/%.o: $(top)/util/cbfstool/lz4/lib/%.c printf " HOSTCC $(subst $(objutil)/,,$(@))\n" - $(HOSTCC) $(TOOLCPPFLAGS) $(TOOLCFLAGS) $(HOSTCFLAGS) -include $(top)/util/cbfstool/compiler.h -c -o $@ $< + $(HOSTCC) $(TOOLCPPFLAGS) $(TOOLCFLAGS) $(HOSTCFLAGS) -c -o $@ $< $(objutil)/cbfstool/cbfstool: $(addprefix $(objutil)/cbfstool/,$(cbfsobj)) printf " HOSTCC $(subst $(objutil)/,,$(@)) (link)\n" diff --git a/util/cbfstool/cbfs.h b/util/cbfstool/cbfs.h index fd2457a..0031fb0 100644 --- a/util/cbfstool/cbfs.h +++ b/util/cbfstool/cbfs.h @@ -18,7 +18,7 @@ #include "common.h" #include <stdint.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <vb2_api.h> diff --git a/util/cbfstool/compiler.h b/util/cbfstool/compiler.h deleted file mode 100644 index cf043d5..0000000 --- a/util/cbfstool/compiler.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2017 Google Inc. - * Copyright (c) 2017-2018 Eltan B.V. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __COMPILER_H__ -#define __COMPILER_H__ - -#if !defined(__FreeBSD__) - -#if !defined(__packed) -#if defined(__WIN32) || defined(__WIN64) -#define __packed __attribute__((gcc_struct, packed)) -#else -#define __packed __attribute__((packed)) -#endif -#endif - -#if !defined(__aligned) -#define __aligned(x) __attribute__((aligned(x))) -#endif -#endif - -#define __always_unused __attribute__((unused)) -#define __must_check __attribute__((warn_unused_result)) - -#endif diff --git a/util/cbfstool/fit.c b/util/cbfstool/fit.c index ad9ab37..a33a15a 100644 --- a/util/cbfstool/fit.c +++ b/util/cbfstool/fit.c @@ -17,7 +17,7 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include "fit.h" diff --git a/util/cbfstool/flashmap/fmap.h b/util/cbfstool/flashmap/fmap.h index 017d332..2061392 100644 --- a/util/cbfstool/flashmap/fmap.h +++ b/util/cbfstool/flashmap/fmap.h @@ -37,7 +37,7 @@ #define FLASHMAP_LIB_FMAP_H__ #include <inttypes.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include <valstr.h> #define FMAP_SIGNATURE "__FMAP__" diff --git a/util/cbfstool/ifwitool.c b/util/cbfstool/ifwitool.c index c427339..dec5157 100644 --- a/util/cbfstool/ifwitool.c +++ b/util/cbfstool/ifwitool.c @@ -17,7 +17,7 @@ #include <getopt.h> #include <stdlib.h> #include <time.h> -#include <compiler.h> +#include <commonlib/compiler.h> #include "common.h" diff --git a/util/cbmem/compiler.h b/util/cbmem/compiler.h deleted file mode 100644 index fc6a36b..0000000 --- a/util/cbmem/compiler.h +++ /dev/null @@ -1,33 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2017 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#ifndef __COMPILER_H__ -#define __COMPILER_H__ - -#if !defined(__FreeBSD__) - -#if defined(__WIN32) || defined(__WIN64) -#define __packed __attribute__((gcc_struct, packed)) -#else -#define __packed __attribute__((packed)) -#endif - -#define __aligned(x) __attribute__((aligned(x))) -#endif - -#define __always_unused __attribute__((unused)) -#define __must_check __attribute__((warn_unused_result)) - -#endif -- To view, visit https://review.coreboot.org/28927 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Gerrit-Change-Number: 28927 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in coreboot[master]: mb/google/kahlee: Don't set stapm parameters
by Richard Spiegel (Code Review) 04 Oct '18

04 Oct '18

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/28925 ) Change subject: mb/google/kahlee: Don't set stapm parameters ...................................................................... Patch Set 1: Code-Review+2 (1 comment) https://review.coreboot.org/#/c/28925/1/src/mainboard/google/kahlee/variant… File src/mainboard/google/kahlee/variants/careena/devicetree.cb: https://review.coreboot.org/#/c/28925/1/src/mainboard/google/kahlee/variant… PS1, Line 25: # register "stapm_percent" = "68 >From the way code is set, just commenting 1 parameter would have the same effect. Commenting them all is clearer though. -- To view, visit https://review.coreboot.org/28925 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2299ab81fcc2af0529bfac3be562b05116c64a49 Gerrit-Change-Number: 28925 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 04 Oct 2018 20:57:59 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variant/nocturne: Disable WAKE# signal
by Furquan Shaikh (Code Review) 04 Oct '18

04 Oct '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/28926 ) Change subject: mb/google/poppy/variant/nocturne: Disable WAKE# signal ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1c25e4ba28cd2b8807cd155d47c29c0d3ee9e8a5 Gerrit-Change-Number: 28926 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 04 Oct 2018 20:56:33 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: mb/google/poppy/variant/nocturne: Disable WAKE# signal
by Nick Vaccaro (Code Review) 04 Oct '18

04 Oct '18

Nick Vaccaro has uploaded this change for review. ( https://review.coreboot.org/28926 Change subject: mb/google/poppy/variant/nocturne: Disable WAKE# signal ...................................................................... mb/google/poppy/variant/nocturne: Disable WAKE# signal The WAKE# signal has moved to LAN_WAKE, so WAKE# is now floating and must be disabled. This change disables WAKE#. BUG=b:117284700 TEST=none Change-Id: I1c25e4ba28cd2b8807cd155d47c29c0d3ee9e8a5 Signed-off-by: Nick Vaccaro <nvaccaro(a)google.com> --- M src/mainboard/google/poppy/variants/nocturne/devicetree.cb 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/28926/1 diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index df63a91..9c67795 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -5,7 +5,7 @@ register "deep_s3_enable_dc" = "0" register "deep_s5_enable_ac" = "1" register "deep_s5_enable_dc" = "1" - register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_EN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" + register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN | DSX_DIS_AC_PRESENT_PD" register "eist_enable" = "1" -- To view, visit https://review.coreboot.org/28926 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1c25e4ba28cd2b8807cd155d47c29c0d3ee9e8a5 Gerrit-Change-Number: 28926 Gerrit-PatchSet: 1 Gerrit-Owner: Nick Vaccaro <nvaccaro(a)google.com>

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coreboot-gerrit October 2018