Hello Angel Pons, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/28876
to look at the new patch set (#5).
Change subject: src/mb: Remove dead code
......................................................................
src/mb: Remove dead code
8 is highest level, so "CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8"
will never happen
Change-Id: I318de3e7c807bb5b5efdf61fef387d34225a8149
Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr>
---
M src/mainboard/apple/macbook21/romstage.c
M src/mainboard/asus/p5gc-mx/romstage.c
M src/mainboard/getac/p470/romstage.c
M src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c
M src/mainboard/ibase/mb899/romstage.c
M src/mainboard/intel/d945gclf/romstage.c
M src/mainboard/kontron/986lcd-m/romstage.c
M src/mainboard/lenovo/t60/romstage.c
M src/mainboard/lenovo/x60/romstage.c
M src/mainboard/lenovo/z61t/romstage.c
M src/mainboard/roda/rk886ex/romstage.c
M src/northbridge/intel/i945/debug.c
M src/northbridge/intel/i945/i945.h
13 files changed, 0 insertions(+), 69 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/28876/5
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Gerrit-Change-Id: I318de3e7c807bb5b5efdf61fef387d34225a8149
Gerrit-Change-Number: 28876
Gerrit-PatchSet: 5
Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
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Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/28876 )
Change subject: src/mb: Remove dead code
......................................................................
Patch Set 2:
> Ah, looks like my doubts were misplaced. It should have compiled.
> The
> errors in PS#3 were introduced by the patch...
>
> I wouldn't object if we drop the code but if, we should also drop
> the
> then obsolete implementation. I would ack it, if you think it's the
> right thing. But I can't ack it if you are just following my
> examples
> what could be done.
I think that we can drop it ...
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Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/28878 )
Change subject: src/nb/i945: Fix "CONFIG_DEFAULT_CONSOLE_LOGLEVEL > 8" if statement
......................................................................
Patch Set 3:
> >> Using #if is a bad habit. Also, what are the outer parentheses
> for?
> >
> > If I'm not wrong, '#if' is used in (romstage) to bypass the code
> if
> > the statement is not true.
>
> You can use it like that. But that's not specific to any stage. And
> it's a bad choice because the guarded code won't be compile tested.
>
> There is no other way to do this in romcc bootblock code, maybe
> that is what you had in mind?
I mean this code is for debugging purpose only and probably we don't need
it in side the ROM.
I'm wondering if it will compile and if 'sdram_dump_mchbar_registers'
makes sense before RAM init.
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Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/28906 )
Change subject: mb/google/kahlee: Set 100MHz fast spi read for supported boards
......................................................................
Patch Set 1: Code-Review+2
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Daniel Kurtz has posted comments on this change. ( https://review.coreboot.org/28906 )
Change subject: mb/google/kahlee: Set 100MHz fast spi read for supported boards
......................................................................
Patch Set 1:
(2 comments)
https://review.coreboot.org/#/c/28906/1/src/mainboard/google/kahlee/bootblo…
File src/mainboard/google/kahlee/bootblock/bootblock.c:
https://review.coreboot.org/#/c/28906/1/src/mainboard/google/kahlee/bootblo…
PS1, Line 36: on on
one too many 'on'
https://review.coreboot.org/#/c/28906/1/src/mainboard/google/kahlee/bootblo…
PS1, Line 37: set_100mhz_fast_read
perhaps "supports_100mhz_fast_spi_read()" ? To me set_ implies a function that will change something.
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/28879 )
Change subject: libpayload/apic: Only ACK interrupts triggered by the APIC
......................................................................
Patch Set 1: Code-Review+2
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/28904 )
Change subject: soc/amd/stoneyridge: Allow mainboard to update I2C at runtime
......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/#/c/28904/3/src/soc/amd/stoneyridge/i2c.c
File src/soc/amd/stoneyridge/i2c.c:
https://review.coreboot.org/#/c/28904/3/src/soc/amd/stoneyridge/i2c.c@59
PS3, Line 59: void __weak mb_update_i2c(unsigned int bus,
open brace '{' following function definitions go on the next line
https://review.coreboot.org/#/c/28904/3/src/soc/amd/stoneyridge/i2c.c@60
PS3, Line 60: const struct dw_i2c_bus_config **i2c_vals) {}
code indent should use tabs where possible
https://review.coreboot.org/#/c/28904/3/src/soc/amd/stoneyridge/i2c.c@60
PS3, Line 60: const struct dw_i2c_bus_config **i2c_vals) {}
please, no spaces at the start of a line
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