coreboot-gerrit August 2017

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Change in coreboot[master]: drvs/ec/lenovo/h8: Add ssdt generator
by build bot (Jenkins) (Code Review) 13 Aug '17

13 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20985 ) Change subject: drvs/ec/lenovo/h8: Add ssdt generator ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/58504/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/13905/ : SUCCESS -- To view, visit https://review.coreboot.org/20985 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ida825196650966194a883945896a038b0790fe45 Gerrit-Change-Number: 20985 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 13 Aug 2017 15:49:41 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: drvs/lenovo/wacom: Clean ACPI code
by build bot (Jenkins) (Code Review) 13 Aug '17

13 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20982 ) Change subject: drvs/lenovo/wacom: Clean ACPI code ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/58500/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/13901/ : SUCCESS -- To view, visit https://review.coreboot.org/20982 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I290fb918675857e8ef798e3ab820bcfbdc6f5bdc Gerrit-Change-Number: 20982 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 13 Aug 2017 15:44:05 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: ec/lenovo/h8/ssdt: Add WWAN ACPI methods
by Patrick Rudolph (Code Review) 13 Aug '17

13 Aug '17

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20986 Change subject: ec/lenovo/h8/ssdt: Add WWAN ACPI methods ...................................................................... ec/lenovo/h8/ssdt: Add WWAN ACPI methods Implement GWAN and SWAN for thinkpad_acpi kernel module. Change-Id: I5550c78e0d36884eca7a8d8ece19b64aaee44045 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/ec/lenovo/h8/ssdt.c 1 file changed, 67 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/20986/1 diff --git a/src/ec/lenovo/h8/ssdt.c b/src/ec/lenovo/h8/ssdt.c index eb9f2c1..cfc3304 100644 --- a/src/ec/lenovo/h8/ssdt.c +++ b/src/ec/lenovo/h8/ssdt.c @@ -102,6 +102,72 @@ acpigen_pop_len(); /* Method */ } +/* Generate ACPI methods GWAN and SWAN */ +static void h8_dsdt_wwan(struct device *dev) +{ + const bool has_wwan = h8_has_wwan(dev); + /* Method (GWAN, 0) */ + acpigen_write_method("GWAN", 0); + /* Store(Zero, Local0) */ + acpigen_write_store_ops(ZERO_OP, LOCAL0_OP); + if (has_wwan) { + /* WWAN present */ + /* Or(Local0, One, Local0) */ + acpigen_write_or(LOCAL0_OP, ONE_OP, LOCAL0_OP); + + /* If(LEqual(\_SB.PCI0.LPCB.EC.WWEB, One)) */ + acpigen_write_if(); + acpigen_emit_byte(LEQUAL_OP); + acpigen_emit_namestring(h8_dsdt_scope(dev, "WWEB")); + acpigen_emit_byte(ONE_OP); + + /* Or(Local0, 2, Local0) */ + acpigen_emit_byte(OR_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_write_integer(2); + acpigen_emit_byte(LOCAL0_OP); + acpigen_pop_len(); /* If */ + + /* State at resume: Enabled */ + /* Or(Local0, 4, Local0) */ + acpigen_emit_byte(OR_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_write_integer(4); + acpigen_emit_byte(LOCAL0_OP); + } + /* Return(Local0) */ + acpigen_emit_byte(RETURN_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_pop_len(); /* Method */ + + /* Method (SWAN, 0) */ + acpigen_write_method("SWAN", 1); + if (has_wwan) { + /* And(Arg0, 2, Local0) */ + acpigen_emit_byte(AND_OP); + acpigen_emit_byte(ARG0_OP); + acpigen_write_integer(2); + acpigen_emit_byte(LOCAL0_OP); + /* If(Lequal(Local0, 2)) */ + acpigen_write_if_lequal_op_int(LOCAL0_OP, 2); + /* Store(One, \_SB.PCI0.LPCB.EC.WWEB) */ + acpigen_write_store(); + acpigen_emit_byte(ONE_OP); + acpigen_emit_namestring(h8_dsdt_scope(dev, "WWEB")); + acpigen_pop_len(); /* If */ + /* Else */ + acpigen_write_else(); + /* Store(Zero, \_SB.PCI0.LPCB.EC.WWEB) */ + acpigen_write_store(); + acpigen_emit_byte(ZERO_OP); + acpigen_emit_namestring(h8_dsdt_scope(dev, "WWEB")); + acpigen_pop_len(); /* Else */ + + /* FIXME: Implement state at resume */ + } + acpigen_pop_len(); /* Method */ +} + /* * Generates EC SSDT. */ @@ -117,6 +183,7 @@ /* Used by thinkpad_acpi */ h8_dsdt_bluetooth(dev); + h8_dsdt_wwan(dev); acpigen_pop_len(); /* Scope HKEY */ } -- To view, visit https://review.coreboot.org/20986 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I5550c78e0d36884eca7a8d8ece19b64aaee44045 Gerrit-Change-Number: 20986 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: drvs/ec/lenovo/h8: Add ssdt generator
by Patrick Rudolph (Code Review) 13 Aug '17

13 Aug '17

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20985 Change subject: drvs/ec/lenovo/h8: Add ssdt generator ...................................................................... drvs/ec/lenovo/h8: Add ssdt generator Add SSDT generator to add dynamic ACPI code. Implement GBDC and SBDC for thinkpad_acpi kernel module. Tested on Lenovo T430: The bluetooth module is detected and can be powercycled using network manager. Change-Id: Ida825196650966194a883945896a038b0790fe45 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/ec/lenovo/h8/Makefile.inc M src/ec/lenovo/h8/h8.c M src/ec/lenovo/h8/h8.h A src/ec/lenovo/h8/ssdt.c 4 files changed, 136 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/20985/1 diff --git a/src/ec/lenovo/h8/Makefile.inc b/src/ec/lenovo/h8/Makefile.inc index a02543a..5c85e6f 100644 --- a/src/ec/lenovo/h8/Makefile.inc +++ b/src/ec/lenovo/h8/Makefile.inc @@ -3,6 +3,7 @@ ramstage-y += h8.c ramstage-y += bluetooth.c ramstage-y += wwan.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ssdt.c smm-y += smm.c endif diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c index 882ac02..8b8f49f 100644 --- a/src/ec/lenovo/h8/h8.c +++ b/src/ec/lenovo/h8/h8.c @@ -181,10 +181,21 @@ pc_keyboard_init(NO_AUX_DEVICE); } +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +static const char* h8_acpi_name(struct device *dev) +{ + return "EC"; +} +#endif + struct device_operations h8_dev_ops = { #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) .get_smbios_strings = h8_smbios_strings, #endif +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + .acpi_fill_ssdt_generator = h8_ssdt_generator, + .acpi_name = h8_acpi_name, +#endif .init = h8_init, }; diff --git a/src/ec/lenovo/h8/h8.h b/src/ec/lenovo/h8/h8.h index 4175463..951d22f 100644 --- a/src/ec/lenovo/h8/h8.h +++ b/src/ec/lenovo/h8/h8.h @@ -39,6 +39,8 @@ bool h8_wwan_nv_enable(void); bool h8_has_wwan(struct device *dev); +void h8_ssdt_generator(struct device *dev); + /* EC registers */ #define H8_CONFIG0 0x00 #define H8_CONFIG0_EVENTS_ENABLE 0x02 diff --git a/src/ec/lenovo/h8/ssdt.c b/src/ec/lenovo/h8/ssdt.c new file mode 100644 index 0000000..eb9f2c1 --- /dev/null +++ b/src/ec/lenovo/h8/ssdt.c @@ -0,0 +1,122 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Patrick Rudolph <siro(a)das-labor.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <southbridge/intel/common/gpio.h> +#include <console/console.h> +#include <device/device.h> +#include <ec/acpi/ec.h> +#include <arch/acpigen.h> +#include <option.h> +#include <string.h> + +#include "h8.h" +#include "chip.h" + +static char *h8_dsdt_scope(struct device *dev, const char *scope) +{ + static char buf[DEVICE_PATH_MAX] = {}; + const char *path = acpi_device_path(dev); + + memset(buf, 0, sizeof(buf)); + snprintf(buf, sizeof(buf) - 1, "%s.%s", path, scope); + + return buf; +} + +/* Generate ACPI methods GBDC and SBDC */ +static void h8_dsdt_bluetooth(struct device *dev) +{ + const bool has_bdc = h8_has_bdc(dev); + + /* Method (GBDC, 0) */ + acpigen_write_method("GBDC", 0); + /* Store(Zero, Local0) */ + acpigen_write_store_ops(ZERO_OP, LOCAL0_OP); + if (has_bdc) { + /* BDC present */ + /* Or(Local0, One, Local0) */ + acpigen_write_or(LOCAL0_OP, ONE_OP, LOCAL0_OP); + + /* If(LEqual(\_SB.PCI0.LPCB.EC.BTEB, One)) */ + acpigen_write_if(); + acpigen_emit_byte(LEQUAL_OP); + acpigen_emit_namestring(h8_dsdt_scope(dev, "BTEB")); + acpigen_emit_byte(ONE_OP); + + /* Or(Local0, 2, Local0) */ + acpigen_emit_byte(OR_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_write_integer(2); + acpigen_emit_byte(LOCAL0_OP); + acpigen_pop_len(); /* If */ + + /* State at resume: Enabled */ + /* Or(Local0, 4, Local0) */ + acpigen_emit_byte(OR_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_write_integer(4); + acpigen_emit_byte(LOCAL0_OP); + } + /* Return(Local0) */ + acpigen_emit_byte(RETURN_OP); + acpigen_emit_byte(LOCAL0_OP); + acpigen_pop_len(); /* Method */ + + /* Method (SBDC, 0) */ + acpigen_write_method("SBDC", 1); + if (has_bdc) { + /* And(Arg0, 2, Local0) */ + acpigen_emit_byte(AND_OP); + acpigen_emit_byte(ARG0_OP); + acpigen_write_integer(2); + acpigen_emit_byte(LOCAL0_OP); + /* If(Lequal(Local0, 2)) */ + acpigen_write_if_lequal_op_int(LOCAL0_OP, 2); + /* Store(One, \_SB.PCI0.LPCB.EC.BTEB) */ + acpigen_write_store(); + acpigen_emit_byte(ONE_OP); + acpigen_emit_namestring(h8_dsdt_scope(dev, "BTEB")); + acpigen_pop_len(); /* If */ + /* Else */ + acpigen_write_else(); + /* Store(Zero, \_SB.PCI0.LPCB.EC.BTEB) */ + acpigen_write_store(); + acpigen_emit_byte(ZERO_OP); + acpigen_emit_namestring(h8_dsdt_scope(dev, "BTEB")); + acpigen_pop_len(); /* Else */ + + /* FIXME: Implement state at resume */ + } + acpigen_pop_len(); /* Method */ +} + +/* + * Generates EC SSDT. + */ +void h8_ssdt_generator(struct device *dev) +{ + if (!acpi_device_path(dev)) + return; + + printk(BIOS_INFO, "ACPI: * H8\n"); + + /* Scope HKEY */ + acpigen_write_scope(h8_dsdt_scope(dev, "HKEY")); + + /* Used by thinkpad_acpi */ + h8_dsdt_bluetooth(dev); + + acpigen_pop_len(); /* Scope HKEY */ +} -- To view, visit https://review.coreboot.org/20985 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ida825196650966194a883945896a038b0790fe45 Gerrit-Change-Number: 20985 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: mb/lenovo/*/devicetree: Add support for WWAN detection
by Patrick Rudolph (Code Review) 13 Aug '17

13 Aug '17

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20984 Change subject: mb/lenovo/*/devicetree: Add support for WWAN detection ...................................................................... mb/lenovo/*/devicetree: Add support for WWAN detection Add support for WWAN detection on SNB/IVB boards. Change-Id: Ie96b2593971d49703eb747ab19f512be890d9c12 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/mainboard/lenovo/t420/devicetree.cb M src/mainboard/lenovo/t420s/devicetree.cb M src/mainboard/lenovo/t430/devicetree.cb M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/t520/devicetree.cb M src/mainboard/lenovo/t530/devicetree.cb M src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb M src/mainboard/lenovo/x220/devicetree.cb M src/mainboard/lenovo/x230/devicetree.cb 9 files changed, 36 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/20984/1 diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb index bed406a..5981100 100644 --- a/src/mainboard/lenovo/t420/devicetree.cb +++ b/src/mainboard/lenovo/t420/devicetree.cb @@ -162,6 +162,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end chip drivers/lenovo/hybrid_graphics device pnp ff.f on end # dummy diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb index a090308..7101e61 100644 --- a/src/mainboard/lenovo/t420s/devicetree.cb +++ b/src/mainboard/lenovo/t420s/devicetree.cb @@ -154,6 +154,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end chip drivers/lenovo/hybrid_graphics device pnp ff.f on end # dummy diff --git a/src/mainboard/lenovo/t430/devicetree.cb b/src/mainboard/lenovo/t430/devicetree.cb index aa2f4fe..62fdfd9 100644 --- a/src/mainboard/lenovo/t430/devicetree.cb +++ b/src/mainboard/lenovo/t430/devicetree.cb @@ -150,6 +150,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end chip drivers/lenovo/hybrid_graphics device pnp ff.f on end # dummy diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index b14d60c..b791f8d 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -158,6 +158,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end end # LPC Controller device pci 1f.2 on diff --git a/src/mainboard/lenovo/t520/devicetree.cb b/src/mainboard/lenovo/t520/devicetree.cb index f03b87e..7c9f16d 100644 --- a/src/mainboard/lenovo/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/devicetree.cb @@ -133,6 +133,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end chip drivers/lenovo/hybrid_graphics device pnp ff.f on end # dummy diff --git a/src/mainboard/lenovo/t530/devicetree.cb b/src/mainboard/lenovo/t530/devicetree.cb index a28c177..70e0a6e 100644 --- a/src/mainboard/lenovo/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/devicetree.cb @@ -140,6 +140,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end chip drivers/lenovo/hybrid_graphics device pnp ff.f on end # dummy diff --git a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb index cb2d8f3..98ec939 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb +++ b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb @@ -159,6 +159,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end end # LPC bridge device pci 1f.2 on diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index 1332cd8..a972375 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -168,6 +168,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end end # LPC bridge device pci 1f.2 on diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index d7f5647..814fd7c 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -170,6 +170,10 @@ register "has_bdc_detection" = "1" register "bdc_gpio_num" = "54" register "bdc_gpio_lvl" = "0" + + register "has_wwan_detection" = "1" + register "wwan_gpio_num" = "70" + register "wwan_gpio_lvl" = "0" end end # LPC bridge device pci 1f.2 on -- To view, visit https://review.coreboot.org/20984 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie96b2593971d49703eb747ab19f512be890d9c12 Gerrit-Change-Number: 20984 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: ec/lenovo/h8: Add WWAN detection support
by Patrick Rudolph (Code Review) 13 Aug '17

13 Aug '17

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20983 Change subject: ec/lenovo/h8: Add WWAN detection support ...................................................................... ec/lenovo/h8: Add WWAN detection support * Add support for detecting WWAN. * Allows to turn off power to WWAN if no card is installed. Add the following devicetree values: * has_wwan_detection Set to one to indicate that the following register are sane. * wwan_gpio_num SB GPIO num to read. * wwan_gpio_lvl SB GPIO level for card to be present (usually zero). Don't enable WWAN power if no card is detected. As there are no devicetree values yet, the new code doesn't have any effect. Change-Id: Ie53275b384c85df8adf71fe79b3d54211c868756 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/ec/lenovo/h8/Makefile.inc M src/ec/lenovo/h8/chip.h M src/ec/lenovo/h8/h8.c M src/ec/lenovo/h8/h8.h A src/ec/lenovo/h8/wwan.c 5 files changed, 77 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/20983/1 diff --git a/src/ec/lenovo/h8/Makefile.inc b/src/ec/lenovo/h8/Makefile.inc index e989dee..a02543a 100644 --- a/src/ec/lenovo/h8/Makefile.inc +++ b/src/ec/lenovo/h8/Makefile.inc @@ -2,6 +2,7 @@ ramstage-y += h8.c ramstage-y += bluetooth.c +ramstage-y += wwan.c smm-y += smm.c endif diff --git a/src/ec/lenovo/h8/chip.h b/src/ec/lenovo/h8/chip.h index d62312d..25512bc 100644 --- a/src/ec/lenovo/h8/chip.h +++ b/src/ec/lenovo/h8/chip.h @@ -47,9 +47,13 @@ u8 has_power_management_beeps; u8 has_uwb; u8 has_bdc_detection; + u8 has_wwan_detection; u8 bdc_gpio_num; u8 bdc_gpio_lvl; + + u8 wwan_gpio_num; + u8 wwan_gpio_lvl; }; #endif /* EC_LENOVO_H8EC_CHIP_H */ diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c index 6f14953..882ac02 100644 --- a/src/ec/lenovo/h8/h8.c +++ b/src/ec/lenovo/h8/h8.c @@ -44,15 +44,6 @@ ec_clr_bit(0x3a, 5); } -/* Controls radio-off pin in WWAN MiniPCIe slot. */ -static void h8_wwan_enable(int on) -{ - if (on) - ec_set_bit(0x3a, 6); - else - ec_clr_bit(0x3a, 6); -} - /* Controls radio-off pin in UWB MiniPCIe slot. */ static void h8_uwb_enable(int on) { @@ -283,9 +274,7 @@ val = h8_has_bdc(dev) && h8_bluetooth_nv_enable(); h8_bluetooth_enable(val); - if (get_option(&val, "wwan") != CB_SUCCESS) - val = 1; - + val = h8_has_wwan(dev) && h8_wwan_nv_enable(); h8_wwan_enable(val); if (conf->has_uwb) { diff --git a/src/ec/lenovo/h8/h8.h b/src/ec/lenovo/h8/h8.h index 8786fb3..4175463 100644 --- a/src/ec/lenovo/h8/h8.h +++ b/src/ec/lenovo/h8/h8.h @@ -35,6 +35,10 @@ bool h8_bluetooth_nv_enable(void); bool h8_has_bdc(struct device *dev); +void h8_wwan_enable(int on); +bool h8_wwan_nv_enable(void); +bool h8_has_wwan(struct device *dev); + /* EC registers */ #define H8_CONFIG0 0x00 #define H8_CONFIG0_EVENTS_ENABLE 0x02 diff --git a/src/ec/lenovo/h8/wwan.c b/src/ec/lenovo/h8/wwan.c new file mode 100644 index 0000000..cf3c8f7 --- /dev/null +++ b/src/ec/lenovo/h8/wwan.c @@ -0,0 +1,67 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2017 Patrick Rudolph <siro(a)das-labor.org> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <southbridge/intel/common/gpio.h> +#include <console/console.h> +#include <device/device.h> +#include <ec/acpi/ec.h> +#include <option.h> + +#include "h8.h" +#include "chip.h" + +/* Controls radio-off pin in WWAN MiniPCIe slot. */ +void h8_wwan_enable(int on) +{ + if (on) + ec_set_bit(0x3a, 6); + else + ec_clr_bit(0x3a, 6); +} + +/* + * Detect WWAN on supported MBs. + */ +bool h8_has_wwan(struct device *dev) +{ + struct ec_lenovo_h8_config *conf = dev->chip_info; + + if (!conf->has_wwan_detection) { + printk(BIOS_INFO, "H8: WWAN detection not implemented. " + "Assuming WWAN installed\n"); + return true; + } + + if (get_gpio(conf->wwan_gpio_num) == conf->wwan_gpio_lvl) { + printk(BIOS_INFO, "H8: WWAN installed\n"); + return true; + } + + printk(BIOS_INFO, "H8: WWAN not installed\n"); + return false; +} + +/* + * Return WWAN NVRAM setting. + */ +bool h8_wwan_nv_enable(void) +{ + u8 val; + + if (get_option(&val, "wwan") != CB_SUCCESS) + return true; + + return val; +} -- To view, visit https://review.coreboot.org/20983 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie53275b384c85df8adf71fe79b3d54211c868756 Gerrit-Change-Number: 20983 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: drvs/lenovo/wacom: Clean ACPI code
by Patrick Rudolph (Code Review) 13 Aug '17

13 Aug '17

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/20982 Change subject: drvs/lenovo/wacom: Clean ACPI code ...................................................................... drvs/lenovo/wacom: Clean ACPI code Use acpigen method to return _STA instead of hardcoding unreadable bytecode. Change-Id: I290fb918675857e8ef798e3ab820bcfbdc6f5bdc Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/drivers/lenovo/wacom.c 1 file changed, 2 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/20982/1 diff --git a/src/drivers/lenovo/wacom.c b/src/drivers/lenovo/wacom.c index d1464d7..f0f6ef8 100644 --- a/src/drivers/lenovo/wacom.c +++ b/src/drivers/lenovo/wacom.c @@ -105,11 +105,7 @@ acpigen_write_resourcetemplate_footer(); - acpigen_write_method("_STA", 0); - /* return */ - acpigen_emit_byte(0xa4); - acpigen_write_byte(0xf); - acpigen_pop_len(); + acpigen_write_STA(0xf); acpigen_pop_len(); } @@ -131,12 +127,7 @@ acpigen_write_resourcetemplate_footer(); - /* method op */ - acpigen_write_method("_STA", 0); - /* return */ - acpigen_emit_byte(0xa4); - acpigen_write_byte(0xf); - acpigen_pop_len(); + acpigen_write_STA(0xf); acpigen_pop_len(); } -- To view, visit https://review.coreboot.org/20982 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I290fb918675857e8ef798e3ab820bcfbdc6f5bdc Gerrit-Change-Number: 20982 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: nb/intel/x4x: Fix booting with FSB800 DDR667 combination
by build bot (Jenkins) (Code Review) 13 Aug '17

13 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20981 ) Change subject: nb/intel/x4x: Fix booting with FSB800 DDR667 combination ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/58499/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/13900/ : SUCCESS -- To view, visit https://review.coreboot.org/20981 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib013471773c20336ba0902b7f328bfb6ef970747 Gerrit-Change-Number: 20981 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 13 Aug 2017 14:10:21 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/x4x: Fix booting with FSB800 DDR667 combination
by Arthur Heymans (Code Review) 13 Aug '17

13 Aug '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/20981 Change subject: nb/intel/x4x: Fix booting with FSB800 DDR667 combination ...................................................................... nb/intel/x4x: Fix booting with FSB800 DDR667 combination A small typo in the dll setting code prevented this combination from booting. TESTED on ga-g41m-es2l with 800MHz FSB CPU and 667MHz ddr2 Change-Id: Ib013471773c20336ba0902b7f328bfb6ef970747 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/x4x/raminit_ddr2.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/20981/1 diff --git a/src/northbridge/intel/x4x/raminit_ddr2.c b/src/northbridge/intel/x4x/raminit_ddr2.c index bc012d2..f9a8c40 100644 --- a/src/northbridge/intel/x4x/raminit_ddr2.c +++ b/src/northbridge/intel/x4x/raminit_ddr2.c @@ -932,7 +932,7 @@ if ((s->selected_timings.fsb_clk == FSB_CLOCK_800MHz) && (s->selected_timings.mem_clk == MEM_CLOCK_667MHz)) { - i = MCHBAR8(0x180) & 0xf; + i = MCHBAR8(0x1c8) & 0xf; i = (i + 10) % 14; MCHBAR8(0x1c8) = (MCHBAR8(0x1c8) & ~0x1f) | i; MCHBAR8(0x180) = MCHBAR8(0x180) | 0x10; -- To view, visit https://review.coreboot.org/20981 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib013471773c20336ba0902b7f328bfb6ef970747 Gerrit-Change-Number: 20981 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: tint: Use the current time as random seed
by build bot (Jenkins) (Code Review) 13 Aug '17

13 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20980 ) Change subject: tint: Use the current time as random seed ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/58498/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/13899/ : SUCCESS -- To view, visit https://review.coreboot.org/20980 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2e482bbb9d33cdbbf3c15916458329f99fbc4450 Gerrit-Change-Number: 20980 Gerrit-PatchSet: 1 Gerrit-Owner: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 13 Aug 2017 13:48:35 +0000 Gerrit-HasComments: No

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