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Change in coreboot[master]: sb/intel/i82801gx: Add whitespace around '<<'
by build bot (Jenkins) (Code Review)
03 Jul '17
03 Jul '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20457
) Change subject: sb/intel/i82801gx: Add whitespace around '<<' ...................................................................... Patch Set 1: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/56553/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/12129/
: SUCCESS -- To view, visit
https://review.coreboot.org/20457
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I8ea8fdb031c09aac9ed4a0705c3204f87aadb565 Gerrit-Change-Number: 20457 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Jul 2017 19:42:31 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: sb/intel/i82801gx: Add whitespace around '<<'
by HAOUAS Elyes (Code Review)
03 Jul '17
03 Jul '17
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/20457
Change subject: sb/intel/i82801gx: Add whitespace around '<<' ...................................................................... sb/intel/i82801gx: Add whitespace around '<<' Change-Id: I8ea8fdb031c09aac9ed4a0705c3204f87aadb565 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/intel/i82801gx/smi.c M src/southbridge/intel/i82801gx/smihandler.c 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/20457/1 diff --git a/src/southbridge/intel/i82801gx/smi.c b/src/southbridge/intel/i82801gx/smi.c index 45fcb10..17a81c1 100644 --- a/src/southbridge/intel/i82801gx/smi.c +++ b/src/southbridge/intel/i82801gx/smi.c @@ -232,9 +232,9 @@ reg32 = inl(tcobase + 0x04); /* set status bits are cleared by writing 1 to them */ - outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS + outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS if (reg32 & (1 << 18)) - outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS + outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS return reg32; } diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index 6bd9517..6075db9 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -248,9 +248,9 @@ reg32 = inl(tcobase + 0x04); /* set status bits are cleared by writing 1 to them */ - outl(reg32 & ~(1<<18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS + outl(reg32 & ~(1 << 18), tcobase + 0x04); // Don't clear BOOT_STS before SECOND_TO_STS if (reg32 & (1 << 18)) - outl(reg32 & (1<<18), tcobase + 0x04); // clear BOOT_STS + outl(reg32 & (1 << 18), tcobase + 0x04); // clear BOOT_STS return reg32; } -- To view, visit
https://review.coreboot.org/20457
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I8ea8fdb031c09aac9ed4a0705c3204f87aadb565 Gerrit-Change-Number: 20457 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
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Change in coreboot[master]: libpayload/drivers/usb/ohci_private.h: Add parentheses aroun...
by build bot (Jenkins) (Code Review)
03 Jul '17
03 Jul '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20456
) Change subject: libpayload/drivers/usb/ohci_private.h: Add parentheses around macro ...................................................................... Patch Set 1: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/56552/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/12128/
: SUCCESS -- To view, visit
https://review.coreboot.org/20456
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib90564e32f5ff204aa5d856024b7eed2624a77b7 Gerrit-Change-Number: 20456 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Jul 2017 19:27:43 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: libpayload/drivers/usb/ohci_private.h: Add parentheses aroun...
by HAOUAS Elyes (Code Review)
03 Jul '17
03 Jul '17
HAOUAS Elyes has uploaded this change for review. (
https://review.coreboot.org/20456
Change subject: libpayload/drivers/usb/ohci_private.h: Add parentheses around macro ...................................................................... libpayload/drivers/usb/ohci_private.h: Add parentheses around macro Change-Id: Ib90564e32f5ff204aa5d856024b7eed2624a77b7 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M payloads/libpayload/drivers/usb/ohci_private.h 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/56/20456/1 diff --git a/payloads/libpayload/drivers/usb/ohci_private.h b/payloads/libpayload/drivers/usb/ohci_private.h index 58be5fa..dc76234 100644 --- a/payloads/libpayload/drivers/usb/ohci_private.h +++ b/payloads/libpayload/drivers/usb/ohci_private.h @@ -236,7 +236,7 @@ #define TD_DIRECTION_MASK MASK(TD_DIRECTION_SHIFT, 2) #define TD_DIRECTION_SETUP (OHCI_SETUP << TD_DIRECTION_SHIFT) #define TD_DIRECTION_IN (OHCI_IN << TD_DIRECTION_SHIFT) -#define TD_DIRECTION_OUT OHCI_OUT << TD_DIRECTION_SHIFT +#define TD_DIRECTION_OUT (OHCI_OUT << TD_DIRECTION_SHIFT) #define TD_DELAY_INTERRUPT_SHIFT 21 #define TD_DELAY_INTERRUPT_MASK MASK(TD_DELAY_INTERRUPT_SHIFT, 3) #define TD_DELAY_INTERRUPT_ZERO 0 -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib90564e32f5ff204aa5d856024b7eed2624a77b7 Gerrit-Change-Number: 20456 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr>
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Change in coreboot[master]: [WIP] driver/intel/wifi: Update wifi wake source in elog
by build bot (Jenkins) (Code Review)
03 Jul '17
03 Jul '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20455
) Change subject: [WIP] driver/intel/wifi: Update wifi wake source in elog ...................................................................... Patch Set 2: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/56550/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/12126/
: SUCCESS -- To view, visit
https://review.coreboot.org/20455
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7d42c5c81e0a3f7a3f94c3f6b7d2ebdf029d1aff Gerrit-Change-Number: 20455 Gerrit-PatchSet: 2 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Jul 2017 17:26:46 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: mb/google/soraka: Do not reset PMIC during sleep
by build bot (Jenkins) (Code Review)
03 Jul '17
03 Jul '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20264
) Change subject: mb/google/soraka: Do not reset PMIC during sleep ...................................................................... Patch Set 7: Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/56548/
: SUCCESS -- To view, visit
https://review.coreboot.org/20264
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I93ce4d76b0376b64ae6d1067aca0fd7467af3582 Gerrit-Change-Number: 20264 Gerrit-PatchSet: 7 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Divagar Mohandass <divagar.mohandass(a)intel.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)chromium.org> Gerrit-Reviewer: Nicolas Boichat <drinkcat(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ruben Rodriguez Buchillon <coconutruben(a)google.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Jul 2017 16:47:21 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: driver/intel/wifi: elog wifi wake source
by build bot (Jenkins) (Code Review)
03 Jul '17
03 Jul '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20455
) Change subject: driver/intel/wifi: elog wifi wake source ...................................................................... Patch Set 1: Verified+1 Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/56547/
: SUCCESS
https://qa.coreboot.org/job/coreboot-checkpatch/12124/
: SUCCESS -- To view, visit
https://review.coreboot.org/20455
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7d42c5c81e0a3f7a3f94c3f6b7d2ebdf029d1aff Gerrit-Change-Number: 20455 Gerrit-PatchSet: 1 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Jul 2017 16:37:46 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: driver/intel/wifi: elog wifi wake source
by Naresh Solanki (Code Review)
03 Jul '17
03 Jul '17
Naresh Solanki has uploaded this change for review. (
https://review.coreboot.org/20455
Change subject: driver/intel/wifi: elog wifi wake source ...................................................................... driver/intel/wifi: elog wifi wake source During S3 resume, if wifi is wake source then put it in elog if enabled in config. Change-Id: I7d42c5c81e0a3f7a3f94c3f6b7d2ebdf029d1aff Signed-off-by: Naresh G Solanki <naresh.solanki(a)intel.com> --- M src/drivers/intel/wifi/wifi.c M src/include/elog.h 2 files changed, 30 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/20455/1 diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c index a71f014..1fa3869 100644 --- a/src/drivers/intel/wifi/wifi.c +++ b/src/drivers/intel/wifi/wifi.c @@ -20,11 +20,15 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> +#include <elog.h> #include <sar.h> #include <smbios.h> #include <string.h> #include <wrdd.h> #include "chip.h" + +#define PMCS_DR 0xcc +#define PME_STS (1 << 15) #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) static int smbios_write_wifi(struct device *dev, int *handle, @@ -196,6 +200,30 @@ } #endif +static void wifi_pci_dev_init(struct device *dev) +{ + + pci_dev_init(dev); + +#if IS_ENABLED(CONFIG_ELOG) + + size_t j; + uint32_t val; + for ( j = 0 ; j < 0xff ; j+=4 ) { + if ( (j% 0x10) == 0 ) + printk(BIOS_DEBUG, "\n"); + val = pci_read_config32(dev, j); + printk(BIOS_DEBUG, "\t0x%08X", val); + } + printk(BIOS_DEBUG,"\n"); + + val = pci_read_config16(dev, PMCS_DR); + if ( val & PME_STS ) + elog_add_event_wake(ELOG_WAKE_SOURCE_PME_WIFI, 0); +#endif + +} + static struct pci_operations pci_ops = { .set_subsystem = pci_dev_set_subsystem, }; @@ -204,7 +232,7 @@ .read_resources = pci_dev_read_resources, .set_resources = pci_dev_set_resources, .enable_resources = pci_dev_enable_resources, - .init = pci_dev_init, + .init = wifi_pci_dev_init, #if IS_ENABLED(CONFIG_GENERATE_SMBIOS_TABLES) .get_smbios_data = smbios_write_wifi, #endif diff --git a/src/include/elog.h b/src/include/elog.h index c960186..9cb5b7c 100644 --- a/src/include/elog.h +++ b/src/include/elog.h @@ -147,6 +147,7 @@ #define ELOG_WAKE_SOURCE_PME_XDCI 0x1c #define ELOG_WAKE_SOURCE_PME_XHCI_USB_2 0x1d #define ELOG_WAKE_SOURCE_PME_XHCI_USB_3 0x1e +#define ELOG_WAKE_SOURCE_PME_WIFI 0x1f struct elog_event_data_wake { u8 source; -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I7d42c5c81e0a3f7a3f94c3f6b7d2ebdf029d1aff Gerrit-Change-Number: 20455 Gerrit-PatchSet: 1 Gerrit-Owner: Naresh Solanki <naresh.solanki(a)intel.com>
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Change in coreboot[master]: cpu/x86/name: Fix undefined behavior
by build bot (Jenkins) (Code Review)
03 Jul '17
03 Jul '17
build bot (Jenkins) has posted comments on this change. (
https://review.coreboot.org/20452
) Change subject: cpu/x86/name: Fix undefined behavior ...................................................................... Patch Set 3: Build Successful
https://qa.coreboot.org/job/coreboot-gerrit/56546/
: SUCCESS -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1362a3eb8c97f5c7e848d75f8d1a219968a7ef9e Gerrit-Change-Number: 20452 Gerrit-PatchSet: 3 Gerrit-Owner: Ryan Salsamendi <rsalsamendi(a)hotmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Ryan Salsamendi <rsalsamendi(a)hotmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Jul 2017 13:22:42 +0000 Gerrit-HasComments: No
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Change in coreboot[master]: util/intelmetool: Add bootguard information dump support
by Philipp Deppenwiese (Code Review)
03 Jul '17
03 Jul '17
Philipp Deppenwiese has posted comments on this change. (
https://review.coreboot.org/16328
) Change subject: util/intelmetool: Add bootguard information dump support ...................................................................... Patch Set 21: (5 comments) @Nicola which bits 20:21 and where do we get them. Normally the bootguard enforcement policies are somewhere in the ME pci config space but we don't know where exactly. If you have information about it please give me some input or make modifications yourself.
https://review.coreboot.org/#/c/16328/9/util/intelmetool/intelmetool.c
File util/intelmetool/intelmetool.c:
https://review.coreboot.org/#/c/16328/9/util/intelmetool/intelmetool.c@129
PS9, Line 129: > you have ME hardware on board but... Done
https://review.coreboot.org/#/c/16328/9/util/intelmetool/msr.c
File util/intelmetool/msr.c:
https://review.coreboot.org/#/c/16328/9/util/intelmetool/msr.c@29
PS9, Line 29: static uint64_t rdmsr(int addr) > static int ... Done
https://review.coreboot.org/#/c/16328/9/util/intelmetool/msr.c@60
PS9, Line 60: > include errno.h instead of hardcoding values Done
https://review.coreboot.org/#/c/16328/9/util/intelmetool/msr.c@73
PS9, Line 73: #endif > Return error code and pass msr value by argument Done
https://review.coreboot.org/#/c/16328/9/util/intelmetool/msr.c@85
PS9, Line 85: > O_RDONLY Done -- To view, visit
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Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ifeec8e20fa8efc35d7db4c6a84be1f118dccfc4a Gerrit-Change-Number: 16328 Gerrit-PatchSet: 21 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mathias Krause <minipli(a)googlemail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nicola Corna <nicola(a)corna.info> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Philippe Mathieu-Daudé <f4bug(a)amsat.org> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 03 Jul 2017 12:09:03 +0000 Gerrit-HasComments: Yes
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