coreboot-gerrit March 2017

coreboot-gerrit@coreboot.org

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2925 discussions

Change in coreboot[master]: libpayload: Export usbhid_getmodifiers
by build bot (Jenkins) (Code Review) 30 Mar '17

30 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18602 ) Change subject: libpayload: Export usbhid_getmodifiers ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50969/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6940/ : SUCCESS -- To view, visit https://review.coreboot.org/18602 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ief6679ce782b58b9ced207f4f27504fb2a517b76 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: libpayload-x86: Export keyboard modifiers
by build bot (Jenkins) (Code Review) 30 Mar '17

30 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18601 ) Change subject: libpayload-x86: Export keyboard modifiers ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50968/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6939/ : SUCCESS -- To view, visit https://review.coreboot.org/18601 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ifc7bd4aa86f20d67c5b542d0458b966e605c5499 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: bap/ode_e20XX: Switch away from AGESA_LEGACY
by Philippe Mathieu-Daudé (Code Review) 30 Mar '17

30 Mar '17

Philippe Mathieu-Daudé has posted comments on this change. ( https://review.coreboot.org/18717 ) Change subject: bap/ode_e20XX: Switch away from AGESA_LEGACY ...................................................................... Patch Set 4: you can add my Tested-by: (couldn't figure how to add it via gerrit...) -- To view, visit https://review.coreboot.org/18717 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I79d4a4d1d5966ab46c8a9b9e9ca4e09e21ecfea7 Gerrit-PatchSet: 4 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Fabian Kunkel <fabi.unibap(a)gmail.com> Gerrit-Reviewer: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philippe Mathieu-Daudé <philippe.mathieu.daude(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/apollolake: Set sdcard card detect (CD) host owner...
by Venkateswarlu V Vinjamuri (Code Review) 30 Mar '17

30 Mar '17

Venkateswarlu V Vinjamuri has posted comments on this change. ( https://review.coreboot.org/18947 ) Change subject: soc/intel/apollolake: Set sdcard card detect (CD) host ownership ...................................................................... Patch Set 6: (2 comments) will address rest of the comments in next version. https://review.coreboot.org/#/c/18947/6/src/soc/intel/apollolake/gpio.c File src/soc/intel/apollolake/gpio.c: PS6, Line 215: hostsw_reg_addr; > Just do this: returns the following address 0x80, 0x84, 0x88. That's why it defined as 8bit. https://review.coreboot.org/#/c/18947/6/src/soc/intel/apollolake/include/so… File src/soc/intel/apollolake/include/soc/nvs.h: Line 44: uint8_t hsad; /* 0x2F - HOSTSW_REG address */ > Can you not calculate this HOSTW_REG in ACPI based on the relative the comm scd0 is used to extract the rxstate from dw0 of gpio177 --> it's required. hsad is used to get the offset of host owned register where the pin is present. -->this can be extracted in asl. It required some extra effort. -- To view, visit https://review.coreboot.org/18947 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I042a8762dc1f9cb73e6a24c1e7169c9746b2ee14 Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/intel/common/block: Add Intel common RTC code support
by Sumeet R Pawnikar (Code Review) 30 Mar '17

30 Mar '17

Sumeet R Pawnikar has posted comments on this change. ( https://review.coreboot.org/18558 ) Change subject: soc/intel/common/block: Add Intel common RTC code support ...................................................................... Patch Set 3: (2 comments) https://review.coreboot.org/#/c/18558/3/src/soc/intel/common/block/include/… File src/soc/intel/common/block/include/intelblocks/rtc.h: Line 4: * Copyright 2017 Intel Corporation. (C) missing here. https://review.coreboot.org/#/c/18558/3/src/soc/intel/common/block/rtc/rtc.c File src/soc/intel/common/block/rtc/rtc.c: Line 25: remove this extra line. -- To view, visit https://review.coreboot.org/18558 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Id9dfcdbc300c25f43936d1efb5d6f9d81d3c8453 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/intel/common/block: [WIP]Add Intel common FAST_SPI code
by Barnali Sarkar (Code Review) 30 Mar '17

30 Mar '17

Barnali Sarkar has posted comments on this change. ( https://review.coreboot.org/18557 ) Change subject: soc/intel/common/block: [WIP]Add Intel common FAST_SPI code ...................................................................... Patch Set 15: (1 comment) https://review.coreboot.org/#/c/18557/14/src/soc/intel/common/block/include… File src/soc/intel/common/block/include/intelblocks/fast_spi.h: Line 157 > Are all of these functions necessary to be exposed? Sorry Aaron, I think I have not understood this comment properly. If we call these APIs from user, then these function declarations in this file need to exposed, right? And, we will have to include this header file. -- To view, visit https://review.coreboot.org/18557 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb Gerrit-PatchSet: 15 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/intel/common/block: [WIP]Add Intel common FAST_SPI code
by Barnali Sarkar (Code Review) 30 Mar '17

30 Mar '17

Hello build bot (Jenkins), Pratikkumar Prajapati, I'd like you to reexamine a change. Please visit https://review.coreboot.org/18557 to look at the new patch set (#16). Change subject: soc/intel/common/block: [WIP]Add Intel common FAST_SPI code ...................................................................... soc/intel/common/block: [WIP]Add Intel common FAST_SPI code Create Intel Common FAST_SPI Controller code. This code currently only contains the code for SPI initialization required in Bootblock phase, which has the following programming - * Get BIOS Rom Region Size * Enable SPIBAR * Disable the BIOS write protect so write commands are allowed * Enable SPI Prefetching and Caching. * SPI Controller register offsets in the common header fast_spi.h More code will get added up in the subsequent phases. Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb Signed-off-by: Barnali Sarkar <barnali.sarkar(a)intel.com> --- A src/soc/intel/common/block/fast_spi/Kconfig A src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/fast_spi.c A src/soc/intel/common/block/include/intelblocks/fast_spi.h A src/soc/intel/common/block/include/intelblocks/fast_spi_def.h 5 files changed, 370 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/18557/16 -- To view, visit https://review.coreboot.org/18557 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb Gerrit-PatchSet: 16 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: libpayload: Add HID mouse support
by build bot (Jenkins) (Code Review) 30 Mar '17

30 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18598 ) Change subject: libpayload: Add HID mouse support ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50965/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6936/ : SUCCESS -- To view, visit https://review.coreboot.org/18598 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ibce251d77f7ccc85e17d42fc471b14d294c0c3e9 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: libpayload: Always set pciaddr
by build bot (Jenkins) (Code Review) 30 Mar '17

30 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18599 ) Change subject: libpayload: Always set pciaddr ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50966/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6937/ : SUCCESS -- To view, visit https://review.coreboot.org/18599 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I83a0e7f7196ed251fa0becc4e56bef3ca68f20f4 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common/block: [WIP]Add Intel common FAST_SPI code
by Barnali Sarkar (Code Review) 30 Mar '17

30 Mar '17

Hello build bot (Jenkins), Pratikkumar Prajapati, I'd like you to reexamine a change. Please visit https://review.coreboot.org/18557 to look at the new patch set (#15). Change subject: soc/intel/common/block: [WIP]Add Intel common FAST_SPI code ...................................................................... soc/intel/common/block: [WIP]Add Intel common FAST_SPI code Create Intel Common FAST_SPI Controller code. This code currently only contains the code for SPI initialization required in Bootblock phase, which has the following programming - * Get BIOS Rom Region Size * Enable SPIBAR * Disable the BIOS write protect so write commands are allowed * Enable SPI Prefetching and Caching. * SPI Controller register offsets in the common header fast_spi.h More code will get added up in the subsequent phases. Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb Signed-off-by: Barnali Sarkar <barnali.sarkar(a)intel.com> --- A src/soc/intel/common/block/fast_spi/Kconfig A src/soc/intel/common/block/fast_spi/Makefile.inc A src/soc/intel/common/block/fast_spi/fast_spi.c A src/soc/intel/common/block/include/intelblocks/fast_spi.h A src/soc/intel/common/block/include/intelblocks/fast_spi_def.h 5 files changed, 370 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/18557/15 -- To view, visit https://review.coreboot.org/18557 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb Gerrit-PatchSet: 15 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins)

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coreboot-gerrit March 2017