coreboot-gerrit March 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/apollolake: Code clean up by using common PCR module
by build bot (Jenkins) (Code Review) 31 Mar '17

31 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18673 ) Change subject: soc/intel/apollolake: Code clean up by using common PCR module ...................................................................... Patch Set 9: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/50981/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/6949/ : SUCCESS -- To view, visit https://review.coreboot.org/18673 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Iacbf58dbd55bf3915676d875fcb484362d357a44 Gerrit-PatchSet: 9 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common/block: Add Intel common PCR support
by build bot (Jenkins) (Code Review) 31 Mar '17

31 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/18669 ) Change subject: soc/intel/common/block: Add Intel common PCR support ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50980/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6948/ : SUCCESS -- To view, visit https://review.coreboot.org/18669 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I78526a86b6d10f226570c08050327557e0bb2c78 Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common/block: Add Intel common RTC code support
by Bora Guvendik (Code Review) 31 Mar '17

31 Mar '17

Bora Guvendik has posted comments on this change. ( https://review.coreboot.org/18558 ) Change subject: soc/intel/common/block: Add Intel common RTC code support ...................................................................... Patch Set 4: (5 comments) https://review.coreboot.org/#/c/18558/3/src/soc/intel/common/block/include/… File src/soc/intel/common/block/include/intelblocks/rtc.h: Line 4: * Copyright (C) 2017 Intel Corporation. > (C) missing here. Done Line 22 > extra line Done https://review.coreboot.org/#/c/18558/3/src/soc/intel/common/block/rtc/rtc.c File src/soc/intel/common/block/rtc/rtc.c: PS3, Line 23: define B_PCH_P > Sounds like you just need an OR by itself instead of having to hard code ~0 Done PS3, Line 24: fine B_PCH_PCR_RTC_CONF_UC > > >>Either the IP is the same or its not Done Line 25: #define B_PCH_PCR_RTC_CONF_RESERVED (1 << 31) > remove this extra line. Done -- To view, visit https://review.coreboot.org/18558 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Id9dfcdbc300c25f43936d1efb5d6f9d81d3c8453 Gerrit-PatchSet: 4 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/intel/common/block: Add Intel common PCR support
by Bora Guvendik (Code Review) 31 Mar '17

31 Mar '17

Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/18669 to look at the new patch set (#7). Change subject: soc/intel/common/block: Add Intel common PCR support ...................................................................... soc/intel/common/block: Add Intel common PCR support IOSF_SB message space is used to access registers mapped on IOSF-SB. These registers include uncore CRs (configuration registers) and chipset specific registers. The Private Configuration Register (PCR) space is accessed on IOSF-SB using destination ID also known as Port ID. Access to IOSF-SB by the Host or System Agent is possible over PSF via the Primary to Sideband Bridge (P2SB). P2SB will forward properly formatted register access requests as CRRd and CRWr request via IOSF-SB. Change-Id: I78526a86b6d10f226570c08050327557e0bb2c78 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- A src/soc/intel/common/block/include/intelblocks/pcr.h A src/soc/intel/common/block/pcr/Kconfig A src/soc/intel/common/block/pcr/Makefile.inc A src/soc/intel/common/block/pcr/pcr.c 4 files changed, 218 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/69/18669/7 -- To view, visit https://review.coreboot.org/18669 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: I78526a86b6d10f226570c08050327557e0bb2c78 Gerrit-PatchSet: 7 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com>

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Change in coreboot[master]: soc/intel/apollolake: Code clean up by using common PCR module
by Bora Guvendik (Code Review) 31 Mar '17

31 Mar '17

Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/18673 to look at the new patch set (#9). Change subject: soc/intel/apollolake: Code clean up by using common PCR module ...................................................................... soc/intel/apollolake: Code clean up by using common PCR module This patch creates PCR library to perform CRRd and CRWr operation using Port Ids, define inside soc/pci_ids.h Change-Id: Iacbf58dbd55bf3915676d875fcb484362d357a44 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/apollolake/Kconfig M src/soc/intel/apollolake/acpi/gpio.asl M src/soc/intel/apollolake/acpi/scs.asl M src/soc/intel/apollolake/bootblock/bootblock.c M src/soc/intel/apollolake/gpio.c M src/soc/intel/apollolake/include/soc/gpio_defs.h M src/soc/intel/apollolake/include/soc/iomap.h D src/soc/intel/apollolake/include/soc/iosf.h A src/soc/intel/apollolake/include/soc/pcr_ids.h M src/soc/intel/apollolake/itss.c 10 files changed, 114 insertions(+), 131 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/18673/9 -- To view, visit https://review.coreboot.org/18673 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iacbf58dbd55bf3915676d875fcb484362d357a44 Gerrit-PatchSet: 9 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com>

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Change in coreboot[master]: soc/intel/skylake: Code clean up by using common PCR module
by Bora Guvendik (Code Review) 31 Mar '17

31 Mar '17

Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/18674 to look at the new patch set (#9). Change subject: soc/intel/skylake: Code clean up by using common PCR module ...................................................................... soc/intel/skylake: Code clean up by using common PCR module This patch creates PCR library to perform CRRd and CRWr operation using Port Ids, define inside soc/pci_ids.h Change-Id: Id9336883514298e7f93fbc95aef8228202aa6fb9 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/Makefile.inc M src/soc/intel/skylake/acpi/irqlinks.asl M src/soc/intel/skylake/acpi/pch.asl M src/soc/intel/skylake/acpi/pcr.asl M src/soc/intel/skylake/bootblock/pch.c M src/soc/intel/skylake/bootblock/uart.c M src/soc/intel/skylake/finalize.c M src/soc/intel/skylake/gpio.c M src/soc/intel/skylake/include/soc/iomap.h D src/soc/intel/skylake/include/soc/pcr.h A src/soc/intel/skylake/include/soc/pcr_ids.h M src/soc/intel/skylake/lpc.c D src/soc/intel/skylake/pcr.c M src/soc/intel/skylake/pmc.c M src/soc/intel/skylake/smihandler.c 16 files changed, 142 insertions(+), 343 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/18674/9 -- To view, visit https://review.coreboot.org/18674 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Id9336883514298e7f93fbc95aef8228202aa6fb9 Gerrit-PatchSet: 9 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com>

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Change in coreboot[master]: soc/intel/common/block: Add Intel common RTC code support
by Bora Guvendik (Code Review) 31 Mar '17

31 Mar '17

Hello Barnali Sarkar, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/18558 to look at the new patch set (#4). Change subject: soc/intel/common/block: Add Intel common RTC code support ...................................................................... soc/intel/common/block: Add Intel common RTC code support Create Intel Common RTC code. This code currently only contains the code for configuring RTC required in Bootblock phase which has the following programming - * Enable upper 128 bytes of CMOS. More code will get added up in the subsequent phases. Change-Id: Id9dfcdbc300c25f43936d1efb5d6f9d81d3c8453 Signed-off-by: Barnali Sarkar <barnali.sarkar(a)intel.com> --- A src/soc/intel/common/block/include/intelblocks/rtc.h A src/soc/intel/common/block/rtc/Kconfig A src/soc/intel/common/block/rtc/Makefile.inc A src/soc/intel/common/block/rtc/rtc.c 4 files changed, 58 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/18558/4 -- To view, visit https://review.coreboot.org/18558 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Id9dfcdbc300c25f43936d1efb5d6f9d81d3c8453 Gerrit-PatchSet: 4 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: soc/intel/skylake: Use RTC common code
by Bora Guvendik (Code Review) 31 Mar '17

31 Mar '17

Hello Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/18701 to look at the new patch set (#3). Change subject: soc/intel/skylake: Use RTC common code ...................................................................... soc/intel/skylake: Use RTC common code Change-Id: Ibcbaf5061e96a67815116a9f7a03be515997be6d Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/soc/intel/skylake/Kconfig M src/soc/intel/skylake/bootblock/pch.c 2 files changed, 3 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/18701/3 -- To view, visit https://review.coreboot.org/18701 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ibcbaf5061e96a67815116a9f7a03be515997be6d Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins)

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Change in coreboot[master]: soc/intel/common/block: Add Intel common RTC code support
by Hannah Williams (Code Review) 31 Mar '17

31 Mar '17

Hannah Williams has posted comments on this change. ( https://review.coreboot.org/18558 ) Change subject: soc/intel/common/block: Add Intel common RTC code support ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/18558/3/src/soc/intel/common/block/include/… File src/soc/intel/common/block/include/intelblocks/rtc.h: Line 19: void soc_rtc_config(void); > Why is this called soc_rtc_config when its really only about enabling the u The register name is RTC Configuration -- To view, visit https://review.coreboot.org/18558 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Id9dfcdbc300c25f43936d1efb5d6f9d81d3c8453 Gerrit-PatchSet: 3 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: Yes

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Change in coreboot[master]: Documentation: Describe libgfxinit hook-up
by build bot (Jenkins) (Code Review) 30 Mar '17

30 Mar '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19054 ) Change subject: Documentation: Describe libgfxinit hook-up ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/50979/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/6947/ : SUCCESS -- To view, visit https://review.coreboot.org/19054 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ieeb53a1694193cd19b5e9aa5bee25e36a60e56bd Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) Gerrit-HasComments: No

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coreboot-gerrit March 2017