Hello Stefan Reinauer, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/13410
to look at the new patch set (#2).
Change subject: mainboard/lenovo/x60: Add TPM 1.2 mainboard support
......................................................................
mainboard/lenovo/x60: Add TPM 1.2 mainboard support
This was adapted from the following commit:
3d02b9c mainboard/lenovo/{t430s,t420s,t520,t530,x220}: Add TPM 1.2 mainboard support
Without that patch, coreboot doesn't touch the TPM, and,
in GNU/Linux, the TPM is not detected automatically.
It could still be used by running:
modprobe tpm_tis itpm=1 force=1
which initializes it. From dmesg:
tpm_tis tpm_tis: 1.2 TPM (device-id 0x3202, rev-id 5)
tpm tpm0: A TPM error (38) occurred attempting to determine the timeouts
tpm tpm0: Issuing TPM_STARTUP
tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 10000->10000us B 10000->10000us C 0->750000us D 0->750000us
With this patch, the TPM is found detected automatically,
and we have the folliwing in dmesg:
tpm_tis 00:07: 1.2 TPM (device-id 0x3202, rev-id 5)
tpm tpm0: A TPM error (38) occurred attempting to determine the timeouts
tpm tpm0: Issuing TPM_STARTUP
tpm tpm0: [Hardware Error]: Adjusting reported timeouts: A 10000->10000us B 10000->10000us C 0->750000us D 0->750000us
Change-Id: I6e65b37507c111af1c0c56822327d5497f58f085
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org>
---
M src/drivers/pc80/tpm/tpm.c
M src/mainboard/lenovo/x60/Kconfig
M src/mainboard/lenovo/x60/devicetree.cb
3 files changed, 6 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/13410/2
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Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I6e65b37507c111af1c0c56822327d5497f58f085
Gerrit-PatchSet: 2
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Denis Carikli <GNUtoo(a)no-log.org>
Gerrit-Reviewer: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org>
Gerrit-Reviewer: Martin Roth <martinroth(a)google.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
Gerrit-Reviewer: build bot (Jenkins)
Barnali Sarkar has posted comments on this change. ( https://review.coreboot.org/18557 )
Change subject: soc/intel/common/block: [WIP]Add Intel common FAST_SPI code
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Patch Set 16:
(9 comments)
https://review.coreboot.org/#/c/18557/16/src/soc/intel/common/block/fast_sp…
File src/soc/intel/common/block/fast_spi/fast_spi.c:
PS16, Line 26: uint32_t
> uintptr_t
will fix
Line 32: return (void *)(bar & ~PCI_BASE_ADDRESS_MEM_ATTR_MASK);
> This whole function isn't indented correctly.
will fix
Line 40: SPIBAR_BIOS_CONTROL_BILD);
> Just use a variable for the register value. Readability is being sacrificed
ok
Line 42: pci_read_config32(PCH_DEV_SPI, SPIBAR_BIOS_CONTROL);
> pci config space by definition doesn't have posted write semantics. Why is
will check and get back on this.
PS16, Line 86: u32
> uint32_t
will fix
Line 115: size_t get_fast_spi_bios_region(size_t *bios_size)
> Can you please be consistent and make the functions start with fast_spi_ ?
will fix
Line 135: void fast_spi_flash_init(device_t dev)
> So if this is called from a function internal this compilation unit why is
Currently, as I have only pushed the SPI library upto bootblock, I need to make this function as GLOBAL since there are other places (like flash_controller.c, flash_ctrlr.c, chip.c, smihandler.c files), which calls this function to ensure writes can take place to flash.
So, I have made it non-static to avoid compilation issues.
In future, when the complete library will be formed and if we dont require this function from user side, we can make it Local to this file.
https://review.coreboot.org/#/c/18557/14/src/soc/intel/common/block/include…
File src/soc/intel/common/block/include/intelblocks/fast_spi.h:
Line 157
> > Okay, will check and fix these functions.
Yes, we have analysed Small Core's "flash_ctrlr.c" and Big Core's "flash_controller.c" file, both can be made common, and we will again maintain a library of flash_read, flash_write, flash_erase etc, etc in this FAST_SPI IP block common code. From SOC, it will only call the respective APIs of the library.
https://review.coreboot.org/#/c/18557/16/src/soc/intel/common/block/include…
File src/soc/intel/common/block/include/intelblocks/fast_spi_def.h:
Line 17: #define SOC_INTEL_COMMON_BLOCK_FAST_SPI_DEF_H
> include/intelblocks/fast_spi_def.h is the external headers for SoC consumpt
I have included it here since, in flash_controller.c file, we have lot of these MACRO definitions used as of now (which will be part of this library after we cover romstage part).
But now, we need to include this header file from there to get it built. So, if we keep it local to the "fast_spi" directory, then in flash_controller.c file we have to include like this -
#include <../common/block/fast_spi/fast_spi_def.h>
which doesn't look good, I thought.
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Gerrit-MessageType: comment
Gerrit-Change-Id: I046e3b30c8efb172851dd17f49565c9ec4cb38cb
Gerrit-PatchSet: 16
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Owner: Barnali Sarkar <barnali.sarkar(a)intel.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com>
Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org>
Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com>
Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com>
Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net>
Gerrit-Reviewer: Pratikkumar Prajapati <pratikkumar.v.prajapati(a)intel.corp-partner.google.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins)
Gerrit-HasComments: Yes
Hello Aaron Durbin, Paul Menzel, build bot (Jenkins), Nico Huber,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/18903
to look at the new patch set (#9).
Change subject: nb/intel: Deduplicate vbt header
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nb/intel: Deduplicate vbt header
Move header and delete duplicates.
Change-Id: I0e1f5d9082626062f95afe718f6ec62a68f0d828
Signed-off-by: Patrick Rudolph <siro(a)das-labor.org>
---
M src/drivers/intel/gma/intel_bios.h
R src/drivers/intel/gma/opregion.h
M src/drivers/intel/gma/vbt.c
D src/northbridge/intel/fsp_sandybridge/gma.h
M src/northbridge/intel/fsp_sandybridge/northbridge.h
D src/northbridge/intel/haswell/gma.h
M src/northbridge/intel/haswell/haswell.h
D src/northbridge/intel/nehalem/gma.h
M src/northbridge/intel/nehalem/nehalem.h
M src/northbridge/intel/sandybridge/gma.c
M src/northbridge/intel/sandybridge/gma.h
M src/northbridge/intel/sandybridge/sandybridge.h
M src/soc/intel/common/opregion.c
M src/soc/intel/common/opregion.h
14 files changed, 8 insertions(+), 606 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/18903/9
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Gerrit-MessageType: newpatchset
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Gerrit-PatchSet: 9
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