Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/22632
Change subject: payloads/SeaBIOS: Add NO_HARDWARE_IRQ option
......................................................................
payloads/SeaBIOS: Add NO_HARDWARE_IRQ option
Normally support for hardware irq in SeaBIOS is needed
for the most platforms. But some like Apollolake require
it to be disabled.
Change-Id: I5a5f40c58b595075940e5d6d3d10b06caa322714
Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org>
---
M payloads/external/Makefile.inc
M payloads/external/SeaBIOS/Kconfig
M payloads/external/SeaBIOS/Makefile
3 files changed, 16 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/22632/1
diff --git a/payloads/external/Makefile.inc b/payloads/external/Makefile.inc
index 453d09e..46bb2a7 100644
--- a/payloads/external/Makefile.inc
+++ b/payloads/external/Makefile.inc
@@ -92,7 +92,8 @@
CONFIG_SEABIOS_DEBUG_LEVEL=$(CONFIG_SEABIOS_DEBUG_LEVEL) \
CONFIG_DRIVERS_UART_8250MEM_32=$(CONFIG_DRIVERS_UART_8250MEM_32) \
CONFIG_ENABLE_HSUART=$(CONFIG_ENABLE_HSUART) \
- CONFIG_CONSOLE_UART_BASE_ADDRESS=$(CONFIG_CONSOLE_UART_BASE_ADDRESS)
+ CONFIG_CONSOLE_UART_BASE_ADDRESS=$(CONFIG_CONSOLE_UART_BASE_ADDRESS) \
+ SEABIOS_NO_HARDWARE_IRQ=$(SEABIOS_NO_HARDWARE_IRQ)
payloads/external/SeaBIOS/seabios/out/vgabios.bin: seabios
payloads/external/SeaBIOS/seabios/.config: payloads/external/SeaBIOS/seabios/out/bios.bin.elf
diff --git a/payloads/external/SeaBIOS/Kconfig b/payloads/external/SeaBIOS/Kconfig
index 5c0faaa..3ed7a5b 100644
--- a/payloads/external/SeaBIOS/Kconfig
+++ b/payloads/external/SeaBIOS/Kconfig
@@ -62,6 +62,17 @@
After initializing the GPU, the information about it can be passed to the payload.
Provide an option rom that implements this legacy VGA BIOS compatibility requirement.
+config SEABIOS_NO_HARDWARE_IRQ
+ prompt "Disable IRQ routing support"
+ default n
+ bool
+ help
+ Program and support hardware interrupts using the i8259
+ programmable interrupt controller (PIC). This option must
+ be enabled in order to support most boot loaders. Only
+ enable this option if running on peculiar hardware known
+ not to support irq routing.
+
config PAYLOAD_CONFIGFILE
string "SeaBIOS config file"
default ""
diff --git a/payloads/external/SeaBIOS/Makefile b/payloads/external/SeaBIOS/Makefile
index 8b6b0ed..50c3486 100644
--- a/payloads/external/SeaBIOS/Makefile
+++ b/payloads/external/SeaBIOS/Makefile
@@ -57,6 +57,9 @@
ifneq ($(CONFIG_SEABIOS_THREAD_OPTIONROMS),y)
echo "# CONFIG_THREAD_OPTIONROMS is not set" >> seabios/.config
endif
+ifneq ($(CONFIG_SEABIOS_NO_HARDWARE_IRQ),y)
+ echo "# CONFIG_HARDWARE_IRQ is not set" >> seabios/.config
+endif
ifeq ($(CONFIG_SEABIOS_VGA_COREBOOT),y)
echo "CONFIG_VGA_COREBOOT=y" >> seabios/.config
echo "CONFIG_BUILD_VGABIOS=y" >> seabios/.config
--
To view, visit https://review.coreboot.org/22632
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I5a5f40c58b595075940e5d6d3d10b06caa322714
Gerrit-Change-Number: 22632
Gerrit-PatchSet: 1
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Philipp Deppenwiese has uploaded a new patch set (#2). ( https://review.coreboot.org/22631 )
Change subject: payloads/SeaBIOS: Add different MMIO uart configurations
......................................................................
payloads/SeaBIOS: Add different MMIO uart configurations
The MMIO address can change for different platforms
like Apollolake.
Change-Id: I6ec72d3a14f00212323a04e20d5a477dbc26b770
Signed-off-by: Philipp Deppenwiese <zaolin(a)das-labor.org>
---
M payloads/external/Makefile.inc
M payloads/external/SeaBIOS/Makefile
2 files changed, 10 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/22631/2
--
To view, visit https://review.coreboot.org/22631
To unsubscribe, visit https://review.coreboot.org/settings
Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newpatchset
Gerrit-Change-Id: I6ec72d3a14f00212323a04e20d5a477dbc26b770
Gerrit-Change-Number: 22631
Gerrit-PatchSet: 2
Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com>
Piotr Król has uploaded this change for review. ( https://review.coreboot.org/22630
Change subject: pcengines/apu2: remove TPM from devicetree for apu3
......................................................................
pcengines/apu2: remove TPM from devicetree for apu3
There is no physical LPC connector on apu3 mainboard. This board contain
only LPC debug test points with not all required pins exposed.
Change-Id: I83de16bb651846340788c6fa52c04b8e09e46a99
Signed-off-by: Piotr Król <piotr.krol(a)3mdeb.com>
---
M src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb
1 file changed, 0 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/22630/1
diff --git a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb
index 880f3dd..c431291 100644
--- a/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb
+++ b/src/mainboard/pcengines/apu2/variants/apu3/devicetree.cb
@@ -73,9 +73,6 @@
device pnp 2e.607 off end
device pnp 2e.e off end
end # SIO NCT5104D
- chip drivers/pc80/tpm
- device pnp 0c31.0 on end
- end # LPC TPM
end # LPC 0x439d
device pci 14.7 on end # SD
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I83de16bb651846340788c6fa52c04b8e09e46a99
Gerrit-Change-Number: 22630
Gerrit-PatchSet: 1
Gerrit-Owner: Piotr Król <piotr.krol(a)3mdeb.com>