coreboot-gerrit November 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: chromeec: Notify CREC device of wakeup events
by build bot (Jenkins) (Code Review) 30 Nov '17

30 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22625 ) Change subject: chromeec: Notify CREC device of wakeup events ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/63912/ : SUCCESS -- To view, visit https://review.coreboot.org/22625 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I723f7f4e4c99e7a5b57c6296da66cf30cd413c27 Gerrit-Change-Number: 22625 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 30 Nov 2017 01:59:32 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/kahlee: Enable elog in Kconfig
by build bot (Jenkins) (Code Review) 30 Nov '17

30 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22636 ) Change subject: mainboard/google/kahlee: Enable elog in Kconfig ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/63911/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/18774/ : SUCCESS -- To view, visit https://review.coreboot.org/22636 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I595a27ac27daa42c2499de1a343bc30be9a89fa6 Gerrit-Change-Number: 22636 Gerrit-PatchSet: 1 Gerrit-Owner: John E. Kabat Jr. <john.kabat(a)scarletltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 30 Nov 2017 01:58:42 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/kahlee: Enable elog in Kconfig
by John E. Kabat Jr. (Code Review) 30 Nov '17

30 Nov '17

John E. Kabat Jr. has uploaded this change for review. ( https://review.coreboot.org/22636 Change subject: mainboard/google/kahlee: Enable elog in Kconfig ...................................................................... mainboard/google/kahlee: Enable elog in Kconfig - Change kahlee/Kconfig to enable elog and save the boot count in cmos. - Change soc/amd/common/Makefile to not include common/spi.c unless S3 is enabled. - Change soc/amd/stoneyridge/Kconfig to set BOOT_DEVICE_SUPPORTS_WRITES BUG=b:65485690 TEST=Build & boot kahlee. WIP - More testing to follow with boot to ChromeOS. Change-Id: I595a27ac27daa42c2499de1a343bc30be9a89fa6 Signed-off-by: John E. Kabat Jr <john.kabat(a)scarletltd.com> --- M src/mainboard/google/kahlee/Kconfig M src/soc/amd/common/Makefile.inc M src/soc/amd/stoneyridge/Kconfig 3 files changed, 16 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/22636/1 diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig index 6c9bfcc..f075a9f 100644 --- a/src/mainboard/google/kahlee/Kconfig +++ b/src/mainboard/google/kahlee/Kconfig @@ -29,6 +29,10 @@ select MAINBOARD_HAS_LPC_TPM select SERIRQ_CONTINUOUS_MODE select STONEYRIDGE_UART + select ELOG + select ELOG_GSMI + select ELOG_BOOT_COUNT + if BOARD_GOOGLE_BASEBOARD_KAHLEE @@ -97,4 +101,12 @@ int default 1 +config ELOG_BOOT_COUNT_CMOS_OFFSET + depends on ELOG && ELOG_BOOT_COUNT && !USE_OPTION_TABLE + int "Offset in CMOS to store the boot count" + default 144 + help + This value must be greater than 16 bytes so as not to interfere + with the standard RTC region. Requires 8 bytes. + endif # BOARD_GOOGLE_KAHLEE || BOARD_GOOGLE_GRUNT diff --git a/src/soc/amd/common/Makefile.inc b/src/soc/amd/common/Makefile.inc index aa27512..7ccb1c2 100644 --- a/src/soc/amd/common/Makefile.inc +++ b/src/soc/amd/common/Makefile.inc @@ -15,8 +15,9 @@ ramstage-y += amd_pci_util.c ramstage-y += def_callouts.c ramstage-y += heapmanager.c -ramstage-$(CONFIG_SPI_FLASH) += spi.c - +ifeq ($(CONFIG_SPI_FLASH),y) +ramstage-$(CONFIG_HAVE_ACPI_RESUME) += spi.c +endif subdirs-$(CONFIG_SOC_AMD_COMMON_BLOCK) += block endif diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 7f44883..fa8d842 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -50,6 +50,7 @@ select SOC_AMD_COMMON_BLOCK_CAR select C_ENVIRONMENT_BOOTBLOCK select BOOTBLOCK_CONSOLE + select BOOT_DEVICE_SUPPORTS_WRITES select RELOCATABLE_MODULES select PARALLEL_MP select HAVE_SMI_HANDLER -- To view, visit https://review.coreboot.org/22636 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I595a27ac27daa42c2499de1a343bc30be9a89fa6 Gerrit-Change-Number: 22636 Gerrit-PatchSet: 1 Gerrit-Owner: John E. Kabat Jr. <john.kabat(a)scarletltd.com>

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Change in coreboot[master]: soc/amd/stoneyridge: Fix guarded code in ACPI ASL
by build bot (Jenkins) (Code Review) 30 Nov '17

30 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22634 ) Change subject: soc/amd/stoneyridge: Fix guarded code in ACPI ASL ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/18773/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/63909/ : SUCCESS -- To view, visit https://review.coreboot.org/22634 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I71c6acb235df9aa8642dca4c85d2bf604e244bf4 Gerrit-Change-Number: 22634 Gerrit-PatchSet: 2 Gerrit-Owner: John E. Kabat Jr. <john.kabat(a)scarletltd.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: John E. Kabat Jr. <john.kabat(a)scarletltd.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Marshall Dawson <marshall.dawson(a)scarletltd.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 30 Nov 2017 00:33:25 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: amd/stoneyridge/include/soc/northbridge.h: Cleanup
by Richard Spiegel (Code Review) 30 Nov '17

30 Nov '17

Richard Spiegel has abandoned this change. ( https://review.coreboot.org/22635 ) Change subject: amd/stoneyridge/include/soc/northbridge.h: Cleanup ...................................................................... Abandoned Martin declared that the changes are not required. -- To view, visit https://review.coreboot.org/22635 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: I882bf1cc9d9e6b587b5dc3d27cea1626f4dcc51a Gerrit-Change-Number: 22635 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: amd/stoneyridge/include/soc/northbridge.h: Cleanup
by Martin Roth (Code Review) 30 Nov '17

30 Nov '17

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Change in coreboot[master]: amd/stoneyridge/include/soc/northbridge.h: Cleanup
by Richard Spiegel (Code Review) 30 Nov '17

30 Nov '17

1 0

Change in coreboot[master]: amd/stoneyridge/include/soc/northbridge.h: Cleanup
by Richard Spiegel (Code Review) 30 Nov '17

30 Nov '17

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/22635 ) Change subject: amd/stoneyridge/include/soc/northbridge.h: Cleanup ...................................................................... Patch Set 1: (3 comments) https://review.coreboot.org/#/c/22635/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/22635/1//COMMIT_MSG@9 PS1, Line 9: There are instances where the pound "#" is separated from the word "define", : it should be all together "#define". > Why? This is a common convention throughout the codebase to show that this I was not aware of this convention. I can undo it. https://review.coreboot.org/#/c/22635/1//COMMIT_MSG@12 PS1, Line 12: There are instances where bits are being declared as (1 << x), should be : replaced by macro BIT(x). > Again, the (1 << x) is very common throughout the coreboot codebase. What' Earlier (about 2 month ago) I was requested to do that with southbridge.h. Otherwise I would not have changed it. https://review.coreboot.org/#/c/22635/1//COMMIT_MSG@15 PS1, Line 15: 62239898 > 62239898 - Kahlee: coreboot - stoneyridge - include headers for filetypes u As I mentioned in bugganizer, all that was requested was already done, and I had only seen these as possible clean up before marking the issue as fixed. If I should revert my changes, then I should probably abandon this review and close the issue (mark as fixed). -- To view, visit https://review.coreboot.org/22635 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I882bf1cc9d9e6b587b5dc3d27cea1626f4dcc51a Gerrit-Change-Number: 22635 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 30 Nov 2017 00:06:58 +0000 Gerrit-HasComments: Yes

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Change in coreboot[master]: src/soc/intel/cannonlake: Add _PRW for CNVi
by build bot (Jenkins) (Code Review) 30 Nov '17

30 Nov '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22611 ) Change subject: src/soc/intel/cannonlake: Add _PRW for CNVi ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/18772/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/63908/ : SUCCESS -- To view, visit https://review.coreboot.org/22611 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id6689754d1c4100615e4e4ae5a7f9846f4bf785f Gerrit-Change-Number: 22611 Gerrit-PatchSet: 3 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Hima B Chilmakuru <hima.b.chilmakuru(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 29 Nov 2017 23:15:38 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: amd/stoneyridge/include/soc/northbridge.h: Cleanup
by Martin Roth (Code Review) 29 Nov '17

29 Nov '17

Martin Roth has posted comments on this change. ( https://review.coreboot.org/22635 ) Change subject: amd/stoneyridge/include/soc/northbridge.h: Cleanup ...................................................................... Patch Set 1: Code-Review-1 (4 comments) I'd rather that none of these changes were made. https://review.coreboot.org/#/c/22635/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/22635/1//COMMIT_MSG@9 PS1, Line 9: There are instances where the pound "#" is separated from the word "define", : it should be all together "#define". Why? This is a common convention throughout the codebase to show that this #define is a part of the previous register. This extra space helps visually to separate the register number from the register components. https://review.coreboot.org/#/c/22635/1//COMMIT_MSG@12 PS1, Line 12: There are instances where bits are being declared as (1 << x), should be : replaced by macro BIT(x). Again, the (1 << x) is very common throughout the coreboot codebase. What's the reason to change it in this file? If it were mixed, I could see it all getting converted one way or the other, but why change it here? https://review.coreboot.org/#/c/22635/1//COMMIT_MSG@15 PS1, Line 15: 62239898 62239898 - Kahlee: coreboot - stoneyridge - include headers for filetypes used. What does this change have to do with this bug? https://review.coreboot.org/#/c/22635/1/src/soc/amd/stoneyridge/include/soc… File src/soc/amd/stoneyridge/include/soc/northbridge.h: https://review.coreboot.org/#/c/22635/1/src/soc/amd/stoneyridge/include/soc… PS1, Line 59: BIT(0) No longer aligned after removing the space. -- To view, visit https://review.coreboot.org/22635 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I882bf1cc9d9e6b587b5dc3d27cea1626f4dcc51a Gerrit-Change-Number: 22635 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 29 Nov 2017 22:20:07 +0000 Gerrit-HasComments: Yes

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coreboot-gerrit November 2017