Hannah Williams (hannah.williams(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15054
-gerrit
commit 814e53eb87b94000a4e2e5e69a8bc1f94a0a4ed2
Author: Hannah Williams <hannah.williams(a)intel.com>
Date: Fri Apr 29 14:48:20 2016 -0700
soc/apollolake: Put CSE to low power state
fsp_notify(END_OF_FIRMWARE) should be sent to FSP to enable putting CSE
in low power state
Change-Id: I76b8e85ccf077032616ba8e4a333d9264dc65ed2
Signed-off-by: Hannah Williams <hannah.williams(a)intel.com>
---
src/soc/intel/apollolake/chip.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index d7c61c1..17bceec 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -138,6 +138,9 @@ static void fsp_notify_dummy(void *arg)
if (fsp_notify(ph) != FSP_SUCCESS)
printk(BIOS_CRIT, "FspNotify failed!\n");
+ /* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
+ if (ph == READY_TO_BOOT)
+ fsp_notify_dummy((void *)END_OF_FIRMWARE);
}
BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, fsp_notify_dummy,
Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15014
-gerrit
commit b76d300c86ba629e5fd3d11edcb7894a805301c0
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Tue May 31 17:20:45 2016 +0300
aopen/dxplplusu: Disable HW scrubber
See initialize_ecc() for the awful hack that got us around cache-as-ram
being invalidated as we do ECC HW scrubbing. It once worked, but
compiler nowadays puts more registers on the stack.
Not much interest to try fix ECC for this particular board.
Change-Id: Ie6a09e28b0af5bbf2d68af72f5d98c03df33c402
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
---
src/mainboard/aopen/dxplplusu/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/aopen/dxplplusu/Kconfig b/src/mainboard/aopen/dxplplusu/Kconfig
index 1802b5a..b64ac1d 100644
--- a/src/mainboard/aopen/dxplplusu/Kconfig
+++ b/src/mainboard/aopen/dxplplusu/Kconfig
@@ -12,7 +12,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select UDELAY_TSC
select HAVE_ACPI_TABLES
select BOARD_ROMSIZE_KB_512
- select HW_SCRUBBER
+# select HW_SCRUBBER
config MAINBOARD_DIR
string
Hannah Williams (hannah.williams(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15054
-gerrit
commit de3ff363eca8515901b840bb78deca5462a6e52b
Author: Hannah Williams <hannah.williams(a)intel.com>
Date: Fri Apr 29 14:48:20 2016 -0700
soc/apollolake: Put CSE to low power state
fsp_notify(END_OF_FIRMWARE) should be sent to FSP to enable putting CSE
in low power state
Change-Id: I76b8e85ccf077032616ba8e4a333d9264dc65ed2
Signed-off-by: Hannah Williams <hannah.williams(a)intel.com>
---
src/soc/intel/apollolake/chip.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index d7c61c1..d8ea38e 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -138,6 +138,9 @@ static void fsp_notify_dummy(void *arg)
if (fsp_notify(ph) != FSP_SUCCESS)
printk(BIOS_CRIT, "FspNotify failed!\n");
+ /* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
+ if (ph == READY_TO_BOOT)
+ fsp_notify_dummy(END_OF_FIRMWARE);
}
BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, fsp_notify_dummy,
Hannah Williams (hannah.williams(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15054
-gerrit
commit dfd5b43eae9c9c106796206efad620041070edb0
Author: Hannah Williams <hannah.williams(a)intel.com>
Date: Fri Apr 29 14:48:20 2016 -0700
soc/apollolake: Put CSE to low power state
fsp_notify(END_OF_FIRMWARE) should be sent to FSP to enable putting CSE
in low power state
Change-Id: I76b8e85ccf077032616ba8e4a333d9264dc65ed2
Signed-off-by: Hannah Williams <hannah.williams(a)intel.com>
---
src/soc/intel/apollolake/chip.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c
index f56e1f2..a1dd663 100644
--- a/src/soc/intel/apollolake/chip.c
+++ b/src/soc/intel/apollolake/chip.c
@@ -136,6 +136,9 @@ static void fsp_notify_dummy(void *arg)
if (fsp_notify(ph) != FSP_SUCCESS)
printk(BIOS_CRIT, "FspNotify failed!\n");
+ /* Call END_OF_FIRMWARE Notify after READY_TO_BOOT Notify */
+ if (ph == READY_TO_BOOT)
+ fsp_notify_dummy(END_OF_FIRMWARE);
}
BOOT_STATE_INIT_ENTRY(BS_DEV_RESOURCES, BS_ON_EXIT, fsp_notify_dummy,
Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15029
-gerrit
commit 7697a97d2fa5bfff7f1f4ed43bc4ff74c22a90c9
Author: Vadim Bendebury <vbendeb(a)chromium.org>
Date: Sun May 22 15:53:37 2016 -0700
gru: kevin: define GPIOs used on both platforms
The same GPIOs are used on both platforms, definitions are added an a
new .h to make it easier to re-use them across the code.
BRANCH=none
BUG=chrome-os-partner:51537
TEST=panel backlight still enabled on Gru as before. The rest of the
GPIOs are used in the upcoming patches.
Change-Id: If06f4b33720ab4bf098d23fb91322bba23fe6e90
Signed-off-by: Martin Roth <martinroth(a)chromium.org>
Original-Commit-Id: c587880
Original-Change-Id: I1a6c5b5beb82ffcc5fea397e8e9ec2f183f4a7e0
Original-Signed-off-by: Vadim Bendebury <vbendeb(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/346219
Original-Tested-by: Shunqian Zheng <zhengsq(a)rock-chips.com>
---
src/mainboard/google/gru/board.h | 30 +++++++++++++++++++
src/mainboard/google/gru/mainboard.c | 56 ++++++++++++++++++++++++++++++++++++
2 files changed, 86 insertions(+)
diff --git a/src/mainboard/google/gru/board.h b/src/mainboard/google/gru/board.h
new file mode 100644
index 0000000..6d80cdf
--- /dev/null
+++ b/src/mainboard/google/gru/board.h
@@ -0,0 +1,30 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2016 Rockchip Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#ifndef __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H
+#define __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H
+
+#include <gpio.h>
+
+#define GPIO_BACKLIGHT GPIO(1, C, 1)
+#define GPIO_EC_IN_RW GPIO(3, B, 0)
+#define GPIO_EC_IRQ GPIO(0, A, 1)
+#define GPIO_RESET GPIO(0, B, 3)
+#define GPIO_WP GPIO(1, C, 2)
+
+void setup_chromeos_gpios(void);
+
+#endif /* ! __COREBOOT_SRC_MAINBOARD_GOOGLE_GRU_BOARD_H */
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index 6824cbf..1e0f1a8 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -21,6 +21,8 @@
#include <soc/emmc.h>
#include <soc/grf.h>
+#include "board.h"
+
static void configure_emmc(void)
{
/* Host controller does not support programmable clock generator.
@@ -86,10 +88,64 @@ static void configure_sdmmc(void)
write32(&rk3399_grf->iomux_sdmmc, IOMUX_SDMMC);
}
+static void configure_display(void)
+{
+ /* set pinmux for edp HPD*/
+ gpio_input_pulldown(GPIO(4, C, 7));
+ write32(&rk3399_grf->iomux_edp_hotplug, IOMUX_EDP_HOTPLUG);
+
+ gpio_output(GPIO(4, D, 3), 1); /* CPU3_EDP_VDDEN for P3.3V_DISP */
+}
+
static void mainboard_init(device_t dev)
{
configure_sdmmc();
configure_emmc();
+ configure_display();
+}
+
+static void enable_backlight_booster(void)
+{
+ const struct {
+ uint8_t reg;
+ uint8_t value;
+ } i2c_writes[] = {
+ {1, 0x84},
+ {1, 0x85},
+ {0, 0x26}
+ };
+ int i;
+ const int booster_i2c_port = 0;
+ uint8_t i2c_buf[2];
+ struct i2c_seg i2c_command = { .read = 0, .chip = 0x2c,
+ .buf = i2c_buf, .len = sizeof(i2c_buf)
+ };
+
+ /*
+ * This function is called on Gru right after BL_EN is asserted. It
+ * takes time for the switcher chip to come online, let's wait a bit
+ * to let the voltage settle, so that the chip can be accessed.
+ */
+ udelay(1000);
+
+ /* Select pinmux for i2c0, which is the display backlight booster. */
+ write32(&rk3399_pmugrf->iomux_i2c0_sda, IOMUX_I2C0_SDA);
+ write32(&rk3399_pmugrf->iomux_i2c0_scl, IOMUX_I2C0_SCL);
+ i2c_init(0, 100*KHz);
+
+ for (i = 0; i < ARRAY_SIZE(i2c_writes); i++) {
+ i2c_buf[0] = i2c_writes[i].reg;
+ i2c_buf[1] = i2c_writes[i].value;
+ i2c_transfer(booster_i2c_port, &i2c_command, 1);
+ }
+}
+
+void mainboard_power_on_backlight(void)
+{
+ gpio_output(GPIO(1, C, 1), 1); /* BL_EN */
+
+ if (IS_ENABLED(CONFIG_BOARD_GOOGLE_GRU))
+ enable_backlight_booster();
}
static void mainboard_enable(device_t dev)