coreboot-gerrit December 2016

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: lib: add region file support
by gerrit＠coreboot.org 08 Dec '16

08 Dec '16

the following patch was just integrated into master: commit cd0bc987be61313f40ab92707ed7574ae591dfc4 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Nov 19 12:36:09 2016 -0600 lib: add region file support The region file library is added to provide the underpinnings for other libraries that support appending updates when the data changes. The most recent written data is deemed the latest data associated with that "file". A good example is the MRC cache which in a follow-up patch utilizes this library. BUG=chrome-os-partner:56151 Change-Id: Ic3caf1edbb6f11dbbe27181a87b7b19d1224fffa Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://review.coreboot.org/17713 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan(a)google.com> See https://review.coreboot.org/17713 for details. -gerrit

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Patch merged into coreboot/master: lib/compute_ip_checksum: mark data buffer as const
by gerrit＠coreboot.org 08 Dec '16

08 Dec '16

the following patch was just integrated into master: commit 30c64be4ce1c3082c0dc0399ce0a5418698ad0cc Author: Aaron Durbin <adurbin(a)chromium.org> Date: Sat Dec 3 21:05:53 2016 -0600 lib/compute_ip_checksum: mark data buffer as const compute_ip_checksum() doesn't manipulate the data it is passed. Therefore, mark it as const. BUG=chrome-os-partner:56151 Change-Id: I54cff9695a886bacd6314aa441d96aaa7a991101 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-on: https://review.coreboot.org/17714 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See https://review.coreboot.org/17714 for details. -gerrit

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New patch to review for coreboot: 3rdparty/libgfxinit: Update to latest master
by Nico Huber 08 Dec '16

08 Dec '16

Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17775 -gerrit commit b1bb04ac6245dc6fa76541faf5e3183b0a63b1b9 Author: Nico Huber <nico.huber(a)secunet.com> Date: Thu Dec 8 16:01:54 2016 +0100 3rdparty/libgfxinit: Update to latest master Change-Id: Icbfdf5f37caf99f66847a71f784730aced0826ab Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- 3rdparty/libgfxinit | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/3rdparty/libgfxinit b/3rdparty/libgfxinit index 6a35667..88a7f17 160000 --- a/3rdparty/libgfxinit +++ b/3rdparty/libgfxinit @@ -1 +1 @@ -Subproject commit 6a3566773f3b52550ebf0d042154958a2403bb40 +Subproject commit 88a7f17b7d7a4f8a4d25ef6b87c71236b0862f5d

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Patch set updated for coreboot: drivers/intel/gma: Use scaling to simplify fb config
by Nico Huber 08 Dec '16

08 Dec '16

Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17492 -gerrit commit eb2b0eac8b49236aac600dda64a7d2536e84d504 Author: Nico Huber <nico.huber(a)secunet.com> Date: Tue Nov 8 12:29:50 2016 +0100 drivers/intel/gma: Use scaling to simplify fb config Utilize libgfxinit's support for scaling to simplify the framebuffer configuration. In case of multiple displays of different resolutions, we had configured one framebuffer big enough for their union, each display only showing its respective upper left window. Instead, we use the smallest resolution now and show the whole image on all displays. Change-Id: I70a9d92f88ef891703829945264f94ac7eff09b0 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- src/drivers/intel/gma/hires_fb/gma.adb | 29 +++++++++++------------------ 1 file changed, 11 insertions(+), 18 deletions(-) diff --git a/src/drivers/intel/gma/hires_fb/gma.adb b/src/drivers/intel/gma/hires_fb/gma.adb index 7ebc4f8..87e0900 100644 --- a/src/drivers/intel/gma/hires_fb/gma.adb +++ b/src/drivers/intel/gma/hires_fb/gma.adb @@ -59,9 +59,8 @@ is success : boolean; - stride : Width_Type; - max_h : pos16 := 1; - max_v : pos16 := 1; + min_h : pos16 := pos16'last; + min_v : pos16 := pos16'last; begin lightup_ok := 0; @@ -77,30 +76,24 @@ is for i in Config_Index loop exit when configs (i).Port = Disabled; - max_h := pos16'max (max_h, configs (i).Mode.H_Visible); - max_v := pos16'max (max_v, configs (i).Mode.V_Visible); + min_h := pos16'min (min_h, configs (i).Mode.H_Visible); + min_v := pos16'min (min_v, configs (i).Mode.V_Visible); end loop; - stride := ((Width_Type (max_h) + 63) / 64) * 64; + fb := + (Width => Width_Type (min_h), + Height => Height_Type (min_v), + BPC => 8, + Stride => ((Width_Type (min_h) + 63) / 64) * 64, + Offset => 0); for i in Config_Index loop exit when configs (i).Port = Disabled; - configs (i).Framebuffer := - (Width => Width_Type (configs (i).Mode.H_Visible), - Height => Height_Type (configs (i).Mode.V_Visible), - BPC => 8, - Stride => stride, - Offset => 0); + configs (i).Framebuffer := fb; end loop; HW.GFX.GMA.Dump_Configs (configs); - fb := - (Width => Width_Type (max_h), - Height => Height_Type (max_v), - BPC => 8, - Stride => stride, - Offset => 0); HW.GFX.GMA.Setup_Default_GTT (fb, phys_fb); HW.GFX.Framebuffer_Filler.Fill (linear_fb, fb);

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Patch set updated for coreboot: drivers/intel/gma: Add textmode support with libgfxinit
by Nico Huber 08 Dec '16

08 Dec '16

Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17279 -gerrit commit 4f7f5614dbf3e956dadcd9747ea153b2c48f08df Author: Nico Huber <nico.huber(a)secunet.com> Date: Mon Nov 7 17:24:47 2016 +0100 drivers/intel/gma: Add textmode support with libgfxinit Add an alternative gfxinit implementation for textmode. The legacy VGA plane and textmode is configured through coreboot provided functions. libgfxinit uses this plane as alternative to the usual high resolution plane. Change-Id: Iad0754c50fc6faec35f49583fe1c7cb50ac6c0c5 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- src/device/Kconfig | 1 + src/drivers/intel/gma/Makefile.inc | 6 +- src/drivers/intel/gma/gma.adb | 117 --------------------------------- src/drivers/intel/gma/hires_fb/gma.adb | 117 +++++++++++++++++++++++++++++++++ src/drivers/intel/gma/text_fb/gma.adb | 75 +++++++++++++++++++++ 5 files changed, 198 insertions(+), 118 deletions(-) diff --git a/src/device/Kconfig b/src/device/Kconfig index fb0aaba..4bf1957 100644 --- a/src/device/Kconfig +++ b/src/device/Kconfig @@ -45,6 +45,7 @@ config MAINBOARD_DO_NATIVE_VGA_INIT config MAINBOARD_HAS_LIBGFXINIT def_bool n select MAINBOARD_HAS_NATIVE_VGA_INIT + select MAINBOARD_HAS_NATIVE_VGA_INIT_TEXTMODECFG help Selected by mainboards that implement support for `libgfxinit`. Usually this requires a list of ports to be probed for displays. diff --git a/src/drivers/intel/gma/Makefile.inc b/src/drivers/intel/gma/Makefile.inc index a4e007c..d4d6c08 100644 --- a/src/drivers/intel/gma/Makefile.inc +++ b/src/drivers/intel/gma/Makefile.inc @@ -40,6 +40,10 @@ CONFIG_GFX_GMA_DEFAULT_MMIO := 0 # dummy, will be overwritten at runtime subdirs-y += ../../../../3rdparty/libgfxinit ramstage-y += gma.ads -ramstage-y += gma.adb +ifeq ($(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE),y) +ramstage-y += hires_fb/gma.adb +else +ramstage-y += text_fb/gma.adb +endif endif # CONFIG_MAINBOARD_USE_LIBGFXINIT diff --git a/src/drivers/intel/gma/gma.adb b/src/drivers/intel/gma/gma.adb deleted file mode 100644 index 7ebc4f8..0000000 --- a/src/drivers/intel/gma/gma.adb +++ /dev/null @@ -1,117 +0,0 @@ -with HW.GFX; -with HW.GFX.Framebuffer_Filler; -with HW.GFX.GMA; - -use HW.GFX; -use HW.GFX.GMA; - -with GMA.Mainboard; - -package body GMA -is - - vbe_valid : boolean := false; - - linear_fb_addr : word64; - - fb : Framebuffer_Type; - - function vbe_mode_info_valid return Interfaces.C.int - is - begin - return (if vbe_valid then 1 else 0); - end vbe_mode_info_valid; - - procedure fill_lb_framebuffer (framebuffer : out lb_framebuffer) - is - use type word32; - begin - framebuffer := - (tag => 0, - size => 0, - physical_address => linear_fb_addr, - x_resolution => word32 (fb.Width), - y_resolution => word32 (fb.Height), - bytes_per_line => 4 * word32 (fb.Stride), - bits_per_pixel => 32, - reserved_mask_pos => 24, - reserved_mask_size => 8, - red_mask_pos => 16, - red_mask_size => 8, - green_mask_pos => 8, - green_mask_size => 8, - blue_mask_pos => 0, - blue_mask_size => 8); - end fill_lb_framebuffer; - - ---------------------------------------------------------------------------- - - procedure gfxinit - (mmio_base : in word64; - linear_fb : in word64; - phys_fb : in word32; - lightup_ok : out Interfaces.C.int) - is - use type pos32; - - ports : Port_List; - configs : Configs_Type; - - success : boolean; - - stride : Width_Type; - max_h : pos16 := 1; - max_v : pos16 := 1; - begin - lightup_ok := 0; - - HW.GFX.GMA.Initialize - (MMIO_Base => mmio_base, - Success => success); - - if success then - ports := Mainboard.ports; - HW.GFX.GMA.Scan_Ports (configs, ports); - - if configs (Primary).Port /= Disabled then - for i in Config_Index loop - exit when configs (i).Port = Disabled; - - max_h := pos16'max (max_h, configs (i).Mode.H_Visible); - max_v := pos16'max (max_v, configs (i).Mode.V_Visible); - end loop; - - stride := ((Width_Type (max_h) + 63) / 64) * 64; - for i in Config_Index loop - exit when configs (i).Port = Disabled; - - configs (i).Framebuffer := - (Width => Width_Type (configs (i).Mode.H_Visible), - Height => Height_Type (configs (i).Mode.V_Visible), - BPC => 8, - Stride => stride, - Offset => 0); - end loop; - - HW.GFX.GMA.Dump_Configs (configs); - - fb := - (Width => Width_Type (max_h), - Height => Height_Type (max_v), - BPC => 8, - Stride => stride, - Offset => 0); - HW.GFX.GMA.Setup_Default_GTT (fb, phys_fb); - HW.GFX.Framebuffer_Filler.Fill (linear_fb, fb); - - HW.GFX.GMA.Update_Outputs (configs); - - linear_fb_addr := linear_fb; - vbe_valid := true; - - lightup_ok := 1; - end if; - end if; - end gfxinit; - -end GMA; diff --git a/src/drivers/intel/gma/hires_fb/gma.adb b/src/drivers/intel/gma/hires_fb/gma.adb new file mode 100644 index 0000000..7ebc4f8 --- /dev/null +++ b/src/drivers/intel/gma/hires_fb/gma.adb @@ -0,0 +1,117 @@ +with HW.GFX; +with HW.GFX.Framebuffer_Filler; +with HW.GFX.GMA; + +use HW.GFX; +use HW.GFX.GMA; + +with GMA.Mainboard; + +package body GMA +is + + vbe_valid : boolean := false; + + linear_fb_addr : word64; + + fb : Framebuffer_Type; + + function vbe_mode_info_valid return Interfaces.C.int + is + begin + return (if vbe_valid then 1 else 0); + end vbe_mode_info_valid; + + procedure fill_lb_framebuffer (framebuffer : out lb_framebuffer) + is + use type word32; + begin + framebuffer := + (tag => 0, + size => 0, + physical_address => linear_fb_addr, + x_resolution => word32 (fb.Width), + y_resolution => word32 (fb.Height), + bytes_per_line => 4 * word32 (fb.Stride), + bits_per_pixel => 32, + reserved_mask_pos => 24, + reserved_mask_size => 8, + red_mask_pos => 16, + red_mask_size => 8, + green_mask_pos => 8, + green_mask_size => 8, + blue_mask_pos => 0, + blue_mask_size => 8); + end fill_lb_framebuffer; + + ---------------------------------------------------------------------------- + + procedure gfxinit + (mmio_base : in word64; + linear_fb : in word64; + phys_fb : in word32; + lightup_ok : out Interfaces.C.int) + is + use type pos32; + + ports : Port_List; + configs : Configs_Type; + + success : boolean; + + stride : Width_Type; + max_h : pos16 := 1; + max_v : pos16 := 1; + begin + lightup_ok := 0; + + HW.GFX.GMA.Initialize + (MMIO_Base => mmio_base, + Success => success); + + if success then + ports := Mainboard.ports; + HW.GFX.GMA.Scan_Ports (configs, ports); + + if configs (Primary).Port /= Disabled then + for i in Config_Index loop + exit when configs (i).Port = Disabled; + + max_h := pos16'max (max_h, configs (i).Mode.H_Visible); + max_v := pos16'max (max_v, configs (i).Mode.V_Visible); + end loop; + + stride := ((Width_Type (max_h) + 63) / 64) * 64; + for i in Config_Index loop + exit when configs (i).Port = Disabled; + + configs (i).Framebuffer := + (Width => Width_Type (configs (i).Mode.H_Visible), + Height => Height_Type (configs (i).Mode.V_Visible), + BPC => 8, + Stride => stride, + Offset => 0); + end loop; + + HW.GFX.GMA.Dump_Configs (configs); + + fb := + (Width => Width_Type (max_h), + Height => Height_Type (max_v), + BPC => 8, + Stride => stride, + Offset => 0); + HW.GFX.GMA.Setup_Default_GTT (fb, phys_fb); + HW.GFX.Framebuffer_Filler.Fill (linear_fb, fb); + + HW.GFX.GMA.Update_Outputs (configs); + + linear_fb_addr := linear_fb; + vbe_valid := true; + + lightup_ok := 1; + end if; + end if; + end gfxinit; + +end GMA; diff --git a/src/drivers/intel/gma/text_fb/gma.adb b/src/drivers/intel/gma/text_fb/gma.adb new file mode 100644 index 0000000..bbb6d74 --- /dev/null +++ b/src/drivers/intel/gma/text_fb/gma.adb @@ -0,0 +1,75 @@ +with HW.GFX; +with HW.GFX.GMA; + +use HW.GFX; +use HW.GFX.GMA; + +with GMA.Mainboard; + +package body GMA +is + + function vbe_mode_info_valid return Interfaces.C.int + is + begin + return 0; + end vbe_mode_info_valid; + + procedure fill_lb_framebuffer (framebuffer : out lb_framebuffer) + is + begin + null; + end fill_lb_framebuffer; + + ---------------------------------------------------------------------------- + + procedure gfxinit + (mmio_base : in word64; + linear_fb : in word64; + phys_fb : in word32; + lightup_ok : out Interfaces.C.int) + is + ports : Port_List; + configs : Configs_Type; + + success : boolean; + + -- from pc80/vga driver + procedure vga_io_init; + pragma Import (C, vga_io_init, "vga_io_init"); + procedure vga_textmode_init; + pragma Import (C, vga_textmode_init, "vga_textmode_init"); + begin + lightup_ok := 0; + + HW.GFX.GMA.Initialize + (MMIO_Base => mmio_base, + Success => success); + + if success then + ports := Mainboard.ports; + HW.GFX.GMA.Scan_Ports + (Configs => configs, + Ports => ports, + Max_Pipe => Primary); + + if configs (Primary).Port /= Disabled then + vga_io_init; + vga_textmode_init; + + configs (Primary).Framebuffer := + (Width => 640, + Height => 400, + BPC => Auto_BPC, -- ignored for VGA plane + Stride => 320, -- ignored + Offset => VGA_PLANE_FRAMEBUFFER_OFFSET); + + HW.GFX.GMA.Dump_Configs (configs); + HW.GFX.GMA.Update_Outputs (configs); + + lightup_ok := 1; + end if; + end if; + end gfxinit; + +end GMA;

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Patch merged into coreboot/master: google/beltino, tidus: simplify led_power_on() function
by gerrit＠coreboot.org 08 Dec '16

08 Dec '16

the following patch was just integrated into master: commit 7c6951b059b9a7c36486a73f656ad8a88f648626 Author: Matt DeVillier <matt.devillier(a)gmail.com> Date: Tue Dec 6 17:59:23 2016 -0600 google/beltino, tidus: simplify led_power_on() function Simplify set_power_led() by consolidating switch and setting values as needed inline based on LED state. Remove unnecesary function param, includes for Tidus. Change-Id: I28e6fac5f8d7e2ff419002db714ce88697895faf Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/17744 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h(a)gmx.de> See https://review.coreboot.org/17744 for details. -gerrit

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Patch set updated for coreboot: soc/intel/apollolake: Set PL2 in RAPL register
by Sumeet R Pawnikar 08 Dec '16

08 Dec '16

Sumeet R Pawnikar (sumeet.r.pawnikar(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17699 -gerrit commit 0a6948294248ee9c4e7d4a1e832ab5a078466eed Author: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> Date: Fri Dec 2 18:14:19 2016 +0530 soc/intel/apollolake: Set PL2 in RAPL register This patch sets the package power limit (PL2) value in RAPL register. BUG=chrome-os-partner:60535 TEST=Built, booted on reef and verified PL2 value. Change-Id: I83fe854cf3e9fc92ab87f84b86e64ebb6085065f Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- src/soc/intel/apollolake/chip.c | 23 ++++++++++++++++------- src/soc/intel/apollolake/chip.h | 2 ++ 2 files changed, 18 insertions(+), 7 deletions(-) diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 32d68cc..4c405c9 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -202,6 +202,7 @@ static void set_power_limits(void) msr_t rapl_msr_reg, limit; uint32_t power_unit; uint32_t tdp, min_power, max_power; + uint32_t pl2_val; uint32_t *rapl_mmio_reg; if (!dev || !dev->chip_info) { @@ -218,6 +219,7 @@ static void set_power_limits(void) /* Get power defaults for this SKU */ rapl_msr_reg = rdmsr(MSR_PKG_POWER_SKU); tdp = rapl_msr_reg.lo & PKG_POWER_LIMIT_MASK; + pl2_val = rapl_msr_reg.hi & PKG_POWER_LIMIT_MASK; min_power = (rapl_msr_reg.lo >> 16) & PKG_POWER_LIMIT_MASK; max_power = rapl_msr_reg.hi & PKG_POWER_LIMIT_MASK; @@ -230,12 +232,12 @@ static void set_power_limits(void) /* Set PL1 override value */ tdp = (cfg->tdp_pl1_override_mw == 0) ? tdp : (cfg->tdp_pl1_override_mw * power_unit) / 1000; + /* Set PL2 override value */ + pl2_val = (cfg->tdp_pl2_override_mw == 0) ? + pl2_val : (cfg->tdp_pl2_override_mw * power_unit) / 1000; /* Set long term power limit to TDP */ limit.lo = tdp & PKG_POWER_LIMIT_MASK; - /* PL2 is invalid for small core */ - limit.hi = 0x0; - /* Set PL1 Pkg Power clamp bit */ limit.lo |= PKG_POWER_LIMIT_CLAMP; @@ -243,18 +245,25 @@ static void set_power_limits(void) limit.lo |= (MB_POWER_LIMIT1_TIME_DEFAULT & PKG_POWER_LIMIT_TIME_MASK) << PKG_POWER_LIMIT_TIME_SHIFT; + /* Set short term power limit PL2 */ + limit.hi = pl2_val & PKG_POWER_LIMIT_MASK; + limit.hi |= PKG_POWER_LIMIT_EN; + /* Program package power limits in RAPL MSR */ wrmsr(MSR_PKG_POWER_LIMIT, limit); printk(BIOS_INFO, "RAPL PL1 %d.%dW\n", tdp / power_unit, 100 * (tdp % power_unit) / power_unit); + printk(BIOS_INFO, "RAPL PL2 %d.%dW\n", pl2_val / power_unit, + 100 * (pl2_val % power_unit) / power_unit); /* Get the MMIO address */ rapl_mmio_reg = (void *)(uintptr_t) (MCH_BASE_ADDR + MCHBAR_RAPL_PPL); - /* - * Disable RAPL MMIO PL1 Power limits because RAPL uses MSR value. - * PL2 (limit.hi) is invalid for small cores - */ + + /* Setting RAPL MMIO register for Power limits. + * RAPL driver is using MSR instead of MMIO. + * So, disabled LIMIT_EN bit for MMIO. */ write32(rapl_mmio_reg, limit.lo & ~(PKG_POWER_LIMIT_EN)); + write32(rapl_mmio_reg + 1, limit.hi & ~(PKG_POWER_LIMIT_EN)); } static void soc_init(void *data) diff --git a/src/soc/intel/apollolake/chip.h b/src/soc/intel/apollolake/chip.h index dd30106..5f8fed9 100644 --- a/src/soc/intel/apollolake/chip.h +++ b/src/soc/intel/apollolake/chip.h @@ -100,6 +100,8 @@ struct soc_intel_apollolake_config { /* PL1 override value in mW for APL */ uint16_t tdp_pl1_override_mw; + /* PL2 override value in mW for APL */ + uint16_t tdp_pl2_override_mw; /* Configure Audio clk gate and power gate * IOSF-SB port ID 92 offset 0x530 [5] and [3]

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New patch to review for coreboot: [NOTFORMERGE] Kconfig: Do not build SMBIOS table by default
by Paul Menzel 08 Dec '16

08 Dec '16

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17774 -gerrit commit 1a9e8b244b34c5147f7252e8ac032a9e15861dd8 Author: Paul Menzel <pmenzel(a)molgen.mpg.de> Date: Thu Dec 8 13:22:44 2016 +0100 [NOTFORMERGE] Kconfig: Do not build SMBIOS table by default This is for build testing the code. Change-Id: I9695ed9e2bf0ccb1bf1e1cf5bf6e7eef3e772fe2 Signed-off-by: Paul Menzel <pmenzel(a)molgen.mpg.de> --- src/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/Kconfig b/src/Kconfig index a22a2b3..154ecb4 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -757,7 +757,7 @@ config GENERATE_PIRQ_TABLE config GENERATE_SMBIOS_TABLES depends on ARCH_X86 bool "Generate SMBIOS tables" - default y + default n help Generate SMBIOS tables for this board.

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Patch merged into coreboot/master: drivers/r8168: Read default MAC address from CBFS
by gerrit＠coreboot.org 08 Dec '16

08 Dec '16

the following patch was just integrated into master: commit f5dd23f954d0de1295bd403f641223e1f79af153 Author: Damien Zammit <damien(a)zamaudio.com> Date: Thu Dec 1 23:29:34 2016 +1100 drivers/r8168: Read default MAC address from CBFS This driver applies to 10ec:8168 Previously, this driver resetted the nic and set a hardcoded MAC address. Now the driver reads a default MAC address from CBFS in the form of a string: echo -n "xx:xx:xx:xx:xx:xx" > macaddress and store the macaddress file in CBFS with the same name. TESTED on GA-G41M-ES2L and GA-945GCM-S2L: MAC address was detected Change-Id: If1af91120fa3efca3f1406334a83ed1e59fbdaf9 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> Reviewed-on: https://review.coreboot.org/17672 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> See https://review.coreboot.org/17672 for details. -gerrit

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Patch set updated for coreboot: drivers/r8168: Read default MAC address from CBFS
by Damien Zammit 08 Dec '16

08 Dec '16

Damien Zammit (damien(a)zamaudio.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17672 -gerrit commit 02889cabf78fc5c6026753637a5b61b26de791bd Author: Damien Zammit <damien(a)zamaudio.com> Date: Thu Dec 1 23:29:34 2016 +1100 drivers/r8168: Read default MAC address from CBFS This driver applies to 10ec:8168 Previously, this driver resetted the nic and set a hardcoded MAC address. Now the driver reads a default MAC address from CBFS in the form of a string: echo -n "xx:xx:xx:xx:xx:xx" > macaddress and store the macaddress file in CBFS with the same name. TESTED on GA-G41M-ES2L and GA-945GCM-S2L: MAC address was detected Change-Id: If1af91120fa3efca3f1406334a83ed1e59fbdaf9 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> --- src/drivers/net/r8168.c | 119 +++++++++++++++++++++++++++++++++++++----------- 1 file changed, 93 insertions(+), 26 deletions(-) diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 1e6db57..90171d5 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2012 Google Inc. * Copyright (C) 2016 Damien Zammit <damien(a)zamaudio.com> * * This program is free software; you can redistribute it and/or modify @@ -14,11 +15,14 @@ */ /* - * This driver forces the 10ec:8168 device to reset so that it goes - * into a proper power state, also programs a default MAC address + * This driver resets the 10ec:8168 NIC then tries to read + * "macaddress" string XX:XX:XX:XX:XX:XX from CBFS. + * If no MAC is found, it programs a default MAC address in the device * so that if the EEPROM/efuse is unconfigured it still has a default MAC. */ +#include <cbfs.h> +#include <string.h> #include <arch/io.h> #include <device/device.h> #include <device/pci.h> @@ -36,26 +40,70 @@ #define CFG_9346_LOCK 0x00 #define CFG_9346_UNLOCK 0xc0 -static void r8168_init(struct device *dev) +static u8 get_hex_digit(const u8 c) { - u32 i; - const u8 mac[6] = { 0x00, 0xe0, 0x4c, 0x00, 0xc0, 0xb0 }; + u8 ret = 0; - /* Get the resource of the NIC mmio */ - struct resource *nic_res = find_resource(dev, PCI_BASE_ADDRESS_0); - u16 nic_port = (u16)nic_res->base; + ret = c - '0'; + if (ret > 0x09) { + ret = c - 'A' + 0x0a; + if (ret > 0x0f) + ret = c - 'a' + 0x0a; + } + if (ret > 0x0f) { + printk(BIOS_DEBUG, "Error: Invalid hex digit found: " + "%c - 0x%02x\n", (char)c, c); + ret = 0; + } + return ret; +} - /* Ensble but do not set bus master. That's dangerous on a NIC. */ - pci_write_config16(dev, PCI_COMMAND, - PCI_COMMAND_MEMORY | PCI_COMMAND_IO); +static void get_mac_address(u8 *macaddr, const u8 *strbuf) +{ + size_t offset = 0; + int i; + + if ( (strbuf[2] != ':') || (strbuf[5] != ':') || + (strbuf[8] != ':') || (strbuf[11] != ':') || + (strbuf[14] != ':') ) { + printk(BIOS_ERR, "r8168: ignore invalid MAC address in cbfs\n"); + return; + } + + for (i = 0; i < 6; i++) { + macaddr[i] = 0; + macaddr[i] |= get_hex_digit(strbuf[offset]) << 4; + macaddr[i] |= get_hex_digit(strbuf[offset + 1]); + offset += 3; + } +} + +#define MACLEN 17 + +static void program_mac_address(struct device *dev, u16 io_base) +{ + struct cbfsf fh; + uint32_t matchraw = CBFS_TYPE_RAW; + u8 macstrbuf[MACLEN] = { 0 }; + int i = 0; + u8 mac[6] = { 0x00, 0xe0, 0x4c, 0x00, 0xc0, 0xb0 }; + + if (!cbfs_boot_locate(&fh, "macaddress", &matchraw)) { + if (rdev_readat(&fh.data, macstrbuf, 0, MACLEN) == MACLEN) + get_mac_address(mac, macstrbuf); + else + printk(BIOS_ERR, "r8168: Error reading MAC from CBFS\n"); + } else { + printk(BIOS_ERR, "r8168: 'macaddress' not found in CBFS, " + "using default 00:e0:4c:00:c0:b0\n"); + } /* Reset NIC */ printk(BIOS_DEBUG, "r8168: Resetting NIC..."); - outb(CMD_REG_RESET, nic_port + CMD_REG); + outb(CMD_REG_RESET, io_base + CMD_REG); - i = 0; - /* Poll for reset, with 1s timeout */ - while (i < NIC_TIMEOUT && (inb(nic_port + CMD_REG) & CMD_REG_RESET)) { + /* Poll for reset, with 1sec timeout */ + while (i < NIC_TIMEOUT && (inb(io_base + CMD_REG) & CMD_REG_RESET)) { udelay(1000); if (++i >= NIC_TIMEOUT) printk(BIOS_DEBUG, "timeout waiting for nic to reset\n"); @@ -63,20 +111,39 @@ static void r8168_init(struct device *dev) if (i < NIC_TIMEOUT) printk(BIOS_DEBUG, "done\n"); - /* Unlock config regs */ - outb(CFG_9346_UNLOCK, nic_port + CFG_9346); + printk(BIOS_DEBUG, "r8168: Programming MAC Address..."); - /* Set MAC address 00:e0:4c:00:c0:b0 - * NB: only 4-byte write accesses allowed - */ - outl(mac[4] | mac[5] << 8, nic_port + 4); - inl(nic_port + 4); - - outl(mac[0] | mac[1] << 8 | mac[2] << 16 | mac[3] << 24, nic_port); - inl(nic_port); + /* Disable register protection */ + outb(CFG_9346_UNLOCK, io_base + CFG_9346); + /* Set MAC address: only 4-byte write accesses allowed */ + outl(mac[4] | mac[5] << 8, io_base + 4); + inl(io_base + 4); + outl(mac[0] | mac[1] << 8 | mac[2] << 16 | mac[3] << 24, + io_base); + inl(io_base); /* Lock config regs */ - outb(CFG_9346_LOCK, nic_port + CFG_9346); + outb(CFG_9346_LOCK, io_base + CFG_9346); + + printk(BIOS_DEBUG, "done\n"); +} + +static void r8168_init(struct device *dev) +{ + /* Get the resource of the NIC mmio */ + struct resource *nic_res = find_resource(dev, PCI_BASE_ADDRESS_0); + u16 io_base = (u16)nic_res->base; + + /* Enable but do not set bus master */ + pci_write_config16(dev, PCI_COMMAND, + PCI_COMMAND_MEMORY | PCI_COMMAND_IO); + + /* Program MAC address based on CBFS "macaddress" containing + * a string AA:BB:CC:DD:EE:FF */ + if (io_base) + program_mac_address(dev, io_base); + else + printk(BIOS_DEBUG, "r8168: Error cant find MMIO resource\n"); } static struct device_operations r8168_ops = {

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coreboot-gerrit December 2016