coreboot-gerrit December 2016

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: google/pyro: Set PL2 override to 15000mW
by Kevin Chiu 09 Dec '16

09 Dec '16

Kevin Chiu (Kevin.Chiu(a)quantatw.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17779 -gerrit commit de8a725ebdd45b174dcf1751ad297a498d13a763 Author: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Date: Fri Dec 9 11:42:05 2016 +0800 google/pyro: Set PL2 override to 15000mW This patch sets PL2 override value to 15W in RAPL registers and sets DPTF PL2 Max to 15W BUG=none BRANCH=reef TEST=emerge-pyro coreboot Change-Id: Ibadf0fa442f556d018c249b1cf88e29c4d57c97f Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com> --- src/mainboard/google/reef/variants/pyro/devicetree.cb | 2 ++ src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl | 2 +- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/reef/variants/pyro/devicetree.cb b/src/mainboard/google/reef/variants/pyro/devicetree.cb index b5e050e..bc06bbb 100644 --- a/src/mainboard/google/reef/variants/pyro/devicetree.cb +++ b/src/mainboard/google/reef/variants/pyro/devicetree.cb @@ -53,6 +53,8 @@ chip soc/intel/apollolake # current VR solution. Experiments show that SoC TDP max (6W) can # be reached when RAPL PL1 is set to 12W. register "tdp_pl1_override_mw" = "12000" + # Set RAPL PL2 to 15W. + register "tdp_pl2_override_mw" = "15000" # Enable Audio Clock and Power gating register "hdaudio_clk_gate_enable" = "1" diff --git a/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl b/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl index 7e2f31c..f14999c 100644 --- a/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/reef/variants/pyro/include/variant/acpi/dptf.asl @@ -81,7 +81,7 @@ Name (MPPC, Package () Package () { /* Power Limit 2 */ 1, /* PowerLimitIndex, 1 for Power Limit 2 */ 6000, /* PowerLimitMinimum */ - 8000, /* PowerLimitMaximum */ + 15000, /* PowerLimitMaximum */ 1000, /* TimeWindowMinimum */ 1000, /* TimeWindowMaximum */ 1000 /* StepSize */

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New patch to review for coreboot: abuild: Remove space before tab
by Paul Menzel 09 Dec '16

09 Dec '16

Paul Menzel (paulepanter(a)users.sourceforge.net) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17778 -gerrit commit 76471d95409b910f2a78534656ebfb506ea61ea1 Author: Paul Menzel <paulepanter(a)users.sourceforge.net> Date: Fri Dec 9 08:47:45 2016 +0100 abuild: Remove space before tab Fix up commit 26174c97 (abuild: Build saved config files) unintentionally adding a space before a tabulator. Change-Id: Ic51dee6ed9d640335c2bde5bd5dfad3691c505e0 Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net> --- util/abuild/abuild | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/abuild/abuild b/util/abuild/abuild index 300921a..2a20327 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -374,7 +374,7 @@ function build_config return fi - export HOSTCC='gcc' + export HOSTCC='gcc' if [ "$chromeos" = true ] && [ "$(grep -c "^[[:space:]]*select[[:space:]]*MAINBOARD_HAS_CHROMEOS\>" "${ROOT}/src/mainboard/${board_srcdir}/Kconfig")" -eq 0 ]; then echo "${BUILD_NAME} doesn't support Chrome OS, skipping."

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Patch set updated for coreboot: veyron_*: Add new Micron and Hynix modules
by David Hendricks 09 Dec '16

09 Dec '16

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17777 -gerrit commit 9adc31ef87ba774396250f4ddb712fd5643b04f7 Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Dec 8 20:47:00 2016 -0800 veyron_*: Add new Micron and Hynix modules This adds SDRAM entries for the following modules: - Micron: DDMT52L256M64D2PP-107 - Hynix: H9CCNNNBKTALBR-NUD They are compatible with Samsung K4E8E324EB-EGCF, so this just copies sdram-lpddr3-samsung-2GB-24EB.inc and changes the name used in the comment near the top. Notes on our "special snowflake" boards: - Rialto's SDRAM mapping is different, so I padded its SDRAM entries to 24 (to match other boards). BUG=chrome-os-partner:59997 BRANCH=none TEST=Booted new modules on Mickey (see BUG) Change-Id: I2e672ba7a63804fbb279f64e1750edf73341edf1 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/mainboard/google/veyron/boardid.c | 2 +- src/mainboard/google/veyron/sdram_configs.c | 8 +++ .../veyron/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc | 78 ++++++++++++++++++++++ .../sdram_inf/sdram-lpddr3-micron-2GB-D2.inc | 78 ++++++++++++++++++++++ src/mainboard/google/veyron_mickey/boardid.c | 2 +- src/mainboard/google/veyron_mickey/sdram_configs.c | 8 +++ .../sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc | 78 ++++++++++++++++++++++ .../sdram_inf/sdram-lpddr3-micron-2GB-D2.inc | 78 ++++++++++++++++++++++ src/mainboard/google/veyron_rialto/boardid.c | 2 +- src/mainboard/google/veyron_rialto/sdram_configs.c | 8 +++ 10 files changed, 339 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/veyron/boardid.c b/src/mainboard/google/veyron/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron/boardid.c +++ b/src/mainboard/google/veyron/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */ - code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code); return code; diff --git a/src/mainboard/google/veyron/sdram_configs.c b/src/mainboard/google/veyron/sdram_configs.c index 76e4f76..a9f458e 100644 --- a/src/mainboard/google/veyron/sdram_configs.c +++ b/src/mainboard/google/veyron/sdram_configs.c @@ -37,6 +37,14 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */ #include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */ #include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ }; const struct rk3288_sdram_params *get_sdram_config() diff --git a/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc b/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc new file mode 100644 index 0000000..8737bd3 --- /dev/null +++ b/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc @@ -0,0 +1,78 @@ +{ + /* 2 Hynix H9CCNNNBKTALBR-NUD chips */ + { + { + .rank = 0x1, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xF, + .cs1_row = 0xF + }, + { + .rank = 0x1, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xF, + .cs1_row = 0xF + } + }, + { + .togcnt1u = 0x215, + .tinit = 0xC8, + .trsth = 0x0, + .togcnt100n = 0x35, + .trefi = 0x26, + .tmrd = 0x2, + .trfc = 0x70, + .trp = 0x2000D, + .trtw = 0x6, + .tal = 0x0, + .tcl = 0x8, + .tcwl = 0x4, + .tras = 0x17, + .trc = 0x24, + .trcd = 0xD, + .trrd = 0x6, + .trtp = 0x4, + .twr = 0x8, + .twtr = 0x4, + .texsr = 0x76, + .txp = 0x4, + .txpdll = 0x0, + .tzqcs = 0x30, + .tzqcsi = 0x0, + .tdqs = 0x1, + .tcksre = 0x2, + .tcksrx = 0x2, + .tcke = 0x4, + .tmod = 0x0, + .trstl = 0x0, + .tzqcl = 0xC0, + .tmrr = 0x4, + .tckesr = 0x8, + .tdpd = 0x1F4 + }, + { + .dtpr0 = 0x48D7DD93, + .dtpr1 = 0x187008D8, + .dtpr2 = 0x121076, + .mr[0] = 0x0, + .mr[1] = 0xC3, + .mr[2] = 0x6, + .mr[3] = 0x1 + }, + .noc_timing = 0x20D266A4, + .noc_activate = 0x5B6, + .ddrconfig = 3, + .ddr_freq = 533*MHz, + .dramtype = LPDDR3, + .num_channels = 2, + .stride = 9, + .odt = 0, +}, diff --git a/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-micron-2GB-D2.inc b/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-micron-2GB-D2.inc new file mode 100644 index 0000000..179cf5b --- /dev/null +++ b/src/mainboard/google/veyron/sdram_inf/sdram-lpddr3-micron-2GB-D2.inc @@ -0,0 +1,78 @@ +{ + /* 2 Micron DDMT52L256M64D2PP-107 chips */ + { + { + .rank = 0x1, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xF, + .cs1_row = 0xF + }, + { + .rank = 0x1, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xF, + .cs1_row = 0xF + } + }, + { + .togcnt1u = 0x215, + .tinit = 0xC8, + .trsth = 0x0, + .togcnt100n = 0x35, + .trefi = 0x26, + .tmrd = 0x2, + .trfc = 0x70, + .trp = 0x2000D, + .trtw = 0x6, + .tal = 0x0, + .tcl = 0x8, + .tcwl = 0x4, + .tras = 0x17, + .trc = 0x24, + .trcd = 0xD, + .trrd = 0x6, + .trtp = 0x4, + .twr = 0x8, + .twtr = 0x4, + .texsr = 0x76, + .txp = 0x4, + .txpdll = 0x0, + .tzqcs = 0x30, + .tzqcsi = 0x0, + .tdqs = 0x1, + .tcksre = 0x2, + .tcksrx = 0x2, + .tcke = 0x4, + .tmod = 0x0, + .trstl = 0x0, + .tzqcl = 0xC0, + .tmrr = 0x4, + .tckesr = 0x8, + .tdpd = 0x1F4 + }, + { + .dtpr0 = 0x48D7DD93, + .dtpr1 = 0x187008D8, + .dtpr2 = 0x121076, + .mr[0] = 0x0, + .mr[1] = 0xC3, + .mr[2] = 0x6, + .mr[3] = 0x1 + }, + .noc_timing = 0x20D266A4, + .noc_activate = 0x5B6, + .ddrconfig = 3, + .ddr_freq = 533*MHz, + .dramtype = LPDDR3, + .num_channels = 2, + .stride = 9, + .odt = 0, +}, diff --git a/src/mainboard/google/veyron_mickey/boardid.c b/src/mainboard/google/veyron_mickey/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron_mickey/boardid.c +++ b/src/mainboard/google/veyron_mickey/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */ - code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code); return code; diff --git a/src/mainboard/google/veyron_mickey/sdram_configs.c b/src/mainboard/google/veyron_mickey/sdram_configs.c index 76e4f76..a9f458e 100644 --- a/src/mainboard/google/veyron_mickey/sdram_configs.c +++ b/src/mainboard/google/veyron_mickey/sdram_configs.c @@ -37,6 +37,14 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */ #include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */ #include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ }; const struct rk3288_sdram_params *get_sdram_config() diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc new file mode 100644 index 0000000..8737bd3 --- /dev/null +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc @@ -0,0 +1,78 @@ +{ + /* 2 Hynix H9CCNNNBKTALBR-NUD chips */ + { + { + .rank = 0x1, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xF, + .cs1_row = 0xF + }, + { + .rank = 0x1, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xF, + .cs1_row = 0xF + } + }, + { + .togcnt1u = 0x215, + .tinit = 0xC8, + .trsth = 0x0, + .togcnt100n = 0x35, + .trefi = 0x26, + .tmrd = 0x2, + .trfc = 0x70, + .trp = 0x2000D, + .trtw = 0x6, + .tal = 0x0, + .tcl = 0x8, + .tcwl = 0x4, + .tras = 0x17, + .trc = 0x24, + .trcd = 0xD, + .trrd = 0x6, + .trtp = 0x4, + .twr = 0x8, + .twtr = 0x4, + .texsr = 0x76, + .txp = 0x4, + .txpdll = 0x0, + .tzqcs = 0x30, + .tzqcsi = 0x0, + .tdqs = 0x1, + .tcksre = 0x2, + .tcksrx = 0x2, + .tcke = 0x4, + .tmod = 0x0, + .trstl = 0x0, + .tzqcl = 0xC0, + .tmrr = 0x4, + .tckesr = 0x8, + .tdpd = 0x1F4 + }, + { + .dtpr0 = 0x48D7DD93, + .dtpr1 = 0x187008D8, + .dtpr2 = 0x121076, + .mr[0] = 0x0, + .mr[1] = 0xC3, + .mr[2] = 0x6, + .mr[3] = 0x1 + }, + .noc_timing = 0x20D266A4, + .noc_activate = 0x5B6, + .ddrconfig = 3, + .ddr_freq = 533*MHz, + .dramtype = LPDDR3, + .num_channels = 2, + .stride = 9, + .odt = 0, +}, diff --git a/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-micron-2GB-D2.inc b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-micron-2GB-D2.inc new file mode 100644 index 0000000..179cf5b --- /dev/null +++ b/src/mainboard/google/veyron_mickey/sdram_inf/sdram-lpddr3-micron-2GB-D2.inc @@ -0,0 +1,78 @@ +{ + /* 2 Micron DDMT52L256M64D2PP-107 chips */ + { + { + .rank = 0x1, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xF, + .cs1_row = 0xF + }, + { + .rank = 0x1, + .col = 0xA, + .bk = 0x3, + .bw = 0x2, + .dbw = 0x2, + .row_3_4 = 0x0, + .cs0_row = 0xF, + .cs1_row = 0xF + } + }, + { + .togcnt1u = 0x215, + .tinit = 0xC8, + .trsth = 0x0, + .togcnt100n = 0x35, + .trefi = 0x26, + .tmrd = 0x2, + .trfc = 0x70, + .trp = 0x2000D, + .trtw = 0x6, + .tal = 0x0, + .tcl = 0x8, + .tcwl = 0x4, + .tras = 0x17, + .trc = 0x24, + .trcd = 0xD, + .trrd = 0x6, + .trtp = 0x4, + .twr = 0x8, + .twtr = 0x4, + .texsr = 0x76, + .txp = 0x4, + .txpdll = 0x0, + .tzqcs = 0x30, + .tzqcsi = 0x0, + .tdqs = 0x1, + .tcksre = 0x2, + .tcksrx = 0x2, + .tcke = 0x4, + .tmod = 0x0, + .trstl = 0x0, + .tzqcl = 0xC0, + .tmrr = 0x4, + .tckesr = 0x8, + .tdpd = 0x1F4 + }, + { + .dtpr0 = 0x48D7DD93, + .dtpr1 = 0x187008D8, + .dtpr2 = 0x121076, + .mr[0] = 0x0, + .mr[1] = 0xC3, + .mr[2] = 0x6, + .mr[3] = 0x1 + }, + .noc_timing = 0x20D266A4, + .noc_activate = 0x5B6, + .ddrconfig = 3, + .ddr_freq = 533*MHz, + .dramtype = LPDDR3, + .num_channels = 2, + .stride = 9, + .odt = 0, +}, diff --git a/src/mainboard/google/veyron_rialto/boardid.c b/src/mainboard/google/veyron_rialto/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron_rialto/boardid.c +++ b/src/mainboard/google/veyron_rialto/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */ - code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code); return code; diff --git a/src/mainboard/google/veyron_rialto/sdram_configs.c b/src/mainboard/google/veyron_rialto/sdram_configs.c index 0e260c3..30276fd 100644 --- a/src/mainboard/google/veyron_rialto/sdram_configs.c +++ b/src/mainboard/google/veyron_rialto/sdram_configs.c @@ -37,6 +37,14 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */ #include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */ #include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ }; const struct rk3288_sdram_params *get_sdram_config()

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New patch to review for coreboot: veyron_*: Add new Micron and Hynix modules
by David Hendricks 09 Dec '16

09 Dec '16

David Hendricks (dhendrix(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17777 -gerrit commit 3f1019b3d19bf8052223046692ccfd469a433f2a Author: David Hendricks <dhendrix(a)chromium.org> Date: Thu Dec 8 20:47:00 2016 -0800 veyron_*: Add new Micron and Hynix modules This adds SDRAM entries for the following modules: - Micron: DDMT52L256M64D2PP-107 - Hynix: H9CCNNNBKTALBR-NUD They are compatible with Samsung K4E8E324EB-EGCF, so this just copies sdram-lpddr3-samsung-2GB-24EB.inc and changes the name used in the comment near the top. Notes on our "special snowflake" boards: - Rialto's SDRAM mapping is different, so I padded its SDRAM entries to 24 (to match other boards). BUG=chrome-os-partner:59997 BRANCH=none TEST=Booted new modules on Mickey (see BUG) Change-Id: I2e672ba7a63804fbb279f64e1750edf73341edf1 Signed-off-by: David Hendricks <dhendrix(a)chromium.org> --- src/mainboard/google/veyron/boardid.c | 2 +- src/mainboard/google/veyron/sdram_configs.c | 8 +++++ src/mainboard/google/veyron_mickey/boardid.c | 2 +- src/mainboard/google/veyron_mickey/sdram_configs.c | 8 +++++ src/mainboard/google/veyron_rialto/boardid.c | 2 +- src/mainboard/google/veyron_rialto/sdram_configs.c | 36 +++++++++++++--------- 6 files changed, 41 insertions(+), 17 deletions(-) diff --git a/src/mainboard/google/veyron/boardid.c b/src/mainboard/google/veyron/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron/boardid.c +++ b/src/mainboard/google/veyron/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */ - code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code); return code; diff --git a/src/mainboard/google/veyron/sdram_configs.c b/src/mainboard/google/veyron/sdram_configs.c index 76e4f76..a9f458e 100644 --- a/src/mainboard/google/veyron/sdram_configs.c +++ b/src/mainboard/google/veyron/sdram_configs.c @@ -37,6 +37,14 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */ #include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */ #include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ }; const struct rk3288_sdram_params *get_sdram_config() diff --git a/src/mainboard/google/veyron_mickey/boardid.c b/src/mainboard/google/veyron_mickey/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron_mickey/boardid.c +++ b/src/mainboard/google/veyron_mickey/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */ - code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code); return code; diff --git a/src/mainboard/google/veyron_mickey/sdram_configs.c b/src/mainboard/google/veyron_mickey/sdram_configs.c index 76e4f76..a9f458e 100644 --- a/src/mainboard/google/veyron_mickey/sdram_configs.c +++ b/src/mainboard/google/veyron_mickey/sdram_configs.c @@ -37,6 +37,14 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */ #include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */ #include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-lpddr3-micron-2GB-D2.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-lpddr3-hynix-2GB-BK.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ }; const struct rk3288_sdram_params *get_sdram_config() diff --git a/src/mainboard/google/veyron_rialto/boardid.c b/src/mainboard/google/veyron_rialto/boardid.c index d0456d7..5e215ac 100644 --- a/src/mainboard/google/veyron_rialto/boardid.c +++ b/src/mainboard/google/veyron_rialto/boardid.c @@ -38,7 +38,7 @@ uint32_t ram_code(void) static gpio_t pins[] = {[3] = GPIO(8, A, 3), [2] = GPIO(8, A, 2), [1] = GPIO(8, A, 1), [0] = GPIO(8, A, 0)}; /* GPIO8_A0 is LSB */ - code = gpio_base2_value(pins, ARRAY_SIZE(pins)); + code = gpio_binary_first_base3_value(pins, ARRAY_SIZE(pins)); printk(BIOS_SPEW, "RAM Config: %u.\n", code); return code; diff --git a/src/mainboard/google/veyron_rialto/sdram_configs.c b/src/mainboard/google/veyron_rialto/sdram_configs.c index 0e260c3..cbe8a3a 100644 --- a/src/mainboard/google/veyron_rialto/sdram_configs.c +++ b/src/mainboard/google/veyron_rialto/sdram_configs.c @@ -23,20 +23,28 @@ static struct rk3288_sdram_params sdram_configs[] = { #include "sdram_inf/sdram-lpddr3-K4E8E304EE-1GB.inc" /* ram_code = 0000 */ #include "sdram_inf/sdram-lpddr3-K4E6E304EB-2GB-1CH.inc"/* ram_code = 0001 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0010 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0011 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0100 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0101 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0110 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 0111 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1000 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1001 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1010 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1011 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1100 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1101 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1110 */ -#include "sdram_inf/sdram-unused.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-lpddr3-samsung-4GB-04EB.inc" /* ram_code = 0010 */ +#include "sdram_inf/sdram-lpddr3-hynix-2GB-2ranks.inc" /* ram_code = 0011 */ +#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 0100 */ +#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 0101 */ +#include "sdram_inf/sdram-ddr3-samsung-2GB.inc" /* ram_code = 0110 */ +#include "sdram_inf/sdram-lpddr3-elpida-2GB.inc" /* ram_code = 0111 */ +#include "sdram_inf/sdram-lpddr3-samsung-4GB.inc" /* ram_code = 1000 */ +#include "sdram_inf/sdram-lpddr3-hynix-4GB.inc" /* ram_code = 1001 */ +#include "sdram_inf/sdram-ddr3-nanya-2GB.inc" /* ram_code = 1010 */ +#include "sdram_inf/sdram-lpddr3-elpida-4GB.inc" /* ram_code = 1011 */ +#include "sdram_inf/sdram-lpddr3-samsung-2GB-24EB.inc" /* ram_code = 1100 */ +#include "sdram_inf/sdram-ddr3-hynix-2GB.inc" /* ram_code = 1101 */ +#include "sdram_inf/sdram-ddr3-samsung-4GB.inc" /* ram_code = 1110 */ +#include "sdram_inf/sdram-ddr3-hynix-4GB.inc" /* ram_code = 1111 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 000Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 001Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z0 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00Z1 */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 00ZZ */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 010Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 011Z */ +#include "sdram_inf/sdram-unused.inc" /* ram_code = 01Z0 */ }; const struct rk3288_sdram_params *get_sdram_config()

1 0

Patch set updated for coreboot: cbfs: Add API to locate a file from specific region
by Pratikkumar V Prajapati 09 Dec '16

09 Dec '16

Pratikkumar V Prajapati (pratikkumar.v.prajapati(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17664 -gerrit commit bf75f7fc73d8e1a54e74ded7260ee8e72c55356d Author: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Date: Wed Nov 30 17:29:10 2016 -0800 cbfs: Add API to locate a file from specific region This patch adds an API to find file by name from any specific region of fmap. Change-Id: Iabe785a6434937be6a57c7009882a0d68f6c8ad4 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> --- src/include/cbfs.h | 3 +++ src/lib/cbfs.c | 16 +++++++++++++++- 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/src/include/cbfs.h b/src/include/cbfs.h index 8538b3d..1350671 100644 --- a/src/include/cbfs.h +++ b/src/include/cbfs.h @@ -34,6 +34,9 @@ int cbfs_boot_locate(struct cbfsf *fh, const char *name, uint32_t *type); * leaking mappings are a no-op. Returns NULL on error, else returns * the mapping and sets the size of the file. */ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size); +/* Locate file in a specific region of fmap. Return 0 on success. < 0 on error*/ +int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name, + const char *name, uint32_t *type); /* Load a struct file from CBFS into a buffer. Returns amount of loaded * bytes on success or 0 on error. File will get decompressed as necessary. * Same decompression requirements as cbfs_load_and_decompress(). */ diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 19737a4..ff166d8 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -24,7 +24,7 @@ #include <lib.h> #include <symbols.h> #include <timestamp.h> - +#include <fmap.h> #include "fmap_config.h" #define ERROR(x...) printk(BIOS_ERR, "CBFS: " x) @@ -72,6 +72,20 @@ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size) return rdev_mmap(&fh.data, 0, fsize); } +int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name, + const char *name, uint32_t *type) +{ + struct region_device rdev; + + if (fmap_locate_area_as_rdev(region_name, &rdev)) { + LOG("%s region not found while looking for %s\n", + region_name, name); + return -1; + } + + return cbfs_locate(fh, &rdev, name, type); +} + size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset, size_t in_size, void *buffer, size_t buffer_size, uint32_t compression) {

1 0

Patch set updated for coreboot: intel MMA: Enable MMA with FSP2.0
by Pratikkumar V Prajapati 09 Dec '16

09 Dec '16

Pratikkumar V Prajapati (pratikkumar.v.prajapati(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17496 -gerrit commit 4c82a4dae875deb94c88d97cf7e5c5cb8528b085 Author: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> Date: Fri Nov 18 14:36:34 2016 -0800 intel MMA: Enable MMA with FSP2.0 - Separate mma code for fsp1.1 and fsp2.0 and restructuring the code - common code is placed in mma.c and mma.h - mma_fsp<ver>.h and fsp<ver>/mma_core.c contains fsp version specific code. - whole MMA feature is guarded by CONFIG_MMA flag. Change-Id: I12c9a1122ea7a52f050b852738fb95d03ce44800 Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> --- src/drivers/intel/fsp1_1/Makefile.inc | 2 + src/drivers/intel/fsp1_1/include/fsp/romstage.h | 6 + src/drivers/intel/fsp1_1/mma_core.c | 61 ++++++ src/drivers/intel/fsp1_1/raminit.c | 8 +- src/drivers/intel/fsp2_0/Makefile.inc | 2 + src/drivers/intel/fsp2_0/include/fsp/api.h | 7 + src/drivers/intel/fsp2_0/memory_init.c | 8 + src/drivers/intel/fsp2_0/mma_core.c | 57 ++++++ src/soc/intel/common/Kconfig | 5 +- src/soc/intel/common/mma.c | 222 +++++++++------------ src/soc/intel/common/mma.h | 21 +- src/soc/intel/skylake/include/fsp11/soc/romstage.h | 8 + src/soc/intel/skylake/include/fsp20/soc/romstage.h | 9 +- src/soc/intel/skylake/romstage/romstage.c | 19 ++ src/soc/intel/skylake/romstage/romstage_fsp20.c | 18 ++ 15 files changed, 314 insertions(+), 139 deletions(-) diff --git a/src/drivers/intel/fsp1_1/Makefile.inc b/src/drivers/intel/fsp1_1/Makefile.inc index 4ea23f3..4088293 100644 --- a/src/drivers/intel/fsp1_1/Makefile.inc +++ b/src/drivers/intel/fsp1_1/Makefile.inc @@ -31,6 +31,7 @@ romstage-y += romstage.c romstage-$(CONFIG_SEPARATE_VERSTAGE) += romstage_after_verstage.S romstage-y += stack.c romstage-y += stage_cache.c +romstage-$(CONFIG_MMA) += mma_core.c ramstage-$(CONFIG_GOP_SUPPORT) += fsp_gop.c ramstage-y += fsp_relocate.c @@ -39,6 +40,7 @@ ramstage-y += hob.c ramstage-y += ramstage.c ramstage-y += stage_cache.c ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c +ramstage-$(CONFIG_MMA) += mma_core.c CPPFLAGS_common += -Isrc/drivers/intel/fsp1_1/include diff --git a/src/drivers/intel/fsp1_1/include/fsp/romstage.h b/src/drivers/intel/fsp1_1/include/fsp/romstage.h index 4683f5e..f5b6efc 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/romstage.h +++ b/src/drivers/intel/fsp1_1/include/fsp/romstage.h @@ -76,6 +76,12 @@ void mainboard_save_dimm_info(struct romstage_params *params); void mainboard_add_dimm_info(struct romstage_params *params, struct memory_info *mem_info, int channel, int dimm, int index); +/* init mma. calls get_mma_file_rdev to get rdev(s) of mma files and + * then calls soc_update_memory_params_for_mma to update soc specific + * MMA related memory params. + * Returns 0 on success, < 0 on failure. + */ +int mma_init(MEMORY_INIT_UPD *memory_upd); void raminit(struct romstage_params *params); void report_memory_config(void); void romstage_common(struct romstage_params *params); diff --git a/src/drivers/intel/fsp1_1/mma_core.c b/src/drivers/intel/fsp1_1/mma_core.c new file mode 100644 index 0000000..15827ae --- /dev/null +++ b/src/drivers/intel/fsp1_1/mma_core.c @@ -0,0 +1,61 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <fsp/util.h> +#include <fsp/soc_binding.h> +#include <soc/intel/common/mma.h> +#include <soc/romstage.h> +#include <string.h> + +#define FSP_MMA_RESULTS_GUID { 0x8f4e928, 0xf5f, 0x46d4, \ + { 0x84, 0x10, 0x47, 0x9f, 0xda, 0x27, 0x9d, 0xb6 } } + +int fsp_locate_mma_results(const void **mma_hob, uint32_t *mma_hob_size) +{ + const void *mma_hob_start; + const EFI_GUID mma_results_guid = FSP_MMA_RESULTS_GUID; + + mma_hob_start = get_first_guid_hob(&mma_results_guid); + if (!mma_hob_start) + return -1; + *mma_hob = GET_GUID_HOB_DATA(mma_hob_start); + *mma_hob_size = GET_HOB_LENGTH(mma_hob); + + if (!(*mma_hob_size) || !(*mma_hob)) + return -1; + return 0; +} + +__attribute__((weak)) void soc_update_memory_params_for_mma( + MEMORY_INIT_UPD *memory_cfg, + struct mma_config_param *mma_cfg) +{ + printk(BIOS_DEBUG, "MMA: WEAK: %s/%s called\n", __FILE__, __func__); +} + +int mma_init(MEMORY_INIT_UPD *memory_cfg) +{ + struct mma_config_param mma_cfg; + + if (get_mma_file_rdev(&mma_cfg)) { + printk(BIOS_DEBUG, "%s", + "MMA: failed to get rdevs for MMA files\n"); + return -1; + } + + soc_update_memory_params_for_mma(memory_cfg, &mma_cfg); + return 0; +} diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index eca8934..97fabd9 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -101,8 +101,12 @@ void raminit(struct romstage_params *params) soc_memory_init_params(params, &memory_init_params); mainboard_memory_init_params(params, &memory_init_params); - if (IS_ENABLED(CONFIG_MMA)) - setup_mma(&memory_init_params); + if (IS_ENABLED(CONFIG_MMA)) { + if (mma_init(&memory_init_params)) + printk(BIOS_DEBUG, "MMA: init failed\n"); + else + printk(BIOS_DEBUG, "MMA: init completed successfully\n"); + } post_code(0x36); diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index beeec7c..ad654b9 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -24,6 +24,7 @@ romstage-$(CONFIG_VERIFY_HOBS) += hob_verify.c romstage-y += util.c romstage-y += memory_init.c romstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c +romstage-$(CONFIG_MMA) += mma_core.c ramstage-y += debug.c ramstage-y += graphics.c @@ -36,6 +37,7 @@ ramstage-y += silicon_init.c ramstage-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c ramstage-y += util.c +ramstage-$(CONFIG_MMA) += mma_core.c postcar-$(CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM) += stage_cache.c diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index 553fc52..fc4aaa1 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -40,6 +40,13 @@ enum fsp_notify_phase { void fsp_memory_init(bool s3wake); void fsp_silicon_init(void); +/* init mma. calls get_mma_file_rdev to get rdev(s) of mma files and + * then calls soc_update_memory_params_for_mma to update soc specific + * MMA related memory params. + * Returns 0 on success, < 0 on failure. + */ +int mma_init(FSP_M_CONFIG *memory_cfg); + /* Callbacks for updating stage-specific parameters */ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd); void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd); diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index b833561..49302b8 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -25,6 +25,7 @@ #include <program_loading.h> #include <reset.h> #include <romstage_handoff.h> +#include <soc/intel/common/mma.h> #include <soc/intel/common/mrc_cache.h> #include <string.h> #include <symbols.h> @@ -318,6 +319,13 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake, /* Give SoC and mainboard a chance to update the UPD */ platform_fsp_memory_init_params_cb(&fspm_upd); + if (IS_ENABLED(CONFIG_MMA)) { + if (mma_init(&fspm_upd.FspmConfig)) + printk(BIOS_DEBUG, "MMA: init failed\n"); + else + printk(BIOS_DEBUG, "MMA: init completed successfully\n"); + } + /* Call FspMemoryInit */ fsp_raminit = (void *)(hdr->image_base + hdr->memory_init_entry_offset); fsp_debug_before_memory_init(fsp_raminit, upd, &fspm_upd); diff --git a/src/drivers/intel/fsp2_0/mma_core.c b/src/drivers/intel/fsp2_0/mma_core.c new file mode 100644 index 0000000..44a9530 --- /dev/null +++ b/src/drivers/intel/fsp2_0/mma_core.c @@ -0,0 +1,57 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <fsp/util.h> +#include <fsp/soc_binding.h> +#include <soc/intel/common/mma.h> +#include <soc/romstage.h> +#include <string.h> + +static const uint8_t mma_results_uuid[16] = { 0x28, 0xe9, 0xf4, 0x08, + 0x5f, 0x0f, 0xd4, 0x46, + 0x84, 0x10, 0x47, 0x9f, 0xda, 0x27, 0x9d, 0xb6 }; + +int fsp_locate_mma_results(const void **mma_hob, uint32_t *mma_hob_size) +{ + *mma_hob_size = 0; + *mma_hob = fsp_find_extension_hob_by_guid(mma_results_uuid, + mma_hob_size); + + if (!(*mma_hob_size) || !(*mma_hob)) + return -1; + return 0; +} + +__attribute__((weak)) void soc_update_memory_params_for_mma( + FSP_M_CONFIG *memory_cfg, + struct mma_config_param *mma_cfg) +{ + printk(BIOS_DEBUG, "MMA: WEAK: %s/%s called\n", __FILE__, __func__); +} + +int mma_init(FSP_M_CONFIG *memory_cfg) +{ + struct mma_config_param mma_cfg; + + if (get_mma_file_rdev(&mma_cfg)) { + printk(BIOS_DEBUG, "%s", + "MMA: failed to get rdevs for MMA files\n"); + return -1; + } + + soc_update_memory_params_for_mma(memory_cfg, &mma_cfg); + return 0; +} diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig index 5d8bf66..e7cd16d 100644 --- a/src/soc/intel/common/Kconfig +++ b/src/soc/intel/common/Kconfig @@ -79,10 +79,11 @@ config SOC_INTEL_COMMON_LPSS_I2C_DEBUG when debugging I2C drivers. config MMA - bool "enable MMA (Memory Margin Analysis) support" + bool "Enable MMA (Memory Margin Analysis) support for Intel Core" default n + depends on PLATFORM_USES_FSP2_0 || PLATFORM_USES_FSP1_1 help - Set this option to y to enable MMA (Memory Margin Analysis) support + Set this option to y to enable MMA (Memory Margin Analysis) support config MMA_BLOBS_PATH string "Path to MMA blobs" diff --git a/src/soc/intel/common/mma.c b/src/soc/intel/common/mma.c index 87d8e5c..1f4b131 100644 --- a/src/soc/intel/common/mma.c +++ b/src/soc/intel/common/mma.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015 Intel Corporation. + * Copyright (C) 2016 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -13,38 +13,35 @@ * GNU General Public License for more details. */ -#include <boot/coreboot_tables.h> #include <bootstate.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> -#include <lib.h> -#include "mma.h" -#include <soc/romstage.h> -#include <string.h> -#include <fmap.h> - -#define MMA_TEST_METADATA_FILENAME "mma_test_metadata.bin" -#define MMA_TEST_NAME_TAG "MMA_TEST_NAME" -#define MMA_TEST_PARAM_TAG "MMA_TEST_PARAM" +#include <fsp/util.h> +#include <soc/intel/common/mma.h> + +#define MMA_TEST_METADATA_FILENAME "mma_test_metadata.bin" +#define MMA_TEST_NAME_TAG "MMA_TEST_NAME" +#define MMA_TEST_PARAM_TAG "MMA_TEST_PARAM" +#define TEST_NAME_MAX_SIZE 30 +#define TEST_PARAM_MAX_SIZE 100 +#define MMA_DATA_SIGNATURE (('M' << 0) | ('M' << 8) | \ + ('A' << 16) | ('D' << 24)) #define MMA_CBFS_REGION "COREBOOT" -#define TEST_NAME_MAX_SIZE 30 -#define TEST_PARAM_MAX_SIZE 100 -#define FSP_MMA_RESULTS_GUID { 0x8f4e928, 0xf5f, 0x46d4, \ - { 0x84, 0x10, 0x47, 0x9f, 0xda, 0x27, 0x9d, 0xb6 } } -#define MMA_DATA_SIGNATURE (('M'<<0)|('M'<<8)|('A'<<16)|('D'<<24)) struct mma_data_container { - u32 mma_signature; // "MMAD" - u8 mma_data[0]; // Variable size, platform/run time dependent. + uint32_t mma_signature; /* "MMAD" */ + uint8_t mma_data[0]; /* Variable size, platform/run time dependent. */ } __attribute__ ((packed)); /* -Format of the MMA test metadata file, stored under CBFS -MMA_TEST_NAME=xxxxxx.efi;MMA_TEST_PARAM=xxxxxx.bin; -*/ + * Format of the MMA test metadata file, stored under CBFS + * MMA_TEST_NAME=xxxxxx.efi;MMA_TEST_PARAM=xxxxxx.bin; + */ -/* Returns index in haystack after 'LABEL=' string is found, < 0 on error. */ +/* Returns index in haystack after 'LABEL=' + * string is found, < 0 on error. + */ static int find_label(const char *haystack, size_t haystack_sz, const char *label) { @@ -72,12 +69,13 @@ static int find_label(const char *haystack, size_t haystack_sz, return i + label_sz + 1; } + /* * Fill in value in dest field located by LABEL=. - * Returns 0 on success, < 0 on error. + * Returns 0 on success, < 0 on error. */ static int label_value(const char *haystack, size_t haystack_sz, - const char *label, char *dest, size_t dest_sz) + const char *label, char *dest, size_t dest_sz) { size_t val_begin; size_t val_end; @@ -114,159 +112,121 @@ static int label_value(const char *haystack, size_t haystack_sz, return 0; } -static void *cbfs_locate_file_in_region(const char *region_name, const char *file_name, - uint32_t file_type, uint32_t *file_size) -{ - struct region_device rdev; - struct cbfsf fh; - - if (file_size != NULL) - *file_size = 0; - - if (fmap_locate_area_as_rdev(region_name, &rdev) == 0) { - if (cbfs_locate(&fh, &rdev, file_name, &file_type) == 0) { - if (file_size != NULL) - *file_size = region_device_sz(&fh.data); - return rdev_mmap_full(&fh.data); - } else - printk(BIOS_DEBUG, "%s file not found in %s region\n", - file_name, region_name); - } else - printk(BIOS_DEBUG,"%s region not found while looking for %s\n", region_name, - file_name); - - return NULL; -} - -void setup_mma(MEMORY_INIT_UPD *memory_params) +int get_mma_file_rdev(struct mma_config_param *mma_cfg) { - void *mma_test_metadata, *mma_test_content, *mma_test_param; - size_t mma_test_metadata_file_len, mma_test_content_file_len, - mma_test_param_file_len; + void *mma_test_metadata; + size_t mma_test_metadata_file_len; char test_filename[TEST_NAME_MAX_SIZE], - test_param_filename[TEST_PARAM_MAX_SIZE]; + test_param_filename[TEST_PARAM_MAX_SIZE]; + struct cbfsf metadata_fh, test_content_fh, test_param_fh; + uint32_t mma_type = CBFS_TYPE_MMA; + uint32_t efi_type = CBFS_TYPE_EFI; + bool metadata_parse_flag = true; - printk(BIOS_DEBUG, "Entry setup_mma\n"); + printk(BIOS_DEBUG, "MMA: Entry %s\n", __func__); - memory_params->MmaTestContentPtr = 0; - memory_params->MmaTestContentSize = 0; - memory_params->MmaTestConfigPtr = 0; - memory_params->MmaTestConfigSize = 0; + if (cbfs_locate_file_in_region(&metadata_fh, MMA_CBFS_REGION, + MMA_TEST_METADATA_FILENAME, &mma_type)) { + printk(BIOS_DEBUG, "MMA: Failed to locate %s\n", + MMA_TEST_METADATA_FILENAME); + return -1; + } - mma_test_metadata = cbfs_locate_file_in_region(MMA_CBFS_REGION, - MMA_TEST_METADATA_FILENAME, CBFS_TYPE_MMA, - &mma_test_metadata_file_len); + mma_test_metadata = rdev_mmap_full(&metadata_fh.data); + mma_test_metadata_file_len = region_device_sz(&metadata_fh.data); - if (!mma_test_metadata) { - printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s\n", + if (!mma_test_metadata || !mma_test_metadata_file_len) { + printk(BIOS_DEBUG, "MMA: Failed to read %s\n", MMA_TEST_METADATA_FILENAME); - return; + metadata_parse_flag = false; } - if (label_value(mma_test_metadata, mma_test_metadata_file_len, - MMA_TEST_NAME_TAG, test_filename, TEST_NAME_MAX_SIZE)) { - printk(BIOS_DEBUG, "MMA setup failed : Failed to get %s", - MMA_TEST_NAME_TAG); - return; + if (metadata_parse_flag && + label_value(mma_test_metadata, mma_test_metadata_file_len, + MMA_TEST_NAME_TAG, test_filename, + TEST_NAME_MAX_SIZE)) { + printk(BIOS_DEBUG, "MMA: Failed to get %s\n", + MMA_TEST_NAME_TAG); + metadata_parse_flag = false; } - if (label_value(mma_test_metadata, mma_test_metadata_file_len, + if (metadata_parse_flag && + label_value(mma_test_metadata, mma_test_metadata_file_len, MMA_TEST_PARAM_TAG, test_param_filename, - TEST_PARAM_MAX_SIZE)) { - printk(BIOS_DEBUG, "MMA setup failed : Failed to get %s", + TEST_PARAM_MAX_SIZE)) { + printk(BIOS_DEBUG, "MMA: Failed to get %s\n", MMA_TEST_PARAM_TAG); - return; + metadata_parse_flag = false; } - printk(BIOS_DEBUG, "Got MMA_TEST_NAME=%s MMA_TEST_PARAM=%s\n", + rdev_munmap(&metadata_fh.data, mma_test_metadata); + + if (!metadata_parse_flag) + return -1; + + printk(BIOS_DEBUG, "MMA: Got MMA_TEST_NAME=%s MMA_TEST_PARAM=%s\n", test_filename, test_param_filename); - mma_test_content = cbfs_locate_file_in_region(MMA_CBFS_REGION, - test_filename, CBFS_TYPE_EFI, - &mma_test_content_file_len); - if (!mma_test_content) { - printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s.\n", - test_filename); - return; + if (cbfs_locate_file_in_region(&test_content_fh, MMA_CBFS_REGION, + test_filename, &efi_type)) { + printk(BIOS_DEBUG, "MMA: Failed to locate %s\n", + test_filename); + return -1; } - mma_test_param = cbfs_locate_file_in_region(MMA_CBFS_REGION, - test_param_filename, CBFS_TYPE_MMA, - &mma_test_param_file_len); - if (!mma_test_param) { - printk(BIOS_DEBUG, "MMA setup failed: Failed to read %s.\n", + cbfs_file_data(&mma_cfg->mma_test_content_rdev, &test_content_fh); + + if (cbfs_locate_file_in_region(&test_param_fh, MMA_CBFS_REGION, + test_param_filename, &mma_type)) { + printk(BIOS_DEBUG, "MMA: Failed to locate %s\n", test_param_filename); - return; + return -1; } - memory_params->MmaTestContentPtr = (uintptr_t) mma_test_content; - memory_params->MmaTestContentSize = mma_test_content_file_len; - memory_params->MmaTestConfigPtr = (uintptr_t) mma_test_param; - memory_params->MmaTestConfigSize = mma_test_param_file_len; - memory_params->MrcFastBoot = 0x00; - memory_params->SaGv = 0x02; - - printk(BIOS_DEBUG, "MMA Test name %s\n", test_filename); - printk(BIOS_DEBUG, "MMA Test Config name %s\n", test_param_filename); - printk(BIOS_DEBUG, "MMA passing following memory_params\n"); - printk(BIOS_DEBUG, "memory_params->MmaTestContentPtr = %0x\n", - memory_params->MmaTestContentPtr); - printk(BIOS_DEBUG, "memory_params->MmaTestContentSize = %d\n", - memory_params->MmaTestContentSize); - printk(BIOS_DEBUG, "memory_params->MmaTestConfigPtr = %0x\n", - memory_params->MmaTestConfigPtr); - printk(BIOS_DEBUG, "memory_params->MmaTestConfigSize = %d\n", - memory_params->MmaTestConfigSize); - printk(BIOS_DEBUG, "memory_params->MrcFastBoot = %d\n", - memory_params->MrcFastBoot); - printk(BIOS_DEBUG, "memory_params->SaGv = %d\n", - memory_params->SaGv); - - printk(BIOS_DEBUG, "MMA setup successfully\n"); + cbfs_file_data(&mma_cfg->mma_test_param_rdev, &test_param_fh); + + printk(BIOS_DEBUG, "MMA: %s exit success\n", __func__); + + return 0; } static void save_mma_results_data(void *unused) { - void *mma_results_hob; - u32 mma_hob_size; - u32 *mma_hob_data; + const void *mma_hob; + uint32_t mma_hob_size; struct mma_data_container *mma_data; - int cbmem_size; - - const EFI_GUID mma_results_guid = FSP_MMA_RESULTS_GUID; + uint32_t mma_data_size; - printk(BIOS_DEBUG, "Entry save_mma_results_data MMA save data.\n"); + printk(BIOS_DEBUG, "MMA: Entry %s\n", __func__); - mma_results_hob = get_first_guid_hob(&mma_results_guid); - if (mma_results_hob == NULL) { + if (fsp_locate_mma_results(&mma_hob, &mma_hob_size)) { printk(BIOS_DEBUG, - "MMA results data Hob not present\n"); + "MMA: results data Hob not present\n"); return; } - mma_hob_data = GET_GUID_HOB_DATA(mma_results_hob); - mma_hob_size = GET_HOB_LENGTH(mma_results_hob); - cbmem_size = ALIGN(mma_hob_size, 16) + + mma_data_size = ALIGN(mma_hob_size, 16) + sizeof(struct mma_data_container); - mma_data = cbmem_add(CBMEM_ID_MMA_DATA, cbmem_size); + + mma_data = cbmem_add(CBMEM_ID_MMA_DATA, mma_data_size); if (mma_data == NULL) { printk(BIOS_DEBUG, - "CBMEM was not available to save the MMA data.\n"); + "MMA: CBMEM was not available to save the MMA data.\n"); return; } /*clear the mma_data before coping the actual data */ - memset(mma_data, 0, cbmem_size); + memset(mma_data, 0, mma_data_size); printk(BIOS_DEBUG, - "Copy MMA DATA to HOB(src addr %p, dest addr %p, %u bytes)\n", - mma_hob_data, mma_data, mma_hob_size); + "MMA: copy MMA data to CBMEM(src 0x%p, dest 0x%p, %u bytes)\n", + mma_hob, mma_data, mma_hob_size); mma_data->mma_signature = MMA_DATA_SIGNATURE; - memcpy(mma_data->mma_data, mma_hob_data, mma_hob_size); + memcpy(mma_data->mma_data, mma_hob, mma_hob_size); - printk(BIOS_DEBUG, "write MMA results data to cbmem success\n"); + printk(BIOS_DEBUG, "MMA: %s exit successfully\n", __func__); } BOOT_STATE_INIT_ENTRY(BS_WRITE_TABLES, BS_ON_ENTRY, diff --git a/src/soc/intel/common/mma.h b/src/soc/intel/common/mma.h index f1c91e2..aaca0cd 100644 --- a/src/soc/intel/common/mma.h +++ b/src/soc/intel/common/mma.h @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015 Intel Corporation. + * Copyright (C) 2016 Intel Corporation. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -16,8 +16,23 @@ #ifndef _SOC_MMA_H_ #define _SOC_MMA_H_ -#include <fsp/soc_binding.h> +#include <stdint.h> +#include <commonlib/region.h> -void setup_mma(MEMORY_INIT_UPD *memory_params); +struct mma_config_param { + struct region_device mma_test_content_rdev; + struct region_device mma_test_param_rdev; +}; + +/* Locate mma metadata in CBFS, parse, find and fill rdev for + * mma test content and test param. + * Returns 0 on success, < 0 on failure. + */ +int get_mma_file_rdev(struct mma_config_param *mma_cfg); +/* Locate the MMA hob from the FSP Hob list, This is implemented + * specific to FSP version. + * Returns 0 on success, < 0 on failure. + */ +int fsp_locate_mma_results(const void **mma_hob, size_t *mma_hob_size); #endif diff --git a/src/soc/intel/skylake/include/fsp11/soc/romstage.h b/src/soc/intel/skylake/include/fsp11/soc/romstage.h index 6c40bd6..7ea437c 100644 --- a/src/soc/intel/skylake/include/fsp11/soc/romstage.h +++ b/src/soc/intel/skylake/include/fsp11/soc/romstage.h @@ -18,6 +18,8 @@ #define _SOC_ROMSTAGE_H_ #include <fsp/romstage.h> +#include <fsp/uefi_binding.h> +#include <soc/intel/common/mma.h> void systemagent_early_init(void); void intel_early_me_status(void); @@ -26,5 +28,11 @@ int smbus_read_byte(unsigned device, unsigned address); int early_spi_read_wpsr(u8 *sr); void mainboard_fill_spd_data(struct pei_data *pei_data); +/* update the memory config param for mma. set location and size of + * MMA test content, test param and set SOC specifig memory params like + * Fastboot mode, SAGV + */ +void soc_update_memory_params_for_mma(MEMORY_INIT_UPD *memory_cfg, + struct mma_config_param *mma_cfg); #endif /* _SOC_ROMSTAGE_H_ */ diff --git a/src/soc/intel/skylake/include/fsp20/soc/romstage.h b/src/soc/intel/skylake/include/fsp20/soc/romstage.h index 08753f1..f14e8a4 100644 --- a/src/soc/intel/skylake/include/fsp20/soc/romstage.h +++ b/src/soc/intel/skylake/include/fsp20/soc/romstage.h @@ -19,13 +19,20 @@ #include <arch/cpu.h> #include <fsp/api.h> +#include <fsp/soc_binding.h> +#include <soc/intel/common/mma.h> asmlinkage void *car_stage_c_entry(void); void mainboard_memory_init_params(FSPM_UPD *mupd); void systemagent_early_init(void); int smbus_read_byte(unsigned device, unsigned address); int early_spi_read_wpsr(u8 *sr); - +/* update the memory config param for mma. set location and size of + * MMA test content, test param and set SOC specifig memory params like + * Fastboot mode, SAGV + */ +void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg, + struct mma_config_param *mma_cfg); /* Board type */ enum board_type { BOARD_TYPE_MOBILE = 0, diff --git a/src/soc/intel/skylake/romstage/romstage.c b/src/soc/intel/skylake/romstage/romstage.c index 97c6a45..55fca82 100644 --- a/src/soc/intel/skylake/romstage/romstage.c +++ b/src/soc/intel/skylake/romstage/romstage.c @@ -21,6 +21,7 @@ #include <arch/cbfs.h> #include <arch/stages.h> #include <arch/early_variables.h> +#include <assert.h> #include <cbmem.h> #include <chip.h> #include <console/console.h> @@ -31,6 +32,7 @@ #include <elog.h> #include <reset.h> #include <romstage_handoff.h> +#include <soc/intel/common/mma.h> #include <soc/pci_devs.h> #include <soc/pei_wrapper.h> #include <soc/pm.h> @@ -97,6 +99,23 @@ void soc_memory_init_params(struct romstage_params *params, } } +void soc_update_memory_params_for_mma(MEMORY_INIT_UPD *memory_cfg, + struct mma_config_param *mma_cfg) +{ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); + + memory_cfg->MmaTestContentPtr = (uint32_t) rdev_mmap_full( + &mma_cfg->mma_test_content_rdev); + memory_cfg->MmaTestContentSize = region_device_sz( + &mma_cfg->mma_test_content_rdev); + memory_cfg->MmaTestConfigPtr = (uint32_t) rdev_mmap_full( + &mma_cfg->mma_test_param_rdev); + memory_cfg->MmaTestConfigSize = region_device_sz( + &mma_cfg->mma_test_param_rdev); + memory_cfg->MrcFastBoot = 0x00; + memory_cfg->SaGv = 0x02; + +} void soc_display_memory_init_params(const MEMORY_INIT_UPD *old, MEMORY_INIT_UPD *new) { diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 8e08323..a5c02b2 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -25,6 +25,7 @@ #include <device/pci_def.h> #include <fsp/util.h> #include <fsp/memmap.h> +#include <soc/intel/common/mma.h> #include <soc/pci_devs.h> #include <soc/pm.h> #include <soc/romstage.h> @@ -153,6 +154,23 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd) } +void soc_update_memory_params_for_mma(FSP_M_CONFIG *memory_cfg, + struct mma_config_param *mma_cfg) +{ + assert(IS_ENABLED(CONFIG_BOOT_DEVICE_MEMORY_MAPPED)); + + memory_cfg->MmaTestContentPtr = (uint32_t) rdev_mmap_full( + &mma_cfg->mma_test_content_rdev); + memory_cfg->MmaTestContentSize = region_device_sz( + &mma_cfg->mma_test_content_rdev); + memory_cfg->MmaTestConfigPtr = (uint32_t) rdev_mmap_full( + &mma_cfg->mma_test_param_rdev); + memory_cfg->MmaTestConfigSize = region_device_sz( + &mma_cfg->mma_test_param_rdev); + + memory_cfg->MrcFastBoot = 0x00; + memory_cfg->SaGv = 0x02; +} __attribute__((weak)) void mainboard_memory_init_params(FSPM_UPD *mupd) { /* Do nothing */

1 0

Patch set updated for coreboot: util/abuild: Fix or disable shellcheck warnings
by Martin Roth 08 Dec '16

08 Dec '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17722 -gerrit commit 48ca614bc3202b249b85098fffdd99b466b9a076 Author: Martin Roth <martinroth(a)google.com> Date: Wed Nov 30 16:32:20 2016 -0700 util/abuild: Fix or disable shellcheck warnings This cleans up the shellcheck warnings in abuild. Warning count: 1 Unexpected ==. 1 Use "${var:?}" to ensure this never expands to / . 1 VARIABLE appears unused. Verify it or export it. 1 Use "$@" (with quotes) to prevent whitespace problems. 2 Consider using { cmd1; cmd2; } >> file instead of individual redirects. 2 Expressions don't expand in single quotes, use double quotes for that. 3 Prefer [ p ] || [ q ] as [ p -o q ] is not well defined. 4 $/${} is unnecessary on arithmetic variables. 5 Check exit code directly with 'if mycmd;', not indirectly with $?. 5 Use cd ... || exit in case cd fails. 11 Declare and assign separately to avoid masking return values. 13 Use $(..) instead of legacy `..`. 20 Don't use variables in the printf format string. 104 Double quote to prevent globbing. Change-Id: I9c77e122435ba87ce3a4aee76b5022f7265f9ef2 Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/abuild/abuild | 281 ++++++++++++++++++++++++++++------------------------- 1 file changed, 151 insertions(+), 130 deletions(-) diff --git a/util/abuild/abuild b/util/abuild/abuild index 300921a..f94e49a 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -32,7 +32,7 @@ export KCONFIG_OVERWRITECONFIG=1 PAYLOAD=/dev/null # path to coreboot XGCC -XGCCPATH="`pwd`/util/crossgcc/xgcc/bin/" +XGCCPATH="${TOP}/util/crossgcc/xgcc/bin/" # Add XGCC to the path. if [ -d "$XGCCPATH" ] && [[ ":$PATH:" != *":$XGCCPATH:"* ]]; then @@ -77,30 +77,25 @@ quiet=false # clang mode enabled by -sb option. scanbuild=false -ARCH=`uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \ - -e s/i86pc/i386/ \ - -e s/arm.*/arm/ -e s/sa110/arm/ -e s/x86_64/amd64/ \ - -e "s/Power Macintosh/ppc/"` - trap interrupt INT function interrupt { - printf "\n$0: execution interrupted manually.\n" + printf "\n%s: execution interrupted manually.\n" "$0" if [ "$mode" == "junit" ]; then - printf "$0: deleting incomplete xml output file.\n" + printf "%s: deleting incomplete xml output file.\n" "$0" fi exit 1 } function debug { - test "$verbose" == "true" && printf "$*\n" + test "$verbose" == "true" && echo "$*" } function junit { - test "$mode" == "junit" && printf "$*\n" >> $XMLFILE + test "$mode" == "junit" && echo "$*" >> "$XMLFILE" return 0 } @@ -108,9 +103,9 @@ function junitfile { test "$mode" == "junit" && { printf '<![CDATA[\n' - cat $1 + cat "$1" printf ']]>\n' - } >> $XMLFILE + } >> "$XMLFILE" } # Return mainboard descriptors. @@ -120,6 +115,7 @@ function junitfile function get_mainboards { local search_space=${1-*/*} + # shellcheck disable=SC2086 grep -h "^[[:space:]]*config\>[[:space:]]*\<BOARD_" \ ${ROOT}/src/mainboard/${search_space}/Kconfig.name 2>/dev/null | \ sed "s,^.*\<BOARD_$[A-Z0-9_]*$\>.*$,\1," @@ -130,6 +126,7 @@ function mainboard_directory { local MAINBOARD=$1 + # shellcheck disable=SC2086 grep -l "^[[:space:]]*config\>[[:space:]]*\<BOARD_${MAINBOARD}\>" \ ${ROOT}/src/mainboard/*/*/Kconfig.name | \ sed "s:^$ROOT/src/mainboard/$.*$/Kconfig.name$:\1:" @@ -139,15 +136,17 @@ function mainboard_directory function mainboard_vendor { local MAINBOARD=$1 + local kconfig_file - local kconfig_file=$( \ + # shellcheck disable=SC2086 + kconfig_file=$( \ grep -l "^[[:space:]]*config\>[[:space:]]*\<BOARD_${MAINBOARD}\>" \ ${ROOT}/src/mainboard/*/*/Kconfig.name | \ sed "s:^$${ROOT}/src/mainboard/.*$/.*/$Kconfig.name$$:\1/\2:" ) if [ ! -f "$kconfig_file" ]; then exit 1 fi - grep "^[[:space:]]*config\>[[:space:]]*\<VENDOR_" $kconfig_file | \ + grep "^[[:space:]]*config\>[[:space:]]*\<VENDOR_" "$kconfig_file" | \ sed "s,^.*\<VENDOR_$[A-Z0-9_]*$\>.*$,\1," } @@ -157,16 +156,18 @@ function mainboard_vendor # If a directory contains multiple boards, returns them all. function normalize_target { - local targets=$(get_mainboards $1) + local targets + + targets=$(get_mainboards "$1") if [ -n "$targets" ]; then - echo $targets + echo "$targets" return fi - local targets=$(echo $1 | tr ',' ' ') + targets=$(echo "$1" | tr ',' ' ') for i in $targets; do - if [ -n "$(mainboard_directory $i)" ]; then - echo $i + if [ -n "$(mainboard_directory "$i")" ]; then + echo "$i" else echo "$i is not a valid target" >&2 exit 1 @@ -174,34 +175,36 @@ function normalize_target done } +# shellcheck disable=SC2129 function create_config { local BUILD_NAME=$1 local build_dir=$2 + local board_srcdir - local config_file=${build_dir}/config.build - local board_srcdir=$(mainboard_directory ${BUILD_NAME}) + local config_file="${build_dir}/config.build" + board_srcdir="$(mainboard_directory "${BUILD_NAME}")" - mkdir -p ${build_dir} - mkdir -p $TARGET/sharedutils + mkdir -p "${build_dir}" + mkdir -p "$TARGET/sharedutils" - if [ "$quiet" == "false" ]; then printf " Creating config file for $BUILD_NAME... \n"; fi - printf "CONFIG_VENDOR_$(mainboard_vendor ${BUILD_NAME})=y\n" > ${config_file} - printf "CONFIG_BOARD_${BUILD_NAME}=y\n" >> ${config_file} - grep "select[\t ]*ARCH" ${ROOT}/src/mainboard/${board_srcdir}/Kconfig | \ - sed "s,^.*$ARCH_.*$[^A-Z0-9_]*,CONFIG_\1=y," >> ${config_file} - printf "CONFIG_MAINBOARD_DIR=\"${board_srcdir}\"\n" >> ${config_file} + if [ "$quiet" == "false" ]; then echo " Creating config file for $BUILD_NAME..."; fi + echo "CONFIG_VENDOR_$(mainboard_vendor "${BUILD_NAME}")=y" > "${config_file}" + echo "CONFIG_BOARD_${BUILD_NAME}=y" >> "${config_file}" + grep "select[\t ]*ARCH" "${ROOT}/src/mainboard/${board_srcdir}/Kconfig" | \ + sed "s,^.*$ARCH_.*$[^A-Z0-9_]*,CONFIG_\1=y," >> "${config_file}" + echo "CONFIG_MAINBOARD_DIR=\"${board_srcdir}\"" >> "${config_file}" update_config "$BUILD_NAME" "$build_dir" "$config_file" ret=$? if [ $ret -eq 0 ]; then - if [ "$quiet" == "false" ]; then printf " $BUILD_NAME config created.\n"; fi + if [ "$quiet" == "false" ]; then echo " $BUILD_NAME config created."; fi return 0 else # Does this ever happen? - if [ "$quiet" == "false" ]; then printf "$BUILD_NAME config creation FAILED!\nLog excerpt:\n"; fi - tail -n $CONTEXT $build_dir/config.log 2> /dev/null || tail -$CONTEXT $build_dir/config.log + if [ "$quiet" == "false" ]; then printf "%s config creation FAILED!\nLog excerpt:\n" "$BUILD_NAME"; fi + tail -n $CONTEXT "$build_dir/config.log" 2> /dev/null || tail -$CONTEXT "$build_dir/config.log" return 1 fi } @@ -212,6 +215,7 @@ function update_config local build_dir=$2 local config_file=$3 + local PAYLOAD local defconfig_file defconfig_file=${build_dir}/config.$(echo "${BUILD_NAME}" | tr '[:upper:]' '[:lower:]').default @@ -222,14 +226,15 @@ function update_config # the script returns an absolute path to the payload binary. if [ -f "$payloads/payload.sh" ]; then - local PAYLOAD=$(sh "$payloads/payload.sh" "$BUILD_NAME") - if [ $? -gt 0 ]; then + PAYLOAD=$(sh "$payloads/payload.sh" "$BUILD_NAME") + local PAYLOAD_OK=$? + if [ $PAYLOAD_OK -gt 0 ]; then echo "problem with payload" exit 1 fi if [ "$quiet" == "false" ]; then printf "Using payload %s\n" "$PAYLOAD"; fi elif [ "$payloads" = "none" ]; then - local PAYLOAD=none + PAYLOAD=none fi if [ "$PAYLOAD" = "none" ]; then @@ -257,9 +262,11 @@ function update_config if [ "$quiet" == "false" ]; then echo " $MAINBOARD ($customizing)"; fi echo "$configoptions" >> "${config_file}" - # shellcheck disable=SC2086 - $MAKE olddefconfig $silent "DOTCONFIG=${config_file}" "obj=${build_dir}" "objutil=$TARGET/sharedutils" &> "${build_dir}/config.log" - if [ $? -eq 0 ]; then + # shellcheck disable=SC2086 + $MAKE olddefconfig $silent "DOTCONFIG=${config_file}" "obj=${build_dir}" "objutil=$TARGET/sharedutils" &> "${build_dir}/config.log" ; \ + CONFIG_OK=$? + if [ $CONFIG_OK -eq 0 ]; then + # shellcheck disable=SC2086 $MAKE savedefconfig $silent DEFCONFIG="${defconfig_file}" DOTCONFIG="${config_file}" obj="${build_dir}" objutil="$TARGET/sharedutils" &> "${build_dir}/config.log" return $? else @@ -267,6 +274,7 @@ function update_config fi } +# shellcheck disable=SC2129 function create_buildenv { local BUILD_NAME=$1 @@ -280,22 +288,22 @@ function create_buildenv cp "$config_file" "$new_config_file" update_config "$BUILD_NAME" "$build_dir" "$new_config_file" fi - ret=$? + local ret=$? # Allow simple "make" in the target directory local MAKEFILE=$TARGET/${BUILD_NAME}/Makefile - echo "# autogenerated" > $MAKEFILE - echo "TOP=$ROOT" >> $MAKEFILE - echo "BUILD=$TARGET" >> $MAKEFILE - echo "OBJ=\$(BUILD)/${MAINBOARD}" >> $MAKEFILE - echo "OBJUTIL=\$(BUILD)/sharedutils" >> $MAKEFILE - echo "all:" >> $MAKEFILE - echo " @cp -a config.h config.h.bak" >> $MAKEFILE - echo " @cd \$(TOP); \$(MAKE) oldconfig DOTCONFIG=\$(OBJ)/config.build objutil=\$(OBJUTIL) obj=\$(OBJ)" >> $MAKEFILE - echo " @tail -n+6 config.h > config.new; tail -n+6 config.h.bak > config.old" >> $MAKEFILE - echo " @cmp -s config.new config.old && cp -a config.h.bak config.h || echo \"Config file changed\"" >> $MAKEFILE - echo " @rm config.h.bak config.new config.old" >> $MAKEFILE - echo " @cd \$(TOP); \$(MAKE) DOTCONFIG=\$(OBJ)/config.build objutil=\$(OBJUTIL) obj=\$(OBJ)" >> $MAKEFILE + echo "# autogenerated" > "$MAKEFILE" + echo "TOP=$ROOT" >> "$MAKEFILE" + echo "BUILD=$TARGET" >> "$MAKEFILE" + echo "OBJ=\$(BUILD)/${MAINBOARD}" >> "$MAKEFILE" + echo "OBJUTIL=\$(BUILD)/sharedutils" >> "$MAKEFILE" + echo "all:" >> "$MAKEFILE" + echo " @cp -a config.h config.h.bak" >> "$MAKEFILE" + echo " @cd \$(TOP); \$(MAKE) oldconfig DOTCONFIG=\$(OBJ)/config.build objutil=\$(OBJUTIL) obj=\$(OBJ)" >> "$MAKEFILE" + echo " @tail -n+6 config.h > config.new; tail -n+6 config.h.bak > config.old" >> "$MAKEFILE" + echo " @cmp -s config.new config.old && cp -a config.h.bak config.h || echo \"Config file changed\"" >> "$MAKEFILE" + echo " @rm config.h.bak config.new config.old" >> "$MAKEFILE" + echo " @cd \$(TOP); \$(MAKE) DOTCONFIG=\$(OBJ)/config.build objutil=\$(OBJUTIL) obj=\$(OBJ)" >> "$MAKEFILE" return $ret } @@ -322,41 +330,41 @@ function compile_target { local BUILD_NAME=$1 - if [ "$quiet" == "false" ]; then printf " Compiling $MAINBOARD image$cpuconfig...\n"; fi + if [ "$quiet" == "false" ]; then echo " Compiling $MAINBOARD image$cpuconfig..."; fi CURR=$( pwd ) #stime=`perl -e 'print time();' 2>/dev/null || date +%s` - eval $BUILDPREFIX $MAKE $silent DOTCONFIG=${build_dir}/config.build obj=${build_dir} objutil=$TARGET/sharedutils \ - &> ${build_dir}/make.log - ret=$? - cp .xcompile ${build_dir}/xcompile.build - cd ${build_dir} - - etime=`perl -e 'print time();' 2>/dev/null || date +%s` - duration=$(( $etime - $stime )) + # shellcheck disable=SC2086 + eval $BUILDPREFIX $MAKE $silent DOTCONFIG="${build_dir}/config.build" obj="${build_dir}" objutil="$TARGET/sharedutils" \ + &> "${build_dir}/make.log" ; \ + MAKE_FAILED=$? + cp .xcompile "${build_dir}/xcompile.build" + cd "${build_dir}" || return $? + + etime=$(perl -e 'print time();' 2>/dev/null || date +%s) + duration=$(( etime - stime )) junit " <testcase classname='board${testclass/#/.}' name='$BUILD_NAME' time='$duration' >" - if [ $ret -eq 0 ]; then + if [ $MAKE_FAILED -eq 0 ]; then junit "<system-out>" junitfile make.log junit "</system-out>" printf "ok\n" > compile.status - printf "$BUILD_NAME built successfully. (took ${duration}s)\n" + printf "%s built successfully. (took %ss)\n" "$BUILD_NAME" "${duration}" else - ret=1 junit "<failure type='BuildFailed'>" junitfile make.log junit "</failure>" printf "failed\n" > compile.status - printf "$BUILD_NAME build FAILED after ${duration}s!\nLog excerpt:\n" + printf "%s build FAILED after %ss!\nLog excerpt:\n" "$BUILD_NAME" "${duration}" tail -n $CONTEXT make.log 2> /dev/null || tail -$CONTEXT make.log failed=1 fi - cd $CURR - if [ $clean_work = "true" ]; then - rm -rf ${build_dir} + cd "$CURR" || return $? + if [ "$clean_work" = "true" ]; then + rm -rf "${build_dir}" fi - return $ret + return $MAKE_FAILED } function build_config @@ -365,11 +373,13 @@ function build_config local build_dir=$2 local BUILD_NAME=$3 local config_file=$4 + local board_srcdir + local ret - local board_srcdir=$(mainboard_directory "${MAINBOARD}") + board_srcdir=$(mainboard_directory "${MAINBOARD}") - if [ "$(cat "${build_dir}/compile.status" 2>/dev/null)" = "ok" -a \ - "$buildall" = "false" ]; then + if [ "$(cat "${build_dir}/compile.status" 2>/dev/null)" = "ok" ] && \ + [ "$buildall" = "false" ]; then echo "Skipping $BUILD_NAME; (already successful)" return fi @@ -389,7 +399,7 @@ function build_config if [ "$quiet" == "false" ]; then echo "Building $BUILD_NAME"; fi mkdir -p "$TARGET/${BUILD_NAME}" "$TARGET/abuild" - ABSPATH="$(cd "$TARGET/abuild"; pwd)" + ABSPATH="$(cd "$TARGET/abuild" && pwd)" XMLFILE="$ABSPATH/${BUILD_NAME}.xml" rm -f "${XMLFILE}" @@ -409,7 +419,7 @@ function build_config junitfile "$build_dir/config.log" junit "</failure>" printf "failed\n" > compile.status - printf "$BUILD_NAME build configuration FAILED!\nLog excerpt:\n" + printf "%s build configuration FAILED!\nLog excerpt:\n" "$BUILD_NAME" tail -n $CONTEXT "$build_dir/config.log" 2> /dev/null || tail -$CONTEXT "$build_dir/config.log" junit "</testcase>" @@ -417,25 +427,26 @@ function build_config fi - required_arches=`egrep "^CONFIG_ARCH_(BOOTBLOCK|R.MSTAGE|VERSTAGE)" $TARGET/${BUILD_NAME}/config.build | \ - sed "s,^CONFIG_ARCH_[^_]*_$[^=]*$=.*$,\1," |sort -u |tr 'A-Z\n\r' 'a-z '` - missing_arches=`printf 'include .xcompile\nall: ; @echo $(foreach arch,'"$required_arches"',$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch)))' | make --no-print-directory -f -` + required_arches=$(egrep "^CONFIG_ARCH_(BOOTBLOCK|R.MSTAGE|VERSTAGE)" "$TARGET/${BUILD_NAME}/config.build" | \ + sed "s,^CONFIG_ARCH_[^_]*_$[^=]*$=.*$,\1," |sort -u |tr 'A-Z\n\r' 'a-z ') + # shellcheck disable=SC2016,SC2059 + missing_arches=$(printf 'include .xcompile\nall: ; @echo $(foreach arch,'"$required_arches"',$(if $(filter $(arch),$(SUBARCH_SUPPORTED)),,$(arch)))' | make --no-print-directory -f -) if [ -n "$missing_arches" ]; then - printf "skipping $BUILD_NAME because we're missing compilers for ($missing_arches)\n" + printf "skipping %s because we're missing compilers for (%s)\n" "$BUILD_NAME" "$missing_arches" return fi - if [ $? -eq 0 -a $configureonly -eq 0 ]; then + if [ $BUILDENV_CREATED -eq 0 ] && [ $configureonly -eq 0 ]; then BUILDPREFIX= if [ "$scanbuild" = "true" ]; then scanbuild_out=$TARGET/${BUILD_NAME}-scanbuild - rm -rf ${scanbuild_out} + rm -rf "${scanbuild_out}" BUILDPREFIX="scan-build -o ${scanbuild_out}tmp" fi - compile_target ${BUILD_NAME} + compile_target "${BUILD_NAME}" if [ "$scanbuild" = "true" ]; then - mv ${scanbuild_out}tmp/* ${scanbuild_out} - rmdir ${scanbuild_out}tmp + mv "${scanbuild_out}"tmp/* "${scanbuild_out}" + rmdir "${scanbuild_out}tmp" fi fi @@ -446,11 +457,12 @@ function build_config function build_target { local MAINBOARD=$1 - local MAINBOARD_LC=$(echo "$MAINBOARD" | tr '[:upper:]' '[:lower:]') + local MAINBOARD_LC + MAINBOARD_LC=$(echo "$MAINBOARD" | tr '[:upper:]' '[:lower:]') # look for config files in the config directory that match the boardname if [ -n "$( find "$configdir" -maxdepth 1 -name "config.${MAINBOARD_LC}*" -print -quit )" ]; then - for config in "$configdir"/config."${MAINBOARD_LC}"*; do + for config in "$configdir/config.${MAINBOARD_LC}"*; do BUILD_NAME="${config##*/}" BUILD_NAME="${BUILD_NAME##config.}" BUILD_NAME=$(echo "${BUILD_NAME}" | tr '[:lower:]' '[:upper:]') @@ -485,7 +497,7 @@ function remove_target fi echo "Removing build dir for $BUILD_NAME..." - rm -rf "$TARGET/${BUILD_NAME}" + rm -rf "${TARGET:?}/${BUILD_NAME}" return } @@ -555,8 +567,8 @@ buildall=false verbose=false test -f util/sconfig/sconfig.l && ROOT=$( pwd ) -test -f ../util/sconfig/sconfig.l && ROOT=$( cd ..; pwd ) -test "$ROOT" = "" && ROOT=$( cd ../..; pwd ) +test -f ../util/sconfig/sconfig.l && ROOT=$( cd .. && pwd ) +test "$ROOT" = "" && ROOT=$( cd ../.. && pwd ) # Look if we have getopt. If not, build it. export PATH=$PATH:util/abuild @@ -566,18 +578,22 @@ getopt - > /dev/null 2>/dev/null || gcc -o util/abuild/getopt util/abuild/getopt cmdline="$* -c 1" # parse parameters.. try to find out whether we're running GNU getopt -getoptbrand="`getopt -V`" +getoptbrand="$(getopt -V)" + +# shellcheck disable=SC2086 if [ "${getoptbrand:0:6}" == "getopt" ]; then # Detected GNU getopt that supports long options. - args=`getopt -l version,verbose,quiet,help,all,target:,payloads:,cpus:,silent,junit,config,loglevel:,remove,prefix:,update,scan-build,ccache,blobs,clang,clean,outdir:,chromeos,xmlfile:,kconfig:,dir: -o Vvqhat:p:c:sJCl:rP:uyBLzo:xX:K:d: -- "$@"` || exit 1 + args=$(getopt -l version,verbose,quiet,help,all,target:,payloads:,cpus:,silent,junit,config,loglevel:,remove,prefix:,update,scan-build,ccache,blobs,clang,clean,outdir:,chromeos,xmlfile:,kconfig:,dir: -o Vvqhat:p:c:sJCl:rP:uyBLzo:xX:K:d: -- "$@") || exit 1 eval set -- $args + retval=$? else # Detected non-GNU getopt - args=`getopt Vvqhat:p:c:sJCl:rP:uyBLzo:xX:K:d: $*` + args=$(getopt Vvqhat:p:c:sJCl:rP:uyBLzo:xX:K:d: "$@") set -- $args + retval=$? fi -if [ $? != 0 ]; then +if [ $retval != 0 ]; then myhelp exit 1 fi @@ -590,7 +606,7 @@ configoptions="" unset testclass while true ; do case "$1" in - -J|--junit) shift; mode=junit; rm -f $XMLFILE ;; + -J|--junit) shift; mode=junit; rm -f "$XMLFILE" ;; -t|--target) shift; target="$1"; shift;; -a|--all) shift; buildall=true;; -d|--dir) shift; configdir="$1"; shift;; @@ -605,7 +621,7 @@ while true ; do cpus=$1 test "$MAKEFLAGS" == "-j max" && export MAKEFLAGS="-j" && cpuconfig=" in parallel" test "$1" == "1" && cpuconfig=" on 1 cpu" - expr "$1" : '-\?[0-9]\+$' > /dev/null && test 0$1 -gt 1 && cpuconfig=" on $1 cpus in parallel" + expr "$1" : '-\?[0-9]\+$' > /dev/null && test "0$1" -gt 1 && cpuconfig=" on $1 cpus in parallel" shift;; -s|--silent) shift; silent="-s";; --scan-build) shift @@ -653,7 +669,7 @@ while true ; do ;; -X|--xmlfile) shift; XMLFILE=$1; REAL_XMLFILE=$1; shift;; -K|--kconfig) shift - testclass=="$(basename $1 | tr '.' '_' )" + testclass="$(basename "$1" | tr '.' '_' )" customizing="${customizing}, $1 config" configoptions="$(cat "$1")${configoptions}\n" shift;; @@ -663,12 +679,12 @@ while true ; do esac done -if [ -z "$TARGET" -o "$TARGET" = "/" ]; then +if [ -z "$TARGET" ] || [ "$TARGET" = "/" ]; then echo "Please specify a valid, non-root build directory." exit 1 fi -customizing=`echo $customizing |cut -c3-` +customizing=$(echo "$customizing" | cut -c3-) if [ "$customizing" = "" ]; then customizing="default configuration" fi @@ -692,44 +708,48 @@ build_targets() { local targets=${*-$(get_mainboards)} for MAINBOARD in $targets; do - build_target ${MAINBOARD} + build_target "${MAINBOARD}" done } else build_targets() { + local ABSPATH + local stime + local etime + local targets=${*-$(get_mainboards)} # seed shared utils - TMPCFG=`mktemp` - printf "$configoptions" > $TMPCFG - $MAKE -j $cpus DOTCONFIG=$TMPCFG obj=$TARGET/temp objutil=$TARGET/sharedutils allnoconfig - printf "$configoptions" >> $TMPCFG - yes "" 2>/dev/null | $MAKE -j $cpus DOTCONFIG=$TMPCFG obj=$TARGET/temp objutil=$TARGET/sharedutils oldconfig 2>/dev/null |head > /dev/null + TMPCFG=$(mktemp) + printf "%s" "$configoptions" > "$TMPCFG" + $MAKE -j "$cpus" DOTCONFIG="$TMPCFG" obj="$TARGET/temp" objutil="$TARGET/sharedutils" allnoconfig + printf "%s" "$configoptions" >> "$TMPCFG" + yes "" 2>/dev/null | $MAKE -j "$cpus" DOTCONFIG="$TMPCFG" obj="$TARGET/temp" objutil="$TARGET/sharedutils" oldconfig 2>/dev/null |head > /dev/null BUILDPREFIX= if [ "$scanbuild" = "true" ]; then scanbuild_out=$TARGET/sharedutils-scanbuild - rm -rf ${scanbuild_out} + rm -rf "${scanbuild_out}" BUILDPREFIX="scan-build -o ${scanbuild_out}tmp" fi - mkdir -p $TARGET/abuild - local ABSPATH=`cd $TARGET/abuild; pwd` - local XMLFILE=$ABSPATH/__util.xml - rm -f ${XMLFILE} - local stime=`perl -e 'print time();' 2>/dev/null || date +%s` - $BUILDPREFIX $MAKE -j $cpus DOTCONFIG=$TMPCFG obj=$TARGET/temp objutil=$TARGET/sharedutils tools > $TARGET/sharedutils/make.log 2>&1 + mkdir -p "$TARGET/abuild" + ABSPATH="$(cd "$TARGET/abuild" && pwd)" + local XMLFILE="$ABSPATH/__util.xml" + rm -f "${XMLFILE}" + stime=$(perl -e 'print time();' 2>/dev/null || date +%s) + $BUILDPREFIX $MAKE -j "$cpus" DOTCONFIG="$TMPCFG" obj="$TARGET/temp" objutil="$TARGET/sharedutils" tools > "$TARGET/sharedutils/make.log" 2>&1 local ret=$? - local etime=`perl -e 'print time();' 2>/dev/null || date +%s` - local duration=$(( $etime - $stime )) + etime=$(perl -e 'print time();' 2>/dev/null || date +%s) + local duration=$(( etime - stime )) junit " <testcase classname='util' name='all' time='$duration' >" if [ $ret -eq 0 ]; then junit "<system-out>" - junitfile $TARGET/sharedutils/make.log + junitfile "$TARGET/sharedutils/make.log" junit "</system-out>" junit "</testcase>" else junit "<failure type='BuildFailed'>" - junitfile $TARGET/sharedutils/make.log + junitfile "$TARGET/sharedutils/make.log" junit "</failure>" junit "</testcase>" return @@ -739,11 +759,12 @@ build_targets() fi if [ "$scanbuild" = "true" ]; then - mv ${scanbuild_out}tmp/* ${scanbuild_out} - rmdir ${scanbuild_out}tmp + mv "${scanbuild_out}tmp/"* "${scanbuild_out}" + rmdir "${scanbuild_out}tmp" fi - rm -rf $TARGET/temp $TMPCFG - echo $targets | xargs -P ${cpus:-0} -n 1 $0 $cmdline -t + rm -rf "$TARGET/temp" "$TMPCFG" + # shellcheck disable=SC2086 + echo $targets | xargs -P ${cpus:-0} -n 1 "$0" $cmdline -t } fi @@ -756,33 +777,33 @@ junit '<testsuite>' if [ "$target" != "" ]; then # build a single board - MAINBOARD=$(normalize_target ${target}) + MAINBOARD=$(normalize_target "${target}") if [ -z "${MAINBOARD}" ]; then - printf "No such target: $target\n" + printf "No such target: %s\n" "$target" exit 1 fi - build_srcdir=$(mainboard_directory ${MAINBOARD}) - if [ "$(echo ${MAINBOARD} | wc -w)" -gt 1 ]; then - build_targets ${MAINBOARD} - elif [ ! -r $ROOT/src/mainboard/${build_srcdir} ]; then - printf "No such target: ${MAINBOARD}\n" + build_srcdir="$(mainboard_directory "${MAINBOARD}")" + if [ "$(echo "${MAINBOARD}" | wc -w)" -gt 1 ]; then + build_targets "${MAINBOARD}" + elif [ ! -r "$ROOT/src/mainboard/${build_srcdir}" ]; then + echo "No such target: ${MAINBOARD}" exit 1 else - build_target ${MAINBOARD} + build_target "${MAINBOARD}" test "$mode" != "text" && \ - test -f $TARGET/abuild/${MAINBOARD}.xml && \ - cat $TARGET/abuild/${MAINBOARD}.xml >> $REAL_XMLFILE + test -f "$TARGET/abuild/${MAINBOARD}.xml" && \ + cat "$TARGET/abuild/${MAINBOARD}.xml" >> "$REAL_XMLFILE" XMLFILE=$REAL_XMLFILE fi else build_targets - rm -f $REAL_XMLFILE - XMLFILE=$REAL_XMLFILE + rm -f "$REAL_XMLFILE" + XMLFILE="$REAL_XMLFILE" junit '<?xml version="1.0" encoding="utf-8"?>' junit '<testsuite>' if [ "$mode" != "text" ]; then for xmlfile in $TARGET/abuild/*_*.xml; do - cat $xmlfile >> $REAL_XMLFILE + cat "$xmlfile" >> "$REAL_XMLFILE" done fi XMLFILE=$REAL_XMLFILE

1 0

Patch merged into coreboot/master: abuild: Build saved config files
by gerrit＠coreboot.org 08 Dec '16

08 Dec '16

the following patch was just integrated into master: commit 26174c97fe00bbb57a0543fce2b30a8877054f60 Author: Martin Roth <martinroth(a)google.com> Date: Wed Nov 23 18:47:53 2016 -0700 abuild: Build saved config files Update abuild to allow for building saved miniconfig files. If one or more config files exist for a platform under coreboot/configs, they will be built instead of the automatically generated default config. The config filename needs to start with "config.$VENDOR_$BOARD" to be picked up by the abuild script. - Update to version 0.10.0 - Add -d parameter to specify the saved config file directory - Break 2nd half of create_config function into update_config to set the payload for saved config files. - Unset new payload Kconfig options that could be set in a saved config file. - Update a bunch of MAINBOARD variable names to BUILD_NAME since the build name isn't necessarily the same as the mainboard name. - Split build_target into two functions - build_target and build_config because one mainboard can now build multiple configurations. - Update remove target and call it directly from build_target() instead of from build_targets() Change-Id: I1a276d3e507b178f7dcd9dc125fa9c59f1ab47bd Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17590 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/17590 for details. -gerrit

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Patch merged into coreboot/master: util/kconfig/conf.c: Fix newline in error printf
by gerrit＠coreboot.org 08 Dec '16

08 Dec '16

the following patch was just integrated into master: commit c01ff74a6a1e641b2f7e1e73da1742a500be7805 Author: Martin Roth <martinroth(a)google.com> Date: Tue Dec 6 14:28:44 2016 -0700 util/kconfig/conf.c: Fix newline in error printf For some reason the \n in the defconfig save error was not escaped. Change-Id: I6a76b258f461a194fe17aae2b4fa04326b46d8d6 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17742 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)googlemail.com> See https://review.coreboot.org/17742 for details. -gerrit

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Patch merged into coreboot/master: util/lint: Add check to verify saved configs are miniconfigs
by gerrit＠coreboot.org 08 Dec '16

08 Dec '16

the following patch was just integrated into master: commit 21c99af0c82fc8fd00b91e8bea6a454f0cd251ac Author: Martin Roth <martinroth(a)google.com> Date: Thu Nov 24 13:16:28 2016 -0700 util/lint: Add check to verify saved configs are miniconfigs Change-Id: Ifc5ec645dd27663c1b1fde9ff16d48534606a554 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17600 Reviewed-by: Nico Huber <nico.h(a)gmx.de> Tested-by: build bot (Jenkins) See https://review.coreboot.org/17600 for details. -gerrit

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coreboot-gerrit December 2016