coreboot-gerrit December 2016

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: util/docker: Add a makefile for common docker tasks
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit cbaab7ee3cf1080a98fe376564e5aadfe169c1d6 Author: Martin Roth <martinroth(a)google.com> Date: Wed Aug 31 21:26:17 2016 -0600 util/docker: Add a makefile for common docker tasks Commands for working with docker images: build-coreboot-sdk - Build coreboot-sdk container upload-coreboot-sdk - Upload coreboot-sdk to hub.docker.com build-coreboot-jenkins-node - Build coreboot-jenkins-node container upload-coreboot-jenkins-node - Upload coreboot-jenkins-node to hub.docker.com clean_coreboot_containers - remove all docker coreboot containers clean_coreboot_images - remove all docker coreboot images Commands for using docker images docker_build_coreboot <BUILD_CMD=target> - Build coreboot under coreboot-sdk docker_abuild <ABUILD_ARGS='-a -B'> - Run abuild under coreboot-sdk Change-Id: I3a75b0615747d32f593948f53eab076f303271bf Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/16388 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)googlemail.com> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/16388 for details. -gerrit

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Patch set updated for coreboot: lint/kconfig_lint: Make sure all symbols have a type defined
by Martin Roth 12 Dec '16

12 Dec '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17345 -gerrit commit 1a29dc514975f6c755b7e28a062650096c12e4a7 Author: Martin Roth <martinroth(a)google.com> Date: Wed Nov 9 14:27:00 2016 -0700 lint/kconfig_lint: Make sure all symbols have a type defined Show an error if a symbol does not have a defined type. This caused a problem of an undefined symbol in check_defaults, so we just skip those symbols there as we can't verify the default pattern without knowing the type. Change-Id: I28711a77962e16f6fc89789400363edd0fdd0931 Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/lint/kconfig_lint | 29 +++++++++++++++++++++++++++++ util/lint/kconfig_lint_README | 1 + 2 files changed, 30 insertions(+) diff --git a/util/lint/kconfig_lint b/util/lint/kconfig_lint index ae10c03..bbf3e38 100755 --- a/util/lint/kconfig_lint +++ b/util/lint/kconfig_lint @@ -85,6 +85,7 @@ sub Main { load_config($config_file) if ($config_file); + check_type(); check_defaults(); check_referenced_symbols(); @@ -273,6 +274,31 @@ sub check_for_def { } #------------------------------------------------------------------------------- +# check_type - Make sure that all symbols have a type defined. +# +# Conflicting types are found when parsing the Kconfig tree. +#------------------------------------------------------------------------------- +sub check_type { + + # loop through each defined symbol + foreach my $sym ( sort ( keys %symbols ) ) { + + # Make sure there's a type set for the symbol + if (!defined $symbols{$sym}{type}) { + + #loop through each instance of that symbol + for ( my $sym_num = 0 ; $sym_num <= $symbols{$sym}{count} ; $sym_num++ ) { + + my $filename = $symbols{$sym}{$sym_num}{file}; + my $line_no = $symbols{$sym}{$sym_num}{line_no}; + + show_error("No type defined for symbol $sym defined at $filename:$line_no."); + } + } + } +} + +#------------------------------------------------------------------------------- # check_is_enabled - The IS_ENABLED() macro is only valid for symbols of type # bool. It would probably work on type hex or int if the value was 0 or 1, but # this seems like a bad plan. Using it on strings is dead out. @@ -333,6 +359,9 @@ sub check_defaults { my $filename = $symbols{$sym}{$sym_num}{file}; my $line_no = $symbols{$sym}{$sym_num}{default}{$def_num}{default_line_no}; + # Make sure there's a type set for the symbol + next if (!defined $symbols{$sym}{type}); + # skip good defaults if (! ((($symbols{$sym}{type} eq "hex") && ($symbols{$sym}{$sym_num}{default}{$def_num}{default} =~ /^0x/)) || (($symbols{$sym}{type} eq "int") && ($symbols{$sym}{$sym_num}{default}{$def_num}{default} =~ /^[-0-9]+$/)) || diff --git a/util/lint/kconfig_lint_README b/util/lint/kconfig_lint_README index 5a5eacd..c36320e 100644 --- a/util/lint/kconfig_lint_README +++ b/util/lint/kconfig_lint_README @@ -89,6 +89,7 @@ Errors in Kconfig that are also caught by Kconfig itself: int in another location. - Type keywords (bool, int, hex, string) used outside of a config block. - Using a 'prompt' keyword not inside a config or choice block. +- Symbols with no defined type. Errors in coreboot source files: - The IS_ENABLED macro is only valid for bool symbols.

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Patch merged into coreboot/master: google/pyro: Set PL2 override to 15000mW
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit a0f6f9bdbc609e60b64a9d1551006c4cffedc977 Author: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Date: Fri Dec 9 11:42:05 2016 +0800 google/pyro: Set PL2 override to 15000mW This patch sets PL2 override value to 15W in RAPL registers and sets DPTF PL2 Max to 15W BUG=none BRANCH=reef TEST=emerge-pyro coreboot Change-Id: Ibadf0fa442f556d018c249b1cf88e29c4d57c97f Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Reviewed-on: https://review.coreboot.org/17779 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/17779 for details. -gerrit

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Patch set updated for coreboot: util/lint: add check for auto-included headers
by Martin Roth 12 Dec '16

12 Dec '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17658 -gerrit commit a06418b866a9e459bbeaa5a9cfb5c5abd380302f Author: Martin Roth <martinroth(a)google.com> Date: Wed Nov 30 10:29:39 2016 -0700 util/lint: add check for auto-included headers Since we've removed them from the tree, add a check to keep them out. Change-Id: I2995da765fee8796a297963d54a1c34f56376efe Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/lint/lint-stable-019-header-files | 36 ++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/util/lint/lint-stable-019-header-files b/util/lint/lint-stable-019-header-files new file mode 100755 index 0000000..e98c3b5 --- /dev/null +++ b/util/lint/lint-stable-019-header-files @@ -0,0 +1,36 @@ +#!/bin/sh +# This file is part of the coreboot project. +# +# Copyright (C) 2016 Google Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# DESCR: Check for auto-included headers + +LC_ALL=C export LC_ALL + +INCLUDED_DIRS='^src/' +EXCLUDED_FILES='src/include/kconfig.h' + +# TODO: Add rules when those patches are complete +HEADER_FILES="k*config" + +# Use git grep if the code is in a git repo, otherwise use grep. +if [ -n "$(command -v git)" ] && [ -d .git ]; then + GREP_FILES="git grep -n" +else + GREP_FILES="grep -rn" +fi + +for header in $HEADER_FILES; do + ${GREP_FILES} "#\s*include\s\+[\"<]\s*${header}\.h\s*[\">]" | \ + grep "$INCLUDED_DIRS" | \ + grep -v "$EXCLUDED_FILES"; \ +done \ No newline at end of file

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Patch merged into coreboot/master: Makefile.inc: Update what-jenkins-does target
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit 8d49d52ae930de51633c6533f61a710235399dad Author: Martin Roth <martinroth(a)google.com> Date: Wed Oct 12 14:40:26 2016 -0600 Makefile.inc: Update what-jenkins-does target - Update the junit.xml target to make it less util specific - Add builds of coreboot internal payloads: nvramcui and coreinfo Change-Id: I97fda909065659ab7fa4c8ee00d936d97b255bf7 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17014 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/17014 for details. -gerrit

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Patch merged into coreboot/master: util/abuild: Add more error handling for command line options
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit 9fdb41ab9a60c59d1c3ae727da7247f1de46c9d3 Author: Martin Roth <martinroth(a)google.com> Date: Tue Dec 6 09:51:54 2016 -0700 util/abuild: Add more error handling for command line options - Show an error if a directory is added after the command line options to catch scripts using the old parameters. - If an invalid parameter is specified, show the parameter. Change-Id: Ie8948361f1c51e89a99bdb13df8c554747cd521d Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17741 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/17741 for details. -gerrit

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Patch merged into coreboot/master: util/abuild: Add argument -R to specify root directory
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit 5b0d2dbdceacca09b9758a92ad078aa18256d469 Author: Martin Roth <martinroth(a)google.com> Date: Tue Dec 6 09:18:36 2016 -0700 util/abuild: Add argument -R to specify root directory cbroot was previously specified by just adding it to the end of the command line with no explicit identifier. This change allows it to go anywhere in the command line and adds the -R or --root identifier. This makes the command line more consistent. Most of the time, this argument isn't even needed, as the automatic detection finds cbroot. Change-Id: I1d6fd8f51765d0d8b29be8af1e8105e06dd44cc8 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17740 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/17740 for details. -gerrit

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Patch merged into coreboot/master: util/abuild: Clean up usage
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit b06bfa4d39b64968b152e6e5bcd165d22ceb21de Author: Martin Roth <martinroth(a)google.com> Date: Mon Dec 5 09:15:33 2016 -0700 util/abuild: Clean up usage - Indent with spaces for consistency - Change lbroot to cbroot - Remove incomplete list of options from usage line - Capitalize first word of all option text - Alphabetize options other than version and help - Move version and help options to the end Change-Id: Id5bd4db8d7e3705cbbb93895a46a3608cd1b09e2 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17724 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/17724 for details. -gerrit

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Patch merged into coreboot/master: util/abuild: Fix or disable shellcheck warnings
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit 02c93b9b1fb2a6fef9c90cc7aef16777e022698b Author: Martin Roth <martinroth(a)google.com> Date: Wed Nov 30 16:32:20 2016 -0700 util/abuild: Fix or disable shellcheck warnings This cleans up the shellcheck warnings in abuild. Warning count: 1 Unexpected ==. 1 Use "${var:?}" to ensure this never expands to / . 1 VARIABLE appears unused. Verify it or export it. 1 Use "$@" (with quotes) to prevent whitespace problems. 2 Consider using { cmd1; cmd2; } >> file instead of individual redirects. 2 Expressions don't expand in single quotes, use double quotes for that. 3 Prefer [ p ] || [ q ] as [ p -o q ] is not well defined. 4 $/${} is unnecessary on arithmetic variables. 5 Check exit code directly with 'if mycmd;', not indirectly with $?. 5 Use cd ... || exit in case cd fails. 11 Declare and assign separately to avoid masking return values. 13 Use $(..) instead of legacy `..`. 20 Don't use variables in the printf format string. 104 Double quote to prevent globbing. Change-Id: I9c77e122435ba87ce3a4aee76b5022f7265f9ef2 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17722 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/17722 for details. -gerrit

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New patch to review for coreboot: Remove #include "lib/generic_sdram.c"
by Arthur Heymans 12 Dec '16

12 Dec '16

Arthur Heymans (arthur(a)aheymans.xyz) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17795 -gerrit commit 5efd4513c01a8e2f9070cf5ae92950d7a4329a61 Author: Arthur Heymans <arthur(a)aheymans.xyz> Date: Mon Dec 12 01:18:48 2016 +0100 Remove #include "lib/generic_sdram.c" Change-Id: Id595cabbc7092520957ab307444da14d624c2fb9 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- src/lib/Makefile.inc | 2 ++ src/mainboard/aaeon/pfm-540i_revb/romstage.c | 1 - src/mainboard/amd/db800/romstage.c | 1 - src/mainboard/amd/dbm690t/romstage.c | 1 - src/mainboard/amd/f2950/romstage.c | 1 - src/mainboard/amd/mahogany/romstage.c | 1 - src/mainboard/amd/norwich/romstage.c | 1 - src/mainboard/amd/pistachio/romstage.c | 1 - src/mainboard/amd/rumba/romstage.c | 1 - src/mainboard/amd/serengeti_cheetah/romstage.c | 1 - src/mainboard/artecgroup/dbe61/romstage.c | 1 - src/mainboard/asrock/939a785gmh/romstage.c | 1 - src/mainboard/asus/a8n_e/romstage.c | 1 - src/mainboard/asus/a8v-e_deluxe/romstage.c | 1 - src/mainboard/asus/a8v-e_se/romstage.c | 1 - src/mainboard/asus/k8v-x/romstage.c | 1 - src/mainboard/asus/kfsn4-dre_k8/romstage.c | 1 - src/mainboard/asus/m2n-e/romstage.c | 1 - src/mainboard/asus/m2v-mx_se/romstage.c | 1 - src/mainboard/asus/m2v/romstage.c | 1 - src/mainboard/bachmann/ot200/romstage.c | 1 - src/mainboard/broadcom/blast/romstage.c | 1 - src/mainboard/digitallogic/msm800sev/romstage.c | 1 - src/mainboard/gigabyte/ga_2761gxdk/romstage.c | 1 - src/mainboard/gigabyte/m57sli/romstage.c | 1 - src/mainboard/hp/dl145_g1/romstage.c | 1 - src/mainboard/hp/dl145_g3/romstage.c | 1 - src/mainboard/iei/pcisa-lx-800-r10/romstage.c | 1 - src/mainboard/iei/pm-lx-800-r11/romstage.c | 1 - src/mainboard/iei/pm-lx2-800-r10/romstage.c | 1 - src/mainboard/intel/eagleheights/romstage.c | 1 - src/mainboard/intel/mtarvon/romstage.c | 1 - src/mainboard/intel/truxton/romstage.c | 1 - src/mainboard/iwill/dk8_htx/romstage.c | 1 - src/mainboard/kontron/kt690/romstage.c | 1 - src/mainboard/lippert/frontrunner/romstage.c | 1 - src/mainboard/lippert/hurricane-lx/romstage.c | 1 - src/mainboard/lippert/literunner-lx/romstage.c | 1 - src/mainboard/lippert/roadrunner-lx/romstage.c | 1 - src/mainboard/lippert/spacerunner-lx/romstage.c | 1 - src/mainboard/msi/ms7135/romstage.c | 1 - src/mainboard/msi/ms7260/romstage.c | 1 - src/mainboard/msi/ms9185/romstage.c | 1 - src/mainboard/msi/ms9282/romstage.c | 1 - src/mainboard/nvidia/l1_2pvv/romstage.c | 1 - src/mainboard/pcengines/alix1c/romstage.c | 1 - src/mainboard/pcengines/alix2d/romstage.c | 1 - src/mainboard/siemens/sitemp_g1p1/romstage.c | 1 - src/mainboard/sunw/ultra40/romstage.c | 1 - src/mainboard/sunw/ultra40m2/romstage.c | 1 - src/mainboard/supermicro/h8dme/romstage.c | 1 - src/mainboard/supermicro/h8dmr/romstage.c | 1 - src/mainboard/technexion/tim5690/romstage.c | 1 - src/mainboard/technexion/tim8690/romstage.c | 1 - src/mainboard/traverse/geos/romstage.c | 1 - src/mainboard/tyan/s2912/romstage.c | 1 - src/mainboard/winent/mb6047/romstage.c | 1 - src/mainboard/winent/pl6064/romstage.c | 1 - src/mainboard/wyse/s50/romstage.c | 1 - src/northbridge/amd/amdk8/Kconfig | 1 + src/northbridge/amd/gx2/Kconfig | 1 + src/northbridge/amd/lx/Kconfig | 1 + src/northbridge/intel/i3100/Kconfig | 1 + 63 files changed, 6 insertions(+), 58 deletions(-) diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 55d19d0..f5bf670 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -94,6 +94,8 @@ ramstage-y += romstage_stack.c romstage-y += stack.c ramstage-y += rtc.c +romstage-$(CONFIG_GENERIC_SDRAM) += generic_sdram.c + ifeq ($(CONFIG_EARLY_CBMEM_INIT),y) romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c diff --git a/src/mainboard/aaeon/pfm-540i_revb/romstage.c b/src/mainboard/aaeon/pfm-540i_revb/romstage.c index 946b825..7bf009f 100644 --- a/src/mainboard/aaeon/pfm-540i_revb/romstage.c +++ b/src/mainboard/aaeon/pfm-540i_revb/romstage.c @@ -45,7 +45,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/amd/db800/romstage.c b/src/mainboard/amd/db800/romstage.c index d93e916..2b530a3 100644 --- a/src/mainboard/amd/db800/romstage.c +++ b/src/mainboard/amd/db800/romstage.c @@ -40,7 +40,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/amd/dbm690t/romstage.c b/src/mainboard/amd/dbm690t/romstage.c index 26275b6..39a3432 100644 --- a/src/mainboard/amd/dbm690t/romstage.c +++ b/src/mainboard/amd/dbm690t/romstage.c @@ -49,7 +49,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/amd/f2950/romstage.c b/src/mainboard/amd/f2950/romstage.c index 318149d..94c74fb 100644 --- a/src/mainboard/amd/f2950/romstage.c +++ b/src/mainboard/amd/f2950/romstage.c @@ -43,7 +43,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/amd/mahogany/romstage.c b/src/mainboard/amd/mahogany/romstage.c index 1e0000e..29ddbf7 100644 --- a/src/mainboard/amd/mahogany/romstage.c +++ b/src/mainboard/amd/mahogany/romstage.c @@ -50,7 +50,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/amd/norwich/romstage.c b/src/mainboard/amd/norwich/romstage.c index b5e7853..0a551f2 100644 --- a/src/mainboard/amd/norwich/romstage.c +++ b/src/mainboard/amd/norwich/romstage.c @@ -36,7 +36,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/amd/pistachio/romstage.c b/src/mainboard/amd/pistachio/romstage.c index 549ad0c..20a1645 100644 --- a/src/mainboard/amd/pistachio/romstage.c +++ b/src/mainboard/amd/pistachio/romstage.c @@ -45,7 +45,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/amd/rumba/romstage.c b/src/mainboard/amd/rumba/romstage.c index 1d533bd..8cf7892 100644 --- a/src/mainboard/amd/rumba/romstage.c +++ b/src/mainboard/amd/rumba/romstage.c @@ -39,7 +39,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include <northbridge/amd/gx2/raminit.h> #include "northbridge/amd/gx2/pll_reset.c" #include "northbridge/amd/gx2/raminit.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_gx2/cpureginit.c" #include "cpu/amd/geode_gx2/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/amd/serengeti_cheetah/romstage.c b/src/mainboard/amd/serengeti_cheetah/romstage.c index 5179448..2e6092c 100644 --- a/src/mainboard/amd/serengeti_cheetah/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah/romstage.c @@ -67,7 +67,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> diff --git a/src/mainboard/artecgroup/dbe61/romstage.c b/src/mainboard/artecgroup/dbe61/romstage.c index 7cf902e..f0e40d9 100644 --- a/src/mainboard/artecgroup/dbe61/romstage.c +++ b/src/mainboard/artecgroup/dbe61/romstage.c @@ -48,7 +48,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index cbe320b..75c0e65 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -52,7 +52,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/asus/a8n_e/romstage.c b/src/mainboard/asus/a8n_e/romstage.c index 4965c4f..031ee2f 100644 --- a/src/mainboard/asus/a8n_e/romstage.c +++ b/src/mainboard/asus/a8n_e/romstage.c @@ -54,7 +54,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) } #include "northbridge/amd/amdk8/raminit.c" -#include "lib/generic_sdram.c" #include <southbridge/nvidia/ck804/early_setup_ss.h> #include "southbridge/nvidia/ck804/early_setup.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/asus/a8v-e_deluxe/romstage.c b/src/mainboard/asus/a8v-e_deluxe/romstage.c index b8f631b..c469f1f 100644 --- a/src/mainboard/asus/a8v-e_deluxe/romstage.c +++ b/src/mainboard/asus/a8v-e_deluxe/romstage.c @@ -76,7 +76,6 @@ void soft_reset(void) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit.c" -#include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/asus/a8v-e_se/romstage.c b/src/mainboard/asus/a8v-e_se/romstage.c index 4c74d0f..b936254 100644 --- a/src/mainboard/asus/a8v-e_se/romstage.c +++ b/src/mainboard/asus/a8v-e_se/romstage.c @@ -76,7 +76,6 @@ void soft_reset(void) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit.c" -#include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/asus/k8v-x/romstage.c b/src/mainboard/asus/k8v-x/romstage.c index 0f98062..20d5a3f 100644 --- a/src/mainboard/asus/k8v-x/romstage.c +++ b/src/mainboard/asus/k8v-x/romstage.c @@ -74,7 +74,6 @@ void soft_reset(void) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit.c" -#include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/asus/kfsn4-dre_k8/romstage.c b/src/mainboard/asus/kfsn4-dre_k8/romstage.c index 03a095d..abcc1af 100644 --- a/src/mainboard/asus/kfsn4-dre_k8/romstage.c +++ b/src/mainboard/asus/kfsn4-dre_k8/romstage.c @@ -56,7 +56,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> diff --git a/src/mainboard/asus/m2n-e/romstage.c b/src/mainboard/asus/m2n-e/romstage.c index 3bf54db..d0a0b88 100644 --- a/src/mainboard/asus/m2n-e/romstage.c +++ b/src/mainboard/asus/m2n-e/romstage.c @@ -55,7 +55,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <southbridge/nvidia/mcp55/early_setup_ss.h> diff --git a/src/mainboard/asus/m2v-mx_se/romstage.c b/src/mainboard/asus/m2v-mx_se/romstage.c index daf0b50..2ace81a 100644 --- a/src/mainboard/asus/m2v-mx_se/romstage.c +++ b/src/mainboard/asus/m2v-mx_se/romstage.c @@ -58,7 +58,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/asus/m2v/romstage.c b/src/mainboard/asus/m2v/romstage.c index c61557b..6e4d265 100644 --- a/src/mainboard/asus/m2v/romstage.c +++ b/src/mainboard/asus/m2v/romstage.c @@ -61,7 +61,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" #include "cpu/amd/model_fxx/fidvid.c" diff --git a/src/mainboard/bachmann/ot200/romstage.c b/src/mainboard/bachmann/ot200/romstage.c index 1908cd3..ef32ac8 100644 --- a/src/mainboard/bachmann/ot200/romstage.c +++ b/src/mainboard/bachmann/ot200/romstage.c @@ -37,7 +37,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/broadcom/blast/romstage.c b/src/mainboard/broadcom/blast/romstage.c index 33d939a..a79b966 100644 --- a/src/mainboard/broadcom/blast/romstage.c +++ b/src/mainboard/broadcom/blast/romstage.c @@ -39,7 +39,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> diff --git a/src/mainboard/digitallogic/msm800sev/romstage.c b/src/mainboard/digitallogic/msm800sev/romstage.c index 93c00cc..5f653b6 100644 --- a/src/mainboard/digitallogic/msm800sev/romstage.c +++ b/src/mainboard/digitallogic/msm800sev/romstage.c @@ -25,7 +25,6 @@ int spd_read_byte(unsigned device, unsigned address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c index 337423f..4a5b30d 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/romstage.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/romstage.c @@ -56,7 +56,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" diff --git a/src/mainboard/gigabyte/m57sli/romstage.c b/src/mainboard/gigabyte/m57sli/romstage.c index b12b12c..294ad63 100644 --- a/src/mainboard/gigabyte/m57sli/romstage.c +++ b/src/mainboard/gigabyte/m57sli/romstage.c @@ -63,7 +63,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/hp/dl145_g1/romstage.c b/src/mainboard/hp/dl145_g1/romstage.c index ea0b60c..d2eee1b 100644 --- a/src/mainboard/hp/dl145_g1/romstage.c +++ b/src/mainboard/hp/dl145_g1/romstage.c @@ -83,7 +83,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit.c" #include "resourcemap.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/hp/dl145_g3/romstage.c b/src/mainboard/hp/dl145_g3/romstage.c index 1d1195a..fed8a7a 100644 --- a/src/mainboard/hp/dl145_g3/romstage.c +++ b/src/mainboard/hp/dl145_g3/romstage.c @@ -66,7 +66,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include <spd.h> #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c index db1c843..b8f22ec 100644 --- a/src/mainboard/iei/pcisa-lx-800-r10/romstage.c +++ b/src/mainboard/iei/pcisa-lx-800-r10/romstage.c @@ -40,7 +40,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/iei/pm-lx-800-r11/romstage.c b/src/mainboard/iei/pm-lx-800-r11/romstage.c index ed13641..bef75f5 100644 --- a/src/mainboard/iei/pm-lx-800-r11/romstage.c +++ b/src/mainboard/iei/pm-lx-800-r11/romstage.c @@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include <northbridge/amd/lx/pll_reset.c> -#include <lib/generic_sdram.c> #include <cpu/amd/geode_lx/cpureginit.c> #include <cpu/amd/geode_lx/syspreinit.c> #include <cpu/amd/geode_lx/msrinit.c> diff --git a/src/mainboard/iei/pm-lx2-800-r10/romstage.c b/src/mainboard/iei/pm-lx2-800-r10/romstage.c index d35e9e7..92f25c6 100644 --- a/src/mainboard/iei/pm-lx2-800-r10/romstage.c +++ b/src/mainboard/iei/pm-lx2-800-r10/romstage.c @@ -44,7 +44,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include <northbridge/amd/lx/pll_reset.c> -#include <lib/generic_sdram.c> #include <cpu/amd/geode_lx/cpureginit.c> #include <cpu/amd/geode_lx/syspreinit.c> #include <cpu/amd/geode_lx/msrinit.c> diff --git a/src/mainboard/intel/eagleheights/romstage.c b/src/mainboard/intel/eagleheights/romstage.c index c254f17..7e6c798 100644 --- a/src/mainboard/intel/eagleheights/romstage.c +++ b/src/mainboard/intel/eagleheights/romstage.c @@ -68,7 +68,6 @@ static inline int spd_read_byte(u16 device, u8 address) #include <northbridge/intel/i3100/raminit.h> #include "northbridge/intel/i3100/memory_initialized.c" #include "northbridge/intel/i3100/raminit.c" -#include "lib/generic_sdram.c" #include "northbridge/intel/i3100/reset_test.c" #include <spd.h> diff --git a/src/mainboard/intel/mtarvon/romstage.c b/src/mainboard/intel/mtarvon/romstage.c index cb3e870..13c3eb3 100644 --- a/src/mainboard/intel/mtarvon/romstage.c +++ b/src/mainboard/intel/mtarvon/romstage.c @@ -42,7 +42,6 @@ static inline int spd_read_byte(u16 device, u8 address) } #include "northbridge/intel/i3100/raminit.c" -#include "lib/generic_sdram.c" #if 0 /* skip_romstage doesn't compile with gcc */ #include "arch/x86/lib/stages.c" #endif diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c index 4b64210..40209a1 100644 --- a/src/mainboard/intel/truxton/romstage.c +++ b/src/mainboard/intel/truxton/romstage.c @@ -39,7 +39,6 @@ static inline int spd_read_byte(u16 device, u8 address) } #include "northbridge/intel/i3100/raminit_ep80579.c" -#include "lib/generic_sdram.c" #define SERIAL_DEV PNP_DEV(0x4e, I3100_SP1) diff --git a/src/mainboard/iwill/dk8_htx/romstage.c b/src/mainboard/iwill/dk8_htx/romstage.c index c1c141e..dac204b 100644 --- a/src/mainboard/iwill/dk8_htx/romstage.c +++ b/src/mainboard/iwill/dk8_htx/romstage.c @@ -58,7 +58,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> diff --git a/src/mainboard/kontron/kt690/romstage.c b/src/mainboard/kontron/kt690/romstage.c index d25799f..7f65cec 100644 --- a/src/mainboard/kontron/kt690/romstage.c +++ b/src/mainboard/kontron/kt690/romstage.c @@ -49,7 +49,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/lippert/frontrunner/romstage.c b/src/mainboard/lippert/frontrunner/romstage.c index 8120704..748c446 100644 --- a/src/mainboard/lippert/frontrunner/romstage.c +++ b/src/mainboard/lippert/frontrunner/romstage.c @@ -65,7 +65,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include <northbridge/amd/gx2/raminit.h> #include "northbridge/amd/gx2/pll_reset.c" #include "northbridge/amd/gx2/raminit.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_gx2/cpureginit.c" #include "cpu/amd/geode_gx2/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/lippert/hurricane-lx/romstage.c b/src/mainboard/lippert/hurricane-lx/romstage.c index 7e3288f..f29ce43 100644 --- a/src/mainboard/lippert/hurricane-lx/romstage.c +++ b/src/mainboard/lippert/hurricane-lx/romstage.c @@ -71,7 +71,6 @@ static int smc_send_config(unsigned char config_data) #endif #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/lippert/literunner-lx/romstage.c b/src/mainboard/lippert/literunner-lx/romstage.c index 2f6aa46..eb60989 100644 --- a/src/mainboard/lippert/literunner-lx/romstage.c +++ b/src/mainboard/lippert/literunner-lx/romstage.c @@ -110,7 +110,6 @@ static int smc_send_config(unsigned char config_data) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/lippert/roadrunner-lx/romstage.c b/src/mainboard/lippert/roadrunner-lx/romstage.c index 7e0e2a5..421977e 100644 --- a/src/mainboard/lippert/roadrunner-lx/romstage.c +++ b/src/mainboard/lippert/roadrunner-lx/romstage.c @@ -47,7 +47,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/lippert/spacerunner-lx/romstage.c b/src/mainboard/lippert/spacerunner-lx/romstage.c index 85503c5..814b503 100644 --- a/src/mainboard/lippert/spacerunner-lx/romstage.c +++ b/src/mainboard/lippert/spacerunner-lx/romstage.c @@ -111,7 +111,6 @@ static int smc_send_config(unsigned char config_data) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/msi/ms7135/romstage.c b/src/mainboard/msi/ms7135/romstage.c index 620bc64..7e160d2 100644 --- a/src/mainboard/msi/ms7135/romstage.c +++ b/src/mainboard/msi/ms7135/romstage.c @@ -57,7 +57,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) } #include "northbridge/amd/amdk8/raminit.c" -#include "lib/generic_sdram.c" #include <southbridge/nvidia/ck804/early_setup_ss.h> #include "southbridge/nvidia/ck804/early_setup_car.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/msi/ms7260/romstage.c b/src/mainboard/msi/ms7260/romstage.c index b3f9d4e..476ddac 100644 --- a/src/mainboard/msi/ms7260/romstage.c +++ b/src/mainboard/msi/ms7260/romstage.c @@ -54,7 +54,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" diff --git a/src/mainboard/msi/ms9185/romstage.c b/src/mainboard/msi/ms9185/romstage.c index 6f5ff32..dc4f1f4 100644 --- a/src/mainboard/msi/ms9185/romstage.c +++ b/src/mainboard/msi/ms9185/romstage.c @@ -64,7 +64,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <spd.h> diff --git a/src/mainboard/msi/ms9282/romstage.c b/src/mainboard/msi/ms9282/romstage.c index 7d360e3..efe02a8 100644 --- a/src/mainboard/msi/ms9282/romstage.c +++ b/src/mainboard/msi/ms9282/romstage.c @@ -63,7 +63,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <southbridge/nvidia/mcp55/early_setup_ss.h> diff --git a/src/mainboard/nvidia/l1_2pvv/romstage.c b/src/mainboard/nvidia/l1_2pvv/romstage.c index d0966ee..9f3208c 100644 --- a/src/mainboard/nvidia/l1_2pvv/romstage.c +++ b/src/mainboard/nvidia/l1_2pvv/romstage.c @@ -53,7 +53,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" diff --git a/src/mainboard/pcengines/alix1c/romstage.c b/src/mainboard/pcengines/alix1c/romstage.c index c497434..a7b6193 100644 --- a/src/mainboard/pcengines/alix1c/romstage.c +++ b/src/mainboard/pcengines/alix1c/romstage.c @@ -94,7 +94,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/pcengines/alix2d/romstage.c b/src/mainboard/pcengines/alix2d/romstage.c index b467098..1fa5a97 100644 --- a/src/mainboard/pcengines/alix2d/romstage.c +++ b/src/mainboard/pcengines/alix2d/romstage.c @@ -92,7 +92,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/siemens/sitemp_g1p1/romstage.c b/src/mainboard/siemens/sitemp_g1p1/romstage.c index a7f2c96..5dbd3cc 100644 --- a/src/mainboard/siemens/sitemp_g1p1/romstage.c +++ b/src/mainboard/siemens/sitemp_g1p1/romstage.c @@ -65,7 +65,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/sunw/ultra40/romstage.c b/src/mainboard/sunw/ultra40/romstage.c index 397acfe..d51d431 100644 --- a/src/mainboard/sunw/ultra40/romstage.c +++ b/src/mainboard/sunw/ultra40/romstage.c @@ -48,7 +48,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <southbridge/nvidia/ck804/early_setup_ss.h> diff --git a/src/mainboard/sunw/ultra40m2/romstage.c b/src/mainboard/sunw/ultra40m2/romstage.c index a7489da..7542859 100644 --- a/src/mainboard/sunw/ultra40m2/romstage.c +++ b/src/mainboard/sunw/ultra40m2/romstage.c @@ -52,7 +52,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" diff --git a/src/mainboard/supermicro/h8dme/romstage.c b/src/mainboard/supermicro/h8dme/romstage.c index d85ae5b..067f336 100644 --- a/src/mainboard/supermicro/h8dme/romstage.c +++ b/src/mainboard/supermicro/h8dme/romstage.c @@ -62,7 +62,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <southbridge/nvidia/mcp55/early_setup_ss.h> diff --git a/src/mainboard/supermicro/h8dmr/romstage.c b/src/mainboard/supermicro/h8dmr/romstage.c index a7e69bd..cd7134ef 100644 --- a/src/mainboard/supermicro/h8dmr/romstage.c +++ b/src/mainboard/supermicro/h8dmr/romstage.c @@ -54,7 +54,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include <southbridge/nvidia/mcp55/early_setup_ss.h> diff --git a/src/mainboard/technexion/tim5690/romstage.c b/src/mainboard/technexion/tim5690/romstage.c index e534617..1eab911 100644 --- a/src/mainboard/technexion/tim5690/romstage.c +++ b/src/mainboard/technexion/tim5690/romstage.c @@ -50,7 +50,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/technexion/tim8690/romstage.c b/src/mainboard/technexion/tim8690/romstage.c index b1805a9..60f9154 100644 --- a/src/mainboard/technexion/tim8690/romstage.c +++ b/src/mainboard/technexion/tim8690/romstage.c @@ -50,7 +50,6 @@ static inline int spd_read_byte(u32 device, u32 address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" #include "cpu/amd/model_fxx/init_cpus.c" diff --git a/src/mainboard/traverse/geos/romstage.c b/src/mainboard/traverse/geos/romstage.c index 42c067f..c0cdda3 100644 --- a/src/mainboard/traverse/geos/romstage.c +++ b/src/mainboard/traverse/geos/romstage.c @@ -37,7 +37,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/tyan/s2912/romstage.c b/src/mainboard/tyan/s2912/romstage.c index 8c01272..f554e83 100644 --- a/src/mainboard/tyan/s2912/romstage.c +++ b/src/mainboard/tyan/s2912/romstage.c @@ -53,7 +53,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/incoherent_ht.c" #include "northbridge/amd/amdk8/coherent_ht.c" #include "northbridge/amd/amdk8/raminit_f.c" -#include "lib/generic_sdram.c" #include "resourcemap.c" #include "cpu/amd/dualcore/dualcore.c" diff --git a/src/mainboard/winent/mb6047/romstage.c b/src/mainboard/winent/mb6047/romstage.c index 3372f32..168219c 100644 --- a/src/mainboard/winent/mb6047/romstage.c +++ b/src/mainboard/winent/mb6047/romstage.c @@ -34,7 +34,6 @@ static inline int spd_read_byte(unsigned device, unsigned address) #include "northbridge/amd/amdk8/raminit.c" #include "northbridge/amd/amdk8/coherent_ht.c" -#include "lib/generic_sdram.c" #include "cpu/amd/dualcore/dualcore.c" #include <southbridge/nvidia/ck804/early_setup_ss.h> #include "southbridge/nvidia/ck804/early_setup_car.c" diff --git a/src/mainboard/winent/pl6064/romstage.c b/src/mainboard/winent/pl6064/romstage.c index a47b9dc..69488a6 100644 --- a/src/mainboard/winent/pl6064/romstage.c +++ b/src/mainboard/winent/pl6064/romstage.c @@ -42,7 +42,6 @@ int spd_read_byte(unsigned int device, unsigned int address) } #include "northbridge/amd/lx/pll_reset.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_lx/cpureginit.c" #include "cpu/amd/geode_lx/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/mainboard/wyse/s50/romstage.c b/src/mainboard/wyse/s50/romstage.c index 9e6c5b2..d102994 100644 --- a/src/mainboard/wyse/s50/romstage.c +++ b/src/mainboard/wyse/s50/romstage.c @@ -39,7 +39,6 @@ static inline int spd_read_byte(unsigned int device, unsigned int address) #include <northbridge/amd/gx2/raminit.h> #include "northbridge/amd/gx2/pll_reset.c" #include "northbridge/amd/gx2/raminit.c" -#include "lib/generic_sdram.c" #include "cpu/amd/geode_gx2/cpureginit.c" #include "cpu/amd/geode_gx2/syspreinit.c" #include "cpu/amd/geode_lx/msrinit.c" diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig index f1ee3c3..c5c91ec 100644 --- a/src/northbridge/amd/amdk8/Kconfig +++ b/src/northbridge/amd/amdk8/Kconfig @@ -20,6 +20,7 @@ config NORTHBRIDGE_AMD_AMDK8 select HAVE_DEBUG_CAR select HYPERTRANSPORT_PLUGIN_SUPPORT select LATE_CBMEM_INIT + select GENERIC_SDRAM if NORTHBRIDGE_AMD_AMDK8 config AGP_APERTURE_SIZE diff --git a/src/northbridge/amd/gx2/Kconfig b/src/northbridge/amd/gx2/Kconfig index fcba106..ab9597e 100644 --- a/src/northbridge/amd/gx2/Kconfig +++ b/src/northbridge/amd/gx2/Kconfig @@ -17,6 +17,7 @@ config NORTHBRIDGE_AMD_GX2 bool select GEODE_VSA select LATE_CBMEM_INIT + select GENERIC_SDRAM if NORTHBRIDGE_AMD_GX2 diff --git a/src/northbridge/amd/lx/Kconfig b/src/northbridge/amd/lx/Kconfig index abc3e4c..6143d4bb 100644 --- a/src/northbridge/amd/lx/Kconfig +++ b/src/northbridge/amd/lx/Kconfig @@ -2,6 +2,7 @@ config NORTHBRIDGE_AMD_LX bool select GEODE_VSA select LATE_CBMEM_INIT + select GENERIC_SDRAM if NORTHBRIDGE_AMD_LX diff --git a/src/northbridge/intel/i3100/Kconfig b/src/northbridge/intel/i3100/Kconfig index 2260664..f9fa486 100644 --- a/src/northbridge/intel/i3100/Kconfig +++ b/src/northbridge/intel/i3100/Kconfig @@ -2,6 +2,7 @@ config NORTHBRIDGE_INTEL_I3100 bool select LATE_CBMEM_INIT select UDELAY_IO + select GENERIC_SDRAM if NORTHBRIDGE_INTEL_I3100 config DIMM_MAP_LOGICAL

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coreboot-gerrit December 2016