coreboot-gerrit December 2016

coreboot-gerrit@coreboot.org

1 participants
1140 discussions

New patch to review for coreboot: google/eve: Make I2C3 pins as input
by Duncan Laurie 12 Dec '16

12 Dec '16

Duncan Laurie (dlaurie(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17800 -gerrit commit c594d02932840e3b75319aca405f47c92fc1d10a Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Mon Dec 12 10:43:45 2016 -0800 google/eve: Make I2C3 pins as input On this board i2c3 bus is connected to the display TCON, but it is acting as the master when it has power so it can read from its own EEPROM on the bus. In order to prevent any possible issues in S0 make these pins input on the SOC. BUG=chrome-os-partner:58666 TEST=tested on eve board, but this bus was not used before so there is no visible change in behavior. Change-Id: Ide32f45ee33ca986fd3249a5161e01edf99d6e22 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/mainboard/google/eve/devicetree.cb | 5 ++--- src/mainboard/google/eve/gpio.h | 4 ++-- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/src/mainboard/google/eve/devicetree.cb b/src/mainboard/google/eve/devicetree.cb index f757d31..c96faf7 100644 --- a/src/mainboard/google/eve/devicetree.cb +++ b/src/mainboard/google/eve/devicetree.cb @@ -163,7 +163,6 @@ chip soc/intel/skylake register "i2c_voltage[0]" = "I2C_VOLTAGE_3V3" # Touchscreen register "i2c_voltage[1]" = "I2C_VOLTAGE_3V3" # TPM register "i2c_voltage[2]" = "I2C_VOLTAGE_1V8" # Touchpad - register "i2c_voltage[3]" = "I2C_VOLTAGE_1V8" # Display register "i2c_voltage[4]" = "I2C_VOLTAGE_1V8" # Audio # Enable I2C1 bus early for TPM access @@ -175,7 +174,7 @@ chip soc/intel/skylake [PchSerialIoIndexI2C0] = PchSerialIoPci, [PchSerialIoIndexI2C1] = PchSerialIoPci, [PchSerialIoIndexI2C2] = PchSerialIoPci, - [PchSerialIoIndexI2C3] = PchSerialIoPci, + [PchSerialIoIndexI2C3] = PchSerialIoDisabled, [PchSerialIoIndexI2C4] = PchSerialIoPci, [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSpi0] = PchSerialIoPci, @@ -237,7 +236,7 @@ chip soc/intel/skylake device i2c 26 on end end end # I2C #2 - device pci 15.3 on end # I2C #3 + device pci 15.3 off end # I2C #3 device pci 16.0 on end # Management Engine Interface 1 device pci 16.1 off end # Management Engine Interface 2 device pci 16.2 off end # Management Engine IDE-R diff --git a/src/mainboard/google/eve/gpio.h b/src/mainboard/google/eve/gpio.h index 38d725e..c7a5e46 100644 --- a/src/mainboard/google/eve/gpio.h +++ b/src/mainboard/google/eve/gpio.h @@ -177,8 +177,8 @@ static const struct pad_config gpio_table[] = { /* I2S2_RXD */ PAD_CFG_GPI(GPP_F3, NONE, DEEP), /* I2C2_SDA */ PAD_CFG_NF_1V8(GPP_F4, NONE, DEEP, NF1), /* TOUCHPAD */ /* I2C2_SCL */ PAD_CFG_NF_1V8(GPP_F5, NONE, DEEP, NF1), /* TOUCHPAD */ -/* I2C3_SDA */ PAD_CFG_NF_1V8(GPP_F6, NONE, DEEP, NF1), /* DISPLAY */ -/* I2C3_SCL */ PAD_CFG_NF_1V8(GPP_F7, NONE, DEEP, NF1), /* DISPLAY */ +/* I2C3_SDA */ PAD_CFG_GPI(GPP_F6, NONE, DEEP), /* DISPLAY is master */ +/* I2C3_SCL */ PAD_CFG_GPI(GPP_F7, NONE, DEEP), /* DISPLAY is master */ /* I2C4_SDA */ PAD_CFG_NF_1V8(GPP_F8, NONE, DEEP, NF1), /* AUDIO1V8_SDA */ /* I2C4_SCL */ PAD_CFG_NF_1V8(GPP_F9, NONE, DEEP, NF1), /* AUDIO1V8_SCL */ /* I2C5_SDA */ PAD_CFG_GPI_APIC(GPP_F10, NONE, PLTRST), /* MIC_INT_L */

1 0

Patch set updated for coreboot: google/reef: Use exported GPIOs and ACPI regulator for touchscreen
by Furquan Shaikh 12 Dec '16

12 Dec '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17799 -gerrit commit f574a263a4a4284bf489f04d3b0e6776db86f47d Author: Furquan Shaikh <furquan(a)chromium.org> Date: Mon Dec 12 09:34:55 2016 -0800 google/reef: Use exported GPIOs and ACPI regulator for touchscreen ELAN touchscreen device expects firmware to export GPIOs and ACPI regulators for managing power to the device. Thus, provide the required ACPI elements for OS driver to properly manage this device. BUG=chrome-os-partner:60194 BRANCH=None TEST=Verified that touchscreen works properly on boot-up and after suspend/resume. Change-Id: I298ca5de9c0ae302309d87e3dffb65f9be1e882e Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/mainboard/google/reef/Kconfig | 3 +++ src/mainboard/google/reef/variants/baseboard/devicetree.cb | 9 ++++++--- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index 2cc391e..afe449f 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -49,6 +49,9 @@ config DRIVERS_I2C_WACOM config DRIVERS_PS2_KEYBOARD default y +config DRIVERS_REGULATOR_GPIO_REGULATOR + default y + config MAINBOARD_DIR string default google/reef diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index a0b53d6..19efe77 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -179,11 +179,14 @@ chip soc/intel/apollolake register "probed" = "1" register "pwr_mgmt_type" = "GPIO_EXPORT" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)" - register "reset_delay_ms" = "20" - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" - register "enable_delay_ms" = "1" device i2c 10 on end end + chip drivers/regulator/gpio_regulator + register "name" = ""vcc33"" + register "gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" + register "enabled_on_boot" = "1" + device generic 0 on end + end end # - I2C 3 device pci 17.0 on chip drivers/i2c/generic

1 0

Patch set updated for coreboot: drivers/regulator: Add driver for handling GPIO-based fixed regulator
by Furquan Shaikh 12 Dec '16

12 Dec '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17798 -gerrit commit 375932aea667c3fb7aee2d9bf73ea3650f667f45 Author: Furquan Shaikh <furquan(a)chromium.org> Date: Mon Dec 12 09:30:42 2016 -0800 drivers/regulator: Add driver for handling GPIO-based fixed regulator This change adds the required device node in SSDT for defining GPIO-based fixed voltage regulator. BUG=chrome-os-partner:60194 BRANCH=None TEST=Verified that ELAN touchscreen works with exported GPIOs and ACPI regulator. Change-Id: I4380aea0929fb7e81dbe83f940e3e51e983819f9 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/drivers/regulator/gpio_regulator/Kconfig | 17 ++++ src/drivers/regulator/gpio_regulator/Makefile.inc | 16 ++++ src/drivers/regulator/gpio_regulator/chip.h | 27 ++++++ .../regulator/gpio_regulator/gpio_regulator.c | 97 ++++++++++++++++++++++ 4 files changed, 157 insertions(+) diff --git a/src/drivers/regulator/gpio_regulator/Kconfig b/src/drivers/regulator/gpio_regulator/Kconfig new file mode 100644 index 0000000..cd1bb4e --- /dev/null +++ b/src/drivers/regulator/gpio_regulator/Kconfig @@ -0,0 +1,17 @@ +# +# This file is part of the coreboot project. +# +# Copyright 2016 Google Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +config DRIVERS_REGULATOR_GPIO_REGULATOR + bool diff --git a/src/drivers/regulator/gpio_regulator/Makefile.inc b/src/drivers/regulator/gpio_regulator/Makefile.inc new file mode 100644 index 0000000..8a65561 --- /dev/null +++ b/src/drivers/regulator/gpio_regulator/Makefile.inc @@ -0,0 +1,16 @@ +# +# This file is part of the coreboot project. +# +# Copyright 2016 Google Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +ramstage-$(CONFIG_DRIVERS_REGULATOR_GPIO_REGULATOR) += gpio_regulator.c diff --git a/src/drivers/regulator/gpio_regulator/chip.h b/src/drivers/regulator/gpio_regulator/chip.h new file mode 100644 index 0000000..aee8366 --- /dev/null +++ b/src/drivers/regulator/gpio_regulator/chip.h @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __DRIVERS_REGULATOR_GPIO_REGULATOR_H__ +#define __DRIVERS_REGULATOR_GPIO_REGULATOR_H__ + +#include <arch/acpi_device.h> + +struct drivers_regulator_gpio_regulator_config { + const char *name; + struct acpi_gpio gpio; + bool enabled_on_boot; +}; + +#endif /* __DRIVERS_REGULATOR_GPIO_REGULATOR_H__ */ diff --git a/src/drivers/regulator/gpio_regulator/gpio_regulator.c b/src/drivers/regulator/gpio_regulator/gpio_regulator.c new file mode 100644 index 0000000..b3e120b --- /dev/null +++ b/src/drivers/regulator/gpio_regulator/gpio_regulator.c @@ -0,0 +1,97 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpi_device.h> +#include <arch/acpigen.h> +#include <console/console.h> +#include <device/device.h> +#include <device/path.h> +#include <string.h> + +#include "chip.h" + +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + +#define GPIO_REGULATOR_HID "PRP0001" + +static void gpio_regulator_fill_ssdt_generator(struct device *dev) +{ + struct drivers_regulator_gpio_regulator_config *config = dev->chip_info; + const char *scope = acpi_device_scope(dev); + const char *path = acpi_device_path(dev); + struct acpi_dp *dsd; + + if (!dev->enabled || !scope || !config->gpio.pin_count) + return; + + /* Device */ + acpigen_write_scope(scope); + acpigen_write_device(acpi_device_name(dev)); + + /* _HID is set to PRP0001 */ + acpigen_write_name_string("_HID", GPIO_REGULATOR_HID); + + /* Resources - _CRS */ + acpigen_write_name("_CRS"); + acpigen_write_resourcetemplate_header(); + acpi_device_write_gpio(&config->gpio); + acpigen_write_resourcetemplate_footer(); + + /* DSD */ + dsd = acpi_dp_new_table("_DSD"); + acpi_dp_add_string(dsd, "compatible", "regulator-fixed"); + acpi_dp_add_string(dsd, "supply-name", config->name); + acpi_dp_add_gpio(dsd, "gpio-gpios", path, 0, 0, config->gpio.polarity); + if (config->enabled_on_boot) + acpi_dp_add_string(dsd, "regulator-boot-on", "on"); + if (config->gpio.polarity == ACPI_GPIO_ACTIVE_HIGH) + acpi_dp_add_string(dsd, "enable-active-high", "on"); + acpi_dp_write(dsd); + + acpigen_pop_len(); /* Device */ + acpigen_pop_len(); /* Scope */ +} + +static const char *gpio_regulator_acpi_name(struct device *dev) +{ + struct drivers_regulator_gpio_regulator_config *config = dev->chip_info; + static char name[5]; + + snprintf(name, sizeof(name), "R%03.3X", config->gpio.pins[0]); + name[4] = '\0'; + + return name; +} +#endif + +static struct device_operations gpio_regulator_ops = { + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + .acpi_name = &gpio_regulator_acpi_name, + .acpi_fill_ssdt_generator = &gpio_regulator_fill_ssdt_generator, +#endif +}; + +static void gpio_regulator_enable(struct device *dev) +{ + dev->ops = &gpio_regulator_ops; +} + +struct chip_operations drivers_regulator_gpio_regulator_ops = { + CHIP_NAME("GPIO Regulator") + .enable_dev = &gpio_regulator_enable +};

1 0

New patch to review for coreboot: google/reef: Use exported GPIOs and ACPI regulator for touchscreen
by Furquan Shaikh 12 Dec '16

12 Dec '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17799 -gerrit commit c6137bb8e251f2df9669d37fbd2b12c9146690ec Author: Furquan Shaikh <furquan(a)chromium.org> Date: Mon Dec 12 09:34:55 2016 -0800 google/reef: Use exported GPIOs and ACPI regulator for touchscreen ELAN touchscreen device expects firmware to export GPIOs and ACPI regulators for managing power to the device. Thus, provide the required ACPI elements for OS driver to properly manage this device. BUG=chrome-os-partner:60194 BRANCH=None TEST=Verified that touchscreen works properly on boot-up and after suspend/resume. Change-Id: I298ca5de9c0ae302309d87e3dffb65f9be1e882e Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/mainboard/google/reef/Kconfig | 3 +++ src/mainboard/google/reef/variants/baseboard/devicetree.cb | 9 ++++++--- 2 files changed, 9 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/reef/Kconfig b/src/mainboard/google/reef/Kconfig index 2cc391e..afe449f 100644 --- a/src/mainboard/google/reef/Kconfig +++ b/src/mainboard/google/reef/Kconfig @@ -49,6 +49,9 @@ config DRIVERS_I2C_WACOM config DRIVERS_PS2_KEYBOARD default y +config DRIVERS_REGULATOR_GPIO_REGULATOR + default y + config MAINBOARD_DIR string default google/reef diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index a0b53d6..19efe77 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -179,11 +179,14 @@ chip soc/intel/apollolake register "probed" = "1" register "pwr_mgmt_type" = "GPIO_EXPORT" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)" - register "reset_delay_ms" = "20" - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" - register "enable_delay_ms" = "1" device i2c 10 on end end + chip drivers/regulator/gpio_regulator + register "name" = ""vcc33"" + register "gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" + register "enabled_on_boot" = "1" + device generic 0 on end + end end # - I2C 3 device pci 17.0 on chip drivers/i2c/generic

1 0

New patch to review for coreboot: drivers/regulator: Add driver for handling GPIO-based fixed regulator
by Furquan Shaikh 12 Dec '16

12 Dec '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17798 -gerrit commit 941a82eb339ce7692a3794a236d83d8c09d9605a Author: Furquan Shaikh <furquan(a)chromium.org> Date: Mon Dec 12 09:30:42 2016 -0800 drivers/regulator: Add driver for handling GPIO-based fixed regulator This change adds the required device node in SSDT for defining GPIO-based fixed voltage regulator. BUG=chrome-os-partner:60194 BRANCH=None TEST=Verified that ELAN touchscreen works with exported GPIOs and ACPI regulator. Change-Id: I4380aea0929fb7e81dbe83f940e3e51e983819f9 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/drivers/regulator/gpio_regulator/Kconfig | 17 ++++ src/drivers/regulator/gpio_regulator/Makefile.inc | 16 ++++ src/drivers/regulator/gpio_regulator/chip.h | 27 ++++++ .../regulator/gpio_regulator/gpio_regulator.c | 97 ++++++++++++++++++++++ 4 files changed, 157 insertions(+) diff --git a/src/drivers/regulator/gpio_regulator/Kconfig b/src/drivers/regulator/gpio_regulator/Kconfig new file mode 100644 index 0000000..25c13a8 --- /dev/null +++ b/src/drivers/regulator/gpio_regulator/Kconfig @@ -0,0 +1,17 @@ +# +# This file is part of the coreboot project. +# +# Copyright 2016 Google Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +config DRIVERS_REGULATOR_GPIO_REGULATOR + bool \ No newline at end of file diff --git a/src/drivers/regulator/gpio_regulator/Makefile.inc b/src/drivers/regulator/gpio_regulator/Makefile.inc new file mode 100644 index 0000000..8a65561 --- /dev/null +++ b/src/drivers/regulator/gpio_regulator/Makefile.inc @@ -0,0 +1,16 @@ +# +# This file is part of the coreboot project. +# +# Copyright 2016 Google Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +ramstage-$(CONFIG_DRIVERS_REGULATOR_GPIO_REGULATOR) += gpio_regulator.c diff --git a/src/drivers/regulator/gpio_regulator/chip.h b/src/drivers/regulator/gpio_regulator/chip.h new file mode 100644 index 0000000..aee8366 --- /dev/null +++ b/src/drivers/regulator/gpio_regulator/chip.h @@ -0,0 +1,27 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __DRIVERS_REGULATOR_GPIO_REGULATOR_H__ +#define __DRIVERS_REGULATOR_GPIO_REGULATOR_H__ + +#include <arch/acpi_device.h> + +struct drivers_regulator_gpio_regulator_config { + const char *name; + struct acpi_gpio gpio; + bool enabled_on_boot; +}; + +#endif /* __DRIVERS_REGULATOR_GPIO_REGULATOR_H__ */ diff --git a/src/drivers/regulator/gpio_regulator/gpio_regulator.c b/src/drivers/regulator/gpio_regulator/gpio_regulator.c new file mode 100644 index 0000000..b3e120b --- /dev/null +++ b/src/drivers/regulator/gpio_regulator/gpio_regulator.c @@ -0,0 +1,97 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpi_device.h> +#include <arch/acpigen.h> +#include <console/console.h> +#include <device/device.h> +#include <device/path.h> +#include <string.h> + +#include "chip.h" + +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + +#define GPIO_REGULATOR_HID "PRP0001" + +static void gpio_regulator_fill_ssdt_generator(struct device *dev) +{ + struct drivers_regulator_gpio_regulator_config *config = dev->chip_info; + const char *scope = acpi_device_scope(dev); + const char *path = acpi_device_path(dev); + struct acpi_dp *dsd; + + if (!dev->enabled || !scope || !config->gpio.pin_count) + return; + + /* Device */ + acpigen_write_scope(scope); + acpigen_write_device(acpi_device_name(dev)); + + /* _HID is set to PRP0001 */ + acpigen_write_name_string("_HID", GPIO_REGULATOR_HID); + + /* Resources - _CRS */ + acpigen_write_name("_CRS"); + acpigen_write_resourcetemplate_header(); + acpi_device_write_gpio(&config->gpio); + acpigen_write_resourcetemplate_footer(); + + /* DSD */ + dsd = acpi_dp_new_table("_DSD"); + acpi_dp_add_string(dsd, "compatible", "regulator-fixed"); + acpi_dp_add_string(dsd, "supply-name", config->name); + acpi_dp_add_gpio(dsd, "gpio-gpios", path, 0, 0, config->gpio.polarity); + if (config->enabled_on_boot) + acpi_dp_add_string(dsd, "regulator-boot-on", "on"); + if (config->gpio.polarity == ACPI_GPIO_ACTIVE_HIGH) + acpi_dp_add_string(dsd, "enable-active-high", "on"); + acpi_dp_write(dsd); + + acpigen_pop_len(); /* Device */ + acpigen_pop_len(); /* Scope */ +} + +static const char *gpio_regulator_acpi_name(struct device *dev) +{ + struct drivers_regulator_gpio_regulator_config *config = dev->chip_info; + static char name[5]; + + snprintf(name, sizeof(name), "R%03.3X", config->gpio.pins[0]); + name[4] = '\0'; + + return name; +} +#endif + +static struct device_operations gpio_regulator_ops = { + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + .acpi_name = &gpio_regulator_acpi_name, + .acpi_fill_ssdt_generator = &gpio_regulator_fill_ssdt_generator, +#endif +}; + +static void gpio_regulator_enable(struct device *dev) +{ + dev->ops = &gpio_regulator_ops; +} + +struct chip_operations drivers_regulator_gpio_regulator_ops = { + CHIP_NAME("GPIO Regulator") + .enable_dev = &gpio_regulator_enable +};

1 0

New patch to review for coreboot: drivers/i2c/generic: Allow mainboards to export reset and enable GPIOs
by Furquan Shaikh 12 Dec '16

12 Dec '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17797 -gerrit commit adc40b32f4df2e27f92b3fa905f769c3962d031b Author: Furquan Shaikh <furquan(a)chromium.org> Date: Mon Dec 12 09:23:01 2016 -0800 drivers/i2c/generic: Allow mainboards to export reset and enable GPIOs Add power management type config option that allows mainboards to either: 1. Define a power resource that uses the reset and enable gpios to power on and off the device using _ON and _OFF methods, or 2. Export reset and enable GPIOs in _CRS and _DSD so that the OS can directly toggle the GPIOs as required. GPIO type needs to be updated in drivers_i2c_generic_config to use acpi_gpio type so that it can be used for both the above cases. BUG=chrome-os-partner:60194 BRANCH=None TEST=Verified that elan touchscreen works fine on reef using exported GPIOs. Change-Id: I4d76f193f615cfc4520869dedc55505c109042f6 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- src/drivers/i2c/generic/chip.h | 12 +++- src/drivers/i2c/generic/generic.c | 75 ++++++++++++++++++---- .../google/reef/variants/baseboard/devicetree.cb | 5 +- 3 files changed, 74 insertions(+), 18 deletions(-) diff --git a/src/drivers/i2c/generic/chip.h b/src/drivers/i2c/generic/chip.h index 736de51..ecd18ab 100644 --- a/src/drivers/i2c/generic/chip.h +++ b/src/drivers/i2c/generic/chip.h @@ -19,6 +19,11 @@ #include <arch/acpi_device.h> #include <device/i2c.h> +enum power_mgmt_type { + POWER_RESOURCE = 1, + GPIO_EXPORT = 2, +}; + struct drivers_i2c_generic_config { const char *hid; /* ACPI _HID (required) */ const char *cid; /* ACPI _CID */ @@ -42,12 +47,15 @@ struct drivers_i2c_generic_config { unsigned device_present_gpio; unsigned device_present_gpio_invert; + /* Power management type. */ + enum power_mgmt_type pwr_mgmt_type; + /* GPIO used to take device out of reset or to put it into reset. */ - unsigned reset_gpio; + struct acpi_gpio reset_gpio; /* Delay to be inserted after device is taken out of reset. */ unsigned reset_delay_ms; /* GPIO used to enable device. */ - unsigned enable_gpio; + struct acpi_gpio enable_gpio; /* Delay to be inserted after device is enabled. */ unsigned enable_delay_ms; }; diff --git a/src/drivers/i2c/generic/generic.c b/src/drivers/i2c/generic/generic.c index b8e5d86..6ca1599 100644 --- a/src/drivers/i2c/generic/generic.c +++ b/src/drivers/i2c/generic/generic.c @@ -29,8 +29,13 @@ static void i2c_generic_add_power_res(struct drivers_i2c_generic_config *config) { const char *power_res_dev_states[] = { "_PR0", "_PR3" }; + unsigned reset_gpio = config->reset_gpio.pins[0]; + unsigned enable_gpio = config->enable_gpio.pins[0]; - if (!config->reset_gpio && !config->enable_gpio) + if (config->pwr_mgmt_type != POWER_RESOURCE) + return; + + if (!reset_gpio && !enable_gpio) return; /* PowerResource (PRIC, 0, 0) */ @@ -42,29 +47,51 @@ static void i2c_generic_add_power_res(struct drivers_i2c_generic_config *config) /* Method (_ON, 0, Serialized) */ acpigen_write_method_serialized("_ON", 0); - if (config->reset_gpio) - acpigen_soc_set_tx_gpio(config->reset_gpio); - if (config->enable_gpio) { - acpigen_soc_set_tx_gpio(config->enable_gpio); + if (reset_gpio) + acpigen_soc_set_tx_gpio(reset_gpio); + if (enable_gpio) { + acpigen_soc_set_tx_gpio(enable_gpio); acpigen_write_sleep(config->enable_delay_ms); } - if (config->reset_gpio) { - acpigen_soc_clear_tx_gpio(config->reset_gpio); + if (reset_gpio) { + acpigen_soc_clear_tx_gpio(reset_gpio); acpigen_write_sleep(config->reset_delay_ms); } acpigen_pop_len(); /* _ON method */ /* Method (_OFF, 0, Serialized) */ acpigen_write_method_serialized("_OFF", 0); - if (config->reset_gpio) - acpigen_soc_set_tx_gpio(config->reset_gpio); - if (config->enable_gpio) - acpigen_soc_clear_tx_gpio(config->enable_gpio); + if (reset_gpio) + acpigen_soc_set_tx_gpio(reset_gpio); + if (enable_gpio) + acpigen_soc_clear_tx_gpio(enable_gpio); acpigen_pop_len(); /* _OFF method */ acpigen_pop_len(); /* PowerResource PRIC */ } +static bool i2c_generic_add_gpios_to_crs(struct drivers_i2c_generic_config *cfg) +{ + if (cfg->pwr_mgmt_type == GPIO_EXPORT) + return true; + + return false; +} + +static int i2c_generic_write_gpio(struct acpi_gpio *gpio, int *curr_index) +{ + int ret = -1; + + if (gpio->pin_count == 0) + return ret; + + acpi_device_write_gpio(gpio); + ret = *curr_index; + (*curr_index)++; + + return ret; +} + void i2c_generic_fill_ssdt(struct device *dev, void (*callback)(struct device *dev)) { @@ -77,6 +104,9 @@ void i2c_generic_fill_ssdt(struct device *dev, .resource = scope, }; struct acpi_dp *dsd = NULL; + int curr_index = 0; + int reset_gpio_index = -1, enable_gpio_index = -1; + const char *path = acpi_device_path(dev); if (!dev->enabled || !scope) return; @@ -101,6 +131,12 @@ void i2c_generic_fill_ssdt(struct device *dev, acpigen_write_resourcetemplate_header(); acpi_device_write_i2c(&i2c); acpi_device_write_interrupt(&config->irq); + if (i2c_generic_add_gpios_to_crs(config) == true) { + reset_gpio_index = i2c_generic_write_gpio(&config->reset_gpio, + &curr_index); + enable_gpio_index = i2c_generic_write_gpio(&config->enable_gpio, + &curr_index); + } acpigen_write_resourcetemplate_footer(); /* Wake capabilities */ @@ -109,9 +145,20 @@ void i2c_generic_fill_ssdt(struct device *dev, acpigen_write_PRW(config->wake, 3); } - if (config->probed) { + /* DSD */ + if (config->probed || (reset_gpio_index != -1) || + (enable_gpio_index != -1)) { dsd = acpi_dp_new_table("_DSD"); - acpi_dp_add_integer(dsd, "linux,probed", 1); + if (config->probed) + acpi_dp_add_integer(dsd, "linux,probed", 1); + if (reset_gpio_index != -1) + acpi_dp_add_gpio(dsd, "reset-gpios", path, + reset_gpio_index, 0, + config->reset_gpio.polarity); + if (enable_gpio_index != -1) + acpi_dp_add_gpio(dsd, "enable-gpios", path, + enable_gpio_index, 0, + config->enable_gpio.polarity); acpi_dp_write(dsd); } @@ -125,7 +172,7 @@ void i2c_generic_fill_ssdt(struct device *dev, acpigen_pop_len(); /* Device */ acpigen_pop_len(); /* Scope */ - printk(BIOS_INFO, "%s: %s at %s\n", acpi_device_path(dev), + printk(BIOS_INFO, "%s: %s at %s\n", path, config->desc ? : dev->chip_ops->name, dev_path(dev)); } diff --git a/src/mainboard/google/reef/variants/baseboard/devicetree.cb b/src/mainboard/google/reef/variants/baseboard/devicetree.cb index 49c1ba6..a0b53d6 100644 --- a/src/mainboard/google/reef/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/reef/variants/baseboard/devicetree.cb @@ -177,9 +177,10 @@ chip soc/intel/apollolake register "desc" = ""ELAN Touchscreen"" register "irq" = "IRQ_EDGE_LOW(GPIO_21_IRQ)" register "probed" = "1" - register "reset_gpio" = "GPIO_36" + register "pwr_mgmt_type" = "GPIO_EXPORT" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_36)" register "reset_delay_ms" = "20" - register "enable_gpio" = "GPIO_152" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_152)" register "enable_delay_ms" = "1" device i2c 10 on end end

1 0

New patch to review for coreboot: util/cbfstool: require -i argument for cbfstool add-int
by Patrick Georgi 12 Dec '16

12 Dec '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17796 -gerrit commit 35793c27ff8ebc0b0cc25440fb3676efc5852a7e Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Mon Dec 12 18:38:01 2016 +0100 util/cbfstool: require -i argument for cbfstool add-int We never specified what value add-int should write by default. Change-Id: I240be4842fc374690c4a718fc4d8f0a03d63003c Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- util/cbfstool/cbfstool.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index c823dc8..2d8483b 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -70,6 +70,7 @@ static struct param { uint32_t cbfsoffset; uint32_t cbfsoffset_assigned; uint32_t arch; + bool u64val_assigned; bool fill_partial_upward; bool fill_partial_downward; bool show_immutable; @@ -716,6 +717,10 @@ static int cbfs_add_flat_binary(void) static int cbfs_add_integer(void) { + if (!param.u64val_assigned) { + ERROR("You need to specify a value to write.\n"); + return 1; + } return cbfs_add_integer_component(param.name, param.u64val, param.baseaddress, @@ -1452,6 +1457,7 @@ int main(int argc, char **argv) break; case 'i': param.u64val = strtoull(optarg, &suffix, 0); + param.u64val_assigned = 1; if (!*optarg || (suffix && *suffix)) { ERROR("Invalid int parameter '%s'.\n", optarg);

1 0

Patch merged into coreboot/master: lint/kconfig_lint: Make sure all symbols have a type defined
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit 08705f1e904288607df87eb7627178613066bd99 Author: Martin Roth <martinroth(a)google.com> Date: Wed Nov 9 14:27:00 2016 -0700 lint/kconfig_lint: Make sure all symbols have a type defined Show an error if a symbol does not have a defined type. This caused a problem of an undefined symbol in check_defaults, so we just skip those symbols there as we can't verify the default pattern without knowing the type. Change-Id: I28711a77962e16f6fc89789400363edd0fdd0931 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17345 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)googlemail.com> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/17345 for details. -gerrit

1 0

Patch merged into coreboot/master: util/lint: add check for auto-included headers
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit 1c9c4b8db8ee791d124638b7381e85bf4298f0f5 Author: Martin Roth <martinroth(a)google.com> Date: Wed Nov 30 10:29:39 2016 -0700 util/lint: add check for auto-included headers Since we've removed them from the tree, add a check to keep them out. Change-Id: I2995da765fee8796a297963d54a1c34f56376efe Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17658 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See https://review.coreboot.org/17658 for details. -gerrit

1 0

Patch merged into coreboot/master: Kconfig: Change symbol override from warning to notice
by gerrit＠coreboot.org 12 Dec '16

12 Dec '16

the following patch was just integrated into master: commit 00cbc7f72fee7361847657ef3ffc3d5ac223b537 Author: Martin Roth <martinroth(a)google.com> Date: Wed Sep 21 14:27:26 2016 -0600 Kconfig: Change symbol override from warning to notice Overriding symbols within a .config is pretty common when doing automated builds with various different options. The warning text makes it sound like this is an issue, so change it to say 'notice' instead. We could get rid of it completely, but it's not a bad thing to know that we have two copies of the same symbol in the .config. BUG=chrome-os-partner:54059 TEST=copy a disabled kconfig option to the end and set it to y. See notice text instead of warning. Change-Id: I9f575b2275233f638e42676263348c807e6515bd Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/16691 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See https://review.coreboot.org/16691 for details. -gerrit

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit December 2016