coreboot-gerrit January 2016

coreboot-gerrit@coreboot.org

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New patch to review for coreboot: util/crossgcc: Build gmp, mpfr, mpc, libelf, gdb and iasl for the host
by Nico Huber 26 Jan '16

26 Jan '16

Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13472 -gerrit commit b639f285080227f59bdf1fe367bcb9a0aa593cd7 Author: Nico Huber <nico.huber(a)secunet.com> Date: Tue Jan 26 16:14:06 2016 +0100 util/crossgcc: Build gmp, mpfr, mpc, libelf, gdb and iasl for the host Change-Id: I731cfe230304ccafad3e1f0527592c6a382e2cb1 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- util/crossgcc/buildgcc | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 830f6c4..5b7c45a 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -18,8 +18,8 @@ cd $(dirname $0) -CROSSGCC_DATE="November 25th, 2015" -CROSSGCC_VERSION="1.33" +CROSSGCC_DATE="January 26th, 2016" +CROSSGCC_VERSION="1.35" # default settings PACKAGE=GCC @@ -647,11 +647,11 @@ case "$PACKAGE" in GCC|gcc) echo "Target architecture is now $TARGETARCH" NAME="${TARGETARCH} cross GCC" - PACKAGES="GMP MPFR MPC LIBELF BINUTILS GCC" + PACKAGES="host-GMP host-MPFR host-MPC host-LIBELF BINUTILS GCC" ;; GDB|gdb) NAME="${TARGETARCH} cross GDB" - PACKAGES="GDB" + PACKAGES="host-GDB" if [ $SKIPPYTHON -eq 0 ]; then PACKAGES="EXPAT PYTHON $PACKAGES" fi @@ -663,7 +663,7 @@ case "$PACKAGE" in ;; IASL|iasl) NAME="IASL ACPI compiler" - PACKAGES=IASL + PACKAGES="host-IASL" ;; *) printf "${red}ERROR: Unsupported package $PACKAGE. (Supported packages are GCC, GDB, CLANG, IASL)${NC}\n\n";

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New patch to review for coreboot: util/crossgcc: Add ability to build host tools/libs
by Nico Huber 26 Jan '16

26 Jan '16

Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13471 -gerrit commit 1d51805db1004df8ff123468090809681311e53d Author: Nico Huber <nico.huber(a)secunet.com> Date: Tue Jan 26 16:09:31 2016 +0100 util/crossgcc: Add ability to build host tools/libs We currently mix builds of host tools and libraries with builds of our target toolchain. To end this, add the option to prefix a package name with `host-` to build it only once for the host. Details: o Resulting files will be installed into xgcc-host/ instead of xgcc/. o .success files moved into the destination dir. That way we can tell that a package has been built even if the package build directory was removed. Change-Id: I52a7245714a040d11f6e1ac8bdbff8057bb7f0a1 Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- util/crossgcc/buildgcc | 133 ++++++++++++++++++++++++++++++++----------------- 1 file changed, 87 insertions(+), 46 deletions(-) diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc index 138558a..830f6c4 100755 --- a/util/crossgcc/buildgcc +++ b/util/crossgcc/buildgcc @@ -27,6 +27,7 @@ TARGETDIR=$(pwd)/xgcc TARGETARCH=i386-elf LANGUAGES=c DESTDIR= +CLEANHOST=0 SAVETEMPS=0 SKIPPYTHON=1 @@ -94,6 +95,38 @@ NC='\033[0m' # No Color UNAME=$(uname | grep -iq cygwin && echo Cygwin || uname) HALT_FOR_TOOLS=0 +package_name() +{ + echo $1 | sed -e 's/^host-//' +} + +build_dir() +{ + if echo $1 | grep -q '^host-' >/dev/null 2>&1; then + echo build-$1 + else + echo build-${TARGETARCH}-$2 + fi +} + +install_dir() +{ + if echo $1 | grep -q '^host-' >/dev/null 2>&1; then + echo $TARGETDIR-host + else + echo $TARGETDIR + fi +} + +success_file() +{ + if echo $1 | grep -q '^host-' >/dev/null 2>&1; then + echo .$2.success + else + echo .$2-$TARGETARCH.success + fi +} + normalize_dirs() { mkdir -p $DESTDIR$TARGETDIR/lib @@ -200,7 +233,7 @@ download_showing_percentage() { } download() { - package=$1 + package=$(package_name $1) archive="$(eval echo \$$package"_ARCHIVE")" FILE=$(basename $archive) @@ -225,7 +258,7 @@ download() { } unpack_and_patch() { - package=$1 + package=$(package_name $1) archive="$(eval echo \$$package"_ARCHIVE")" dir="$(eval echo \$$package"_DIR")" test -d ${dir} && test -f ${dir}/.unpack_success || ( @@ -260,29 +293,31 @@ is_package_enabled() } build() { - package=$1 + pkgspec=$1 + package=$(package_name $pkgspec) fn_exists build_$package || return version="$(eval echo \$$package"_VERSION")" - BUILDDIR=build-${TARGETARCH}-$package + SUCCESS=$(success_file $pkgspec $package) + BUILDDIR=$(build_dir $pkgspec $package) + INSTALLDIR=$(install_dir $pkgspec) mkdir -p ${BUILDDIR} - is_package_enabled "$package" && \ - if [ -f ${BUILDDIR}/.success ]; then - printf "Skipping $package as it is already built\n" + is_package_enabled "$pkgspec" && \ + if [ -f ${INSTALLDIR}/${SUCCESS} ]; then + printf "Skipping $pkgspec as it is already built\n" else - printf "Building $package $version ... " + printf "Building $pkgspec $version ... " DIR=$PWD cd ${BUILDDIR} rm -f .failed - build_${package} > build.log 2>&1 - cd $DIR/${BUILDDIR} - if [ ! -f .failed ]; then touch .success; fi - cd .. - - if [ -r "${BUILDDIR}/.failed" ]; then + build_${package} $pkgspec $INSTALLDIR > build.log 2>&1 + cd $DIR + if [ ! -f ${BUILDDIR}/.failed ]; then + touch ${INSTALLDIR}/${SUCCESS}; + else printf "${RED}failed${NC}. Check ${BUILDDIR}/build.log.\n" exit 1 fi @@ -293,9 +328,13 @@ build() { cleanup() { printf "Cleaning up temporary files... " - for package in $PACKAGES; do - rm -rf build-${TARGETARCH}-$package $(eval echo \$$package"_DIR") + for pkgspec in $PACKAGES; do + package=$(package_name $pkgspec) + rm -rf $(build_dir $pkgspec $package) $(eval echo \$$package"_DIR") done + if [ $CLEANHOST = 1 ]; then + rm -rf $DESTDIR$TARGETDIR-host + fi rm -f getopt printf "${green}ok${NC}\n" } @@ -310,6 +349,7 @@ myhelp() printf " [-V|--version] print version number and exit\n" printf " [-h|--help] print this help and exit\n" printf " [-c|--clean] remove temporary files before build\n" + printf " [-r|--cleanhost] remove temporary files for host libs and tools\n" printf " [-t|--savetemps] don't remove temporary files after build\n" printf " [-y|--ccache] Use ccache when building cross compiler\n" printf " [-j|--jobs <num>] run <num> jobs in parallel in make\n" @@ -358,7 +398,7 @@ EOF } build_GMP() { - CC="$CC" CFLAGS="-Os" ../${GMP_DIR}/configure --disable-shared --enable-fat --prefix=$TARGETDIR $OPTIONS \ + CC="$CC" CFLAGS="-Os" ../${GMP_DIR}/configure --disable-shared --enable-fat --prefix=$2 $OPTIONS \ || touch .failed $MAKE $JOBS || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed @@ -367,15 +407,15 @@ build_GMP() { # Now set CFLAGS to match GMP CFLAGS but strip out -pedantic # as GCC 4.6.x fails if it's there. - export HOSTCFLAGS=$(grep __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h |cut -d\" -f2 |\ + export HOSTCFLAGS=$(grep __GMP_CFLAGS $DESTDIR$2/include/gmp.h |cut -d\" -f2 |\ sed s,-pedantic,,) } build_MPFR() { test $UNAME = "Darwin" && CFLAGS="$CFLAGS -force_cpusubtype_ALL" - CC="$CC" ../${MPFR_DIR}/configure --disable-shared --prefix=$TARGETDIR \ - --infodir=$TARGETDIR/info \ - --with-gmp=$DESTDIR$TARGETDIR CFLAGS="$HOSTCFLAGS" || \ + CC="$CC" ../${MPFR_DIR}/configure --disable-shared --prefix=$2 \ + --infodir=$2/info \ + --with-gmp=$DESTDIR$2 CFLAGS="$HOSTCFLAGS" || \ touch .failed $MAKE $JOBS || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed @@ -384,14 +424,14 @@ build_MPFR() { # work around build problem of libgmp.la if [ "$DESTDIR" != "" ]; then - perl -pi -e "s,$DESTDIR,," $DESTDIR$TARGETDIR/libgmp.la + perl -pi -e "s,$DESTDIR,," $DESTDIR$2/libgmp.la fi } build_MPC() { - CC="$CC" ../${MPC_DIR}/configure --disable-shared --prefix=$TARGETDIR \ - --infodir=$TARGETDIR/info --with-mpfr=$DESTDIR$TARGETDIR \ - --with-gmp=$DESTDIR$TARGETDIR CFLAGS="$HOSTCFLAGS" || \ + CC="$CC" ../${MPC_DIR}/configure --disable-shared --prefix=$2 \ + --infodir=$2/info --with-mpfr=$DESTDIR$2 \ + --with-gmp=$DESTDIR$2 CFLAGS="$HOSTCFLAGS" || \ touch .failed $MAKE $JOBS || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed @@ -401,10 +441,10 @@ build_MPC() { build_LIBELF() { CC="$CC" CFLAGS="$HOSTCFLAGS" libelf_cv_elf_h_works=no \ - ../${LIBELF_DIR}/configure --disable-shared --prefix=$TARGETDIR \ - --infodir=$TARGETDIR/info CFLAGS="$HOSTCFLAGS" || touch .failed + ../${LIBELF_DIR}/configure --disable-shared --prefix=$2 \ + --infodir=$2/info CFLAGS="$HOSTCFLAGS" || touch .failed $MAKE $JOBS || touch .failed - $MAKE install prefix=$DESTDIR$TARGETDIR || touch .failed + $MAKE install prefix=$DESTDIR$2 || touch .failed normalize_dirs } @@ -413,7 +453,7 @@ build_BINUTILS() { if [ $TARGETARCH == "x86_64-elf" ]; then ADDITIONALTARGET=",i386-elf" fi - CC="$CC" ../binutils-${BINUTILS_VERSION}/configure --prefix=$TARGETDIR \ + CC="$CC" ../binutils-${BINUTILS_VERSION}/configure --prefix=$2 \ --target=${TARGETARCH} --enable-targets=${TARGETARCH}${ADDITIONALTARGET} \ --disable-werror --disable-nls --enable-lto --enable-gold \ --enable-plugins --enable-multilibs CFLAGS="$HOSTCFLAGS" || touch .failed @@ -430,14 +470,14 @@ build_GCC() { # libiberty is not compiled with CFLAGS_FOR_BUILD. CC="$CC" CFLAGS_FOR_TARGET="-O2" CFLAGS="$HOSTCFLAGS" \ CFLAGS_FOR_BUILD="$HOSTCFLAGS" ../gcc-${GCC_VERSION}/configure \ - --prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \ + --prefix=$2 --libexecdir=$2/lib \ --target=${TARGETARCH} --disable-werror --disable-shared \ --enable-lto --enable-plugins --enable-gold --enable-ld=default \ --disable-libssp --disable-bootstrap --disable-nls \ --disable-libquadmath --without-headers \ ${GCC_OPTIONS} --enable-languages="${LANGUAGES}" \ - --with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \ - --with-mpc=$DESTDIR$TARGETDIR --with-libelf=$DESTDIR$TARGETDIR \ + --with-gmp=$DESTDIR$2-host --with-mpfr=$DESTDIR$2-host \ + --with-mpc=$DESTDIR$2-host --with-libelf=$DESTDIR$2-host \ --with-pkgversion="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE" \ || touch .failed $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc || touch .failed @@ -451,7 +491,7 @@ build_GCC() { build_EXPAT() { CC="$CC" CFLAGS="$HOSTCFLAGS" ../${EXPAT_DIR}/configure --disable-shared \ - --prefix=$TARGETDIR --target=${TARGETARCH} || touch .failed + --prefix=$2 --target=${TARGETARCH} || touch .failed $MAKE || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed @@ -459,7 +499,7 @@ build_EXPAT() { } build_PYTHON() { - CC="$CC" CFLAGS="$HOSTCFLAGS" ../${PYTHON_DIR}/configure --prefix=$TARGETDIR \ + CC="$CC" CFLAGS="$HOSTCFLAGS" ../${PYTHON_DIR}/configure --prefix=$2 \ --target=${TARGETARCH} || touch .failed $MAKE $JOBS || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed @@ -468,14 +508,14 @@ build_PYTHON() { } build_GDB() { - export PYTHONHOME=$DESTDIR$TARGETDIR + export PYTHONHOME=$DESTDIR$2 if [ $(uname) != "FreeBSD" -a $(uname) != "NetBSD" ]; then LIBDL="-ldl" fi - LDFLAGS="-Wl,-rpath,\$\$ORIGIN/../lib/ -L$DESTDIR$TARGETDIR/lib \ + LDFLAGS="-Wl,-rpath,\$\$ORIGIN/../lib/ -L$DESTDIR$2/lib \ -lpthread $LIBDL -lutil" \ - CC="$CC" CFLAGS="$HOSTCFLAGS -I$DESTDIR$TARGETDIR/include" \ - ../${GDB_DIR}/configure --prefix=$TARGETDIR \ + CC="$CC" CFLAGS="$HOSTCFLAGS -I$DESTDIR$2/include" \ + ../${GDB_DIR}/configure --prefix=$2 \ --target=${TARGETARCH} --disable-werror --disable-nls $MAKE $JOBS || touch .failed $MAKE install DESTDIR=$DESTDIR || touch .failed @@ -490,8 +530,8 @@ build_IASL() { test $UNAME = "FreeBSD" && HOST="_FreeBSD" test $UNAME = "Cygwin" && HOST="_CYGWIN" HOST="$HOST" OPT_CFLAGS="-O -D_FORTIFY_SOURCE=2 -D COREBOOT_TOOLCHAIN_VERSION='\"coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE\"' " CFLAGS="$CFLAGS" $MAKE CC="$CC" iasl || touch $RDIR/.failed - rm -f $DESTDIR$TARGETDIR/bin/iasl || touch $RDIR/.failed - cp bin/iasl $DESTDIR$TARGETDIR/bin || touch $RDIR/.failed + rm -f $DESTDIR$2/bin/iasl || touch $RDIR/.failed + cp bin/iasl $DESTDIR$2/bin || touch $RDIR/.failed } build_LLVM() { @@ -501,18 +541,18 @@ build_LLVM() { ln -sf $PWD/$CRT_DIR $LLVM_DIR/projects/compiler-rt cd - - $CMAKE -G "Unix Makefiles" -DCMAKE_INSTALL_PREFIX=$DESTDIR$TARGETDIR \ + $CMAKE -G "Unix Makefiles" -DCMAKE_INSTALL_PREFIX=$DESTDIR$2 \ -DCLANG_VENDOR="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE - " \ -DCMAKE_BUILD_TYPE=Release ../$LLVM_DIR || touch .failed $MAKE $JOBS || touch .failed $MAKE install || touch .failed - cp -a ../$CFE_DIR/tools/scan-build/* $DESTDIR$TARGETDIR/bin - cp -a ../$CFE_DIR/tools/scan-view/* $DESTDIR$TARGETDIR/bin + cp -a ../$CFE_DIR/tools/scan-build/* $DESTDIR$2/bin + cp -a ../$CFE_DIR/tools/scan-view/* $DESTDIR$2/bin # create symlinks to work around broken --print-librt-file-name # when used with -target. - cd $DESTDIR$TARGETDIR/lib/clang/${CLANG_VERSION}/lib + cd $DESTDIR$2/lib/clang/${CLANG_VERSION}/lib for i in */libclang_rt.builtins*.a; do ln -s $i . done @@ -562,6 +602,7 @@ while true ; do -V|--version) shift; myversion; exit 0;; -h|--help) shift; myhelp; exit 0;; -c|--clean) shift; clean=1;; + -r|--cleanhost) shift; CLEANHOST=1;; -t|--savetemps) shift; SAVETEMPS=1;; -d|--directory) shift; TARGETDIR="$1"; shift;; -p|--platform) shift; TARGETARCH="$1"; shift;; @@ -702,8 +743,8 @@ fi # Prepare target directory for building GCC # (dependencies must be in the PATH) -mkdir -p $DESTDIR$TARGETDIR/bin -export PATH=$DESTDIR$TARGETDIR/bin:$PATH +mkdir -p $DESTDIR$TARGETDIR-host/bin $DESTDIR$TARGETDIR/bin +export PATH=$DESTDIR$TARGETDIR-host/bin:$DESTDIR$TARGETDIR/bin:$PATH # Download, unpack, patch and build all packages

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New patch to review for coreboot: util/xcompile: Look for host tools in xgcc-host/ first
by Nico Huber 26 Jan '16

26 Jan '16

Nico Huber (nico.h(a)gmx.de) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13470 -gerrit commit 16446549a7ced8ef3a9a37733bd59254b3e2123d Author: Nico Huber <nico.huber(a)secunet.com> Date: Tue Jan 26 16:55:12 2016 +0100 util/xcompile: Look for host tools in xgcc-host/ first Look in the new xgcc-host/ dir that will be introduced in follow-up commits to util/crossgcc. Change-Id: I02a8e18c201e12502caca2be0a8e56ec075e551b Signed-off-by: Nico Huber <nico.huber(a)secunet.com> --- util/xcompile/xcompile | 16 ++++++++++++---- 1 file changed, 12 insertions(+), 4 deletions(-) diff --git a/util/xcompile/xcompile b/util/xcompile/xcompile index d798961..1c77d90 100755 --- a/util/xcompile/xcompile +++ b/util/xcompile/xcompile @@ -17,19 +17,23 @@ TMPFILE="" XGCCPATH=$1 +XGCCHOSTPATH= # libpayload crossgcc path if [ -d "$(pwd)/../../util/crossgcc/xgcc/bin/" ] then - XGCCPATH=${XGCCPATH:-"$(pwd)/../../util/crossgcc/xgcc/bin/"} + XGCCDIR="$(pwd)/../../util/crossgcc/xgcc" fi # coreboot crossgcc path if [ -d "$(pwd)/util/crossgcc/xgcc/bin/" ] then - XGCCPATH=${XGCCPATH:-"$(pwd)/util/crossgcc/xgcc/bin/"} + XGCCDIR="$(pwd)/util/crossgcc/xgcc" fi +XGCCPATH=${XGCCPATH:-"${XGCCDIR}/bin/"} +XGCCHOSTPATH=${XGCCHOSTPATH:-"${XGCCDIR}-host/bin/"} + die() { echo "ERROR: $*" >&2 exit 1 @@ -52,13 +56,17 @@ program_exists() { } -if [ "$("${XGCCPATH}/iasl" 2>/dev/null | grep -c ACPI)" -gt 0 ]; then +if [ -n "${XGCCHOSTPATH}" -a "$("${XGCCHOSTPATH}/iasl" 2>/dev/null | grep -c ACPI)" -gt 0 ]; then + IASL=${XGCCHOSTPATH}iasl +elif [ "$("${XGCCPATH}/iasl" 2>/dev/null | grep -c ACPI)" -gt 0 ]; then IASL=${XGCCPATH}iasl elif [ "$(iasl 2>/dev/null | grep -c ACPI)" -gt 0 ]; then IASL=iasl fi -if program_exists gcc; then +if [ -n "${XGCCHOSTPATH}" -a -x "${XGCCHOSTPATH}gcc" ]; then + HOSTCC=${XGCCHOSTPATH}gcc +elif program_exists gcc; then HOSTCC=gcc elif program_exists cc; then HOSTCC=cc

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Patch set updated for coreboot: drivers/intel/fsp2_0: Add infrastructure to parse resource HOBs
by Alexandru Gagniuc 26 Jan '16

26 Jan '16

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13350 -gerrit commit 97da891e6e7d76d37303a4cdc8b7b9396dfd1df3 Author: Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> Date: Mon Nov 9 17:07:18 2015 -0800 drivers/intel/fsp2_0: Add infrastructure to parse resource HOBs This adds the minimal infrastructure to allow printing reource HOBs returned by FSP memory_init, and to allow locating the FSP reserved memory area. Change-Id: Ie79441aacdb808200921817f537bf01e0456b72c Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> --- src/drivers/intel/fsp2_0/Makefile.inc | 2 + src/drivers/intel/fsp2_0/hand_off_block.c | 230 ++++++++++++++++++++++++++++ src/drivers/intel/fsp2_0/include/fsp/util.h | 14 ++ 3 files changed, 246 insertions(+) diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index ef0cae8..e7081a7 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -1,3 +1,5 @@ + +romstage-y += hand_off_block.c romstage-y += util.c romstage-y += memory_init.c diff --git a/src/drivers/intel/fsp2_0/hand_off_block.c b/src/drivers/intel/fsp2_0/hand_off_block.c new file mode 100644 index 0000000..8529b58 --- /dev/null +++ b/src/drivers/intel/fsp2_0/hand_off_block.c @@ -0,0 +1,230 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/io.h> +#include <cbmem.h> +#include <commonlib/helpers.h> +#include <console/console.h> +#include <fsp/util.h> +#include <inttypes.h> +#include <lib.h> +#include <string.h> + +void hoboparse (const void *hob); + +#define HOB_HEADER_LEN 8 + +struct hob_header { + uint16_t type; + uint16_t length; +} __attribute__((packed)); + +struct hob_resource { + uint8_t owner_guid[16]; + uint32_t type; + uint32_t attribute_type; + uint64_t addr; + uint64_t length; +} __attribute__((packed)); + +enum resource_type { + EFI_RESOURCE_SYSTEM_MEMORY = 0, + EFI_RESOURCE_MEMORY_MAPPED_IO = 1, + EFI_RESOURCE_IO = 2, + EFI_RESOURCE_FIRMWARE_DEVICE = 3, + EFI_RESOURCE_MEMORY_MAPPED_IO_PORT = 4, + EFI_RESOURCE_MEMORY_RESERVED = 5, + EFI_RESOURCE_IO_RESERVED = 6, + EFI_RESOURCE_MAX_MEMORY_TYPE = 7, +}; + +static const char *resource_names[] = { + [EFI_RESOURCE_SYSTEM_MEMORY] = "SYSTEM_MEMORY", + [EFI_RESOURCE_MEMORY_MAPPED_IO] = "MMIO", + [EFI_RESOURCE_IO] = "IO", + [EFI_RESOURCE_FIRMWARE_DEVICE] = "FIRMWARE_DEVICE", + [EFI_RESOURCE_MEMORY_MAPPED_IO_PORT] = "MMIO_PORT", + [EFI_RESOURCE_MEMORY_RESERVED] = "MEMORY_RESERVED", + [EFI_RESOURCE_IO_RESERVED] = "IO_RESERVED", +}; + +enum hob_type { + HOB_TYPE_HANDOFF = 0x0001, + HOB_TYPE_MEMORY_ALLOCATION = 0x0002, + HOB_TYPE_RESOURCE_DESCRIPTOR = 0x0003, + HOB_TYPE_GUID_EXTENSION = 0x0004, + HOB_TYPE_FV = 0x0005, + HOB_TYPE_CPU = 0x0006, + HOB_TYPE_MEMORY_POOL = 0x0007, + HOB_TYPE_FV2 = 0x0009, + HOB_TYPE_LOAD_PEIM_UNUSED = 0x000A, + HOB_TYPE_UCAPSULE = 0x000B, + HOB_TYPE_UNUSED = 0xFFFE, + HOB_TYPE_END_OF_HOB_LIST = 0xFFFF, +}; + +/* UUIDs (GUIDs) in little-endian, so they can be used with memcmp() */ +static const uint8_t uuid_owner_fsp[16] = { + 0x59, 0x97, 0xa7, 0x69, 0x73, 0x13, 0x67, 0x43, + 0xa6, 0xc4, 0xc7, 0xf5, 0x9e, 0xfd, 0x98, 0x6e, +}; + +static const uint8_t empty_uuid[16] = { + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +static const char *resource_name(enum resource_type type) +{ + if (type >= ARRAY_SIZE(resource_names)) + return "UNKNOWN"; + return resource_names[type]; +} + +/* + * Utilities for walking HOBs + */ + +static bool uuid_compare(const uint8_t uuid1[16], const uint8_t uuid2[16]) +{ + return !memcmp(uuid1, uuid2, 16); +} + +static const struct hob_header *next_hob(const struct hob_header *parent) +{ + union { + const struct hob_header *hob; + uintptr_t addr; + } hob_walker; + + hob_walker.hob = parent; + hob_walker.addr += parent->length; + return hob_walker.hob; +} + +static const void *hob_header_to_struct(const struct hob_header *hob) +{ + union { + const struct hob_header *hob_hdr; + const void *hob_descr; + uintptr_t addr; + } hob_walker; + + hob_walker.hob_hdr = hob; + hob_walker.addr += HOB_HEADER_LEN; + return hob_walker.hob_descr; +} + +static const +struct hob_resource *hob_header_to_resource(const struct hob_header *hob) +{ + return hob_header_to_struct(hob); +} + +/* + * Utilities for locating and identifying HOBs + */ + +void fsp_save_hob_list(void *hob_list_ptr) +{ + void **cbmem_loc; + cbmem_loc = cbmem_add(CBMEM_ID_FSP_RUNTIME, sizeof(*hob_list_ptr)); + *cbmem_loc = hob_list_ptr; +} + +const void *fsp_get_hob_list(void) +{ + void **list_loc = cbmem_find(CBMEM_ID_FSP_RUNTIME); + + return (list_loc) ? (*list_loc) : NULL; +} + +static const +struct hob_resource *find_resource_hob_by_uuid(const struct hob_header *hob, + const uint8_t uuid[16]) +{ + const struct hob_resource *res; + + for ( ; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = next_hob(hob)) { + + if (hob->type != HOB_TYPE_RESOURCE_DESCRIPTOR) + continue; + + res = hob_header_to_resource(hob); + if (uuid_compare(res->owner_guid, uuid)) + return res; + } + return NULL; +} + +void fsp_find_reserved_memory(struct resource *res, const void *hob_list) +{ + const struct hob_resource *fsp_mem; + + res->size = 0; + res->align = 0; + res->gran = 0; + res->next = NULL; + + fsp_mem = find_resource_hob_by_uuid(hob_list, uuid_owner_fsp); + + if (!fsp_mem) { + return; + } + + res->base = fsp_mem->addr; + res->size = fsp_mem->length; +} + +/* + * Utilities for printing HOB information + */ + +static void print_guid(const void *base) +{ + uint32_t big; + uint16_t mid[2]; + + const uint8_t *id = base; + big = read32(id + 0); + mid[0] = read16(id + 4); + mid[1] = read16(id + 6); + + printk(BIOS_DEBUG, "%08x-%04x-%04x-%02x%02x%02x%02x%02x%02x%02x%02x\n", + big, mid[0], mid[1], + id[8], id[9], id[10], id[11], id[12], id[13],id[14], id[15]); +} + +static void print_resource_descriptor(const void *base) +{ + const struct hob_resource *res; + + res = hob_header_to_resource(base); + + printk(BIOS_DEBUG, "Resource %s, attribute %x\n", + resource_name(res->type), res->attribute_type); + printk(BIOS_DEBUG, "\t0x%08llx + 0x%08llx\n", res->addr, res->length); + if (!uuid_compare(res->owner_guid, empty_uuid)) { + printk(BIOS_DEBUG, "\tOwner GUID: "); + print_guid(res->owner_guid); + } +} + + +void fsp_print_memory_resource_hobs(const void *hob_list) +{ + const struct hob_header *hob = hob_list; + + for ( ; hob->type != HOB_TYPE_END_OF_HOB_LIST; hob = next_hob(hob)) { + if (hob->type == HOB_TYPE_RESOURCE_DESCRIPTOR) + print_resource_descriptor(hob); + } +} diff --git a/src/drivers/intel/fsp2_0/include/fsp/util.h b/src/drivers/intel/fsp2_0/include/fsp/util.h index abdbcf0..0e3f412 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/util.h +++ b/src/drivers/intel/fsp2_0/include/fsp/util.h @@ -14,6 +14,20 @@ #define _FSP2_0_UTIL_H_ #include <fsp/info_header.h> +#include <device/resource.h> + +/* + * Hand-off-block handling functions that depend on CBMEM, and thus can only + * be used after cbmem_initialize(). + */ +void fsp_save_hob_list(void *hob_list_ptr); +const void *fsp_get_hob_list(void); +/* + * Hand-off-block utilities which do not depend on CBMEM, but need to be passed + * the HOB list explicitly. + */ +void fsp_find_reserved_memory(struct resource *res, const void *hob_list); +void fsp_print_memory_resource_hobs(const void *hob_list); /* Load an FSP binary into CBFS, and fill the associated fsp_header struct */ enum cb_err fsp_load_binary(struct fsp_header *hdr, const char *name);

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Patch set updated for coreboot: soc/apollolake: Reserve FSP memory in CBMEM
by Alexandru Gagniuc 26 Jan '16

26 Jan '16

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13351 -gerrit commit f376122b190c6f9e0d676f0f3be63a773330d865 Author: Andrey Petrov <andrey.petrov(a)intel.com> Date: Thu Nov 5 14:43:14 2015 -0800 soc/apollolake: Reserve FSP memory in CBMEM FSP needs to reserve some space in DRAM which may not be touched by coreboot. We initialize cbmem in such a way that this memory is added as first element. Change-Id: I9a9b7c9e9132acd2f341d72f7e34e78299815acd Signed-off-by: Andrey Petrov <andrey.petrov(a)intel.com> --- src/soc/intel/apollolake/romstage/romstage.c | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/apollolake/romstage/romstage.c b/src/soc/intel/apollolake/romstage/romstage.c index 88d872e..b7ffd3a 100644 --- a/src/soc/intel/apollolake/romstage/romstage.c +++ b/src/soc/intel/apollolake/romstage/romstage.c @@ -18,6 +18,8 @@ #include <cpu/x86/msr.h> #include <device/pci_def.h> #include <fsp/api.h> +#include <fsp/util.h> +#include <device/resource.h> #include <soc/iomap.h> #include <soc/romstage.h> #include <soc/uart.h> @@ -74,6 +76,8 @@ static void *alloc_stack_in_ram(void) asmlinkage void* romstage_entry(void) { void *hob_list_ptr; + struct resource fsp_mem; + /* Be careful. Bootblock might already have initialized the console */ if (!IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) { lpss_console_uart_init(); @@ -86,7 +90,16 @@ asmlinkage void* romstage_entry(void) fsp_memory_init(&hob_list_ptr); - cbmem_initialize_empty(); + fsp_find_reserved_memory(&fsp_mem, hob_list_ptr); + + /* initialize cbmem by adding FSP reserved memory first thing */ + cbmem_initialize_empty_id_size(CBMEM_ID_FSP_RESERVED_MEMORY, + fsp_mem.size); + + /* make sure FSP memory is reserved in cbmem */ + if (fsp_mem.base != (uintptr_t)cbmem_find(CBMEM_ID_FSP_RESERVED_MEMORY)) + die("Failed to accommodate FSP reserved memory request"); + return alloc_stack_in_ram(); }

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Patch set updated for coreboot: soc/apollolake: Add skelton ACPI entry
by Alexandru Gagniuc 26 Jan '16

26 Jan '16

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13348 -gerrit commit 9138dba726f620986f6c5ceaedbc8381389ede5f Author: Lance Zhao <lijian.zhao(a)intel.com> Date: Mon Nov 9 17:06:34 2015 -0800 soc/apollolake: Add skelton ACPI entry Change-Id: Ib127af5392ca2b349480f5b21fad2186b444d7e6 Signed-off-by: Lance Zhao <lijian.zhao(a)intel.com> --- src/mainboard/intel/apollolake_rvp/Kconfig | 1 + src/mainboard/intel/apollolake_rvp/acpi_tables.c | 18 +++++++++++++++ src/mainboard/intel/apollolake_rvp/dsdt.asl | 28 ++++++++++++++++++++++++ src/soc/intel/apollolake/Makefile.inc | 1 + src/soc/intel/apollolake/acpi.c | 22 +++++++++++++++++++ 5 files changed, 70 insertions(+) diff --git a/src/mainboard/intel/apollolake_rvp/Kconfig b/src/mainboard/intel/apollolake_rvp/Kconfig index 5e6c4f0..ec71e96 100755 --- a/src/mainboard/intel/apollolake_rvp/Kconfig +++ b/src/mainboard/intel/apollolake_rvp/Kconfig @@ -4,6 +4,7 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select SOC_INTEL_APOLLOLAKE select BOARD_ROMSIZE_KB_8192 + select HAVE_ACPI_TABLES config MAINBOARD_DIR string diff --git a/src/mainboard/intel/apollolake_rvp/acpi_tables.c b/src/mainboard/intel/apollolake_rvp/acpi_tables.c new file mode 100644 index 0000000..d21b743 --- /dev/null +++ b/src/mainboard/intel/apollolake_rvp/acpi_tables.c @@ -0,0 +1,18 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/acpi.h> + +void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) +{ +} + diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl new file mode 100644 index 0000000..d9322e5 --- /dev/null +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20110725 // OEM revision +) +{ + Scope (\_SB) { + Device (PCI0) + { + } + } + +} diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 59d13e3..7efb3ba 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -23,6 +23,7 @@ romstage-y += romstage/romstage.c romstage-y += tsc_freq.c romstage-y += uart_early.c +ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c ramstage-y += chip.c ramstage-y += cpu.c ramstage-y += gpio.c diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c new file mode 100644 index 0000000..4246f40 --- /dev/null +++ b/src/soc/intel/apollolake/acpi.c @@ -0,0 +1,22 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/acpi.h> +unsigned long acpi_fill_mcfg(unsigned long current) +{ + return 0; +} +unsigned long acpi_fill_madt(unsigned long current) +{ + return 0; +} +

1 0

Patch set updated for coreboot: drivers/intel/fsp2_0: Return memory_init HOB list to caller
by Alexandru Gagniuc 26 Jan '16

26 Jan '16

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13349 -gerrit commit aac7367f0ce56685e7488491cd3fa7f5beb04371 Author: Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> Date: Mon Nov 9 15:37:28 2015 -0800 drivers/intel/fsp2_0: Return memory_init HOB list to caller FspMemoryInit creates a list of hand-off-blocks (HOBs) which it returns to the caller. One of the HOBs describes an area of memory reserved for FSP. If that area is overwritten, FSP will Crash'n'Burn (TM), so in a future patch, we will parse the HOB list and mark the FSP memory area as reserved. Change-Id: I5ecbb536ac73245aa1b5a433d3dd8ac6eb4b5411 Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> --- src/drivers/intel/fsp2_0/include/fsp/api.h | 2 +- src/drivers/intel/fsp2_0/memory_init.c | 10 +++++----- src/soc/intel/apollolake/romstage/romstage.c | 3 ++- 3 files changed, 8 insertions(+), 7 deletions(-) diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h index e51b854..f51174f 100644 --- a/src/drivers/intel/fsp2_0/include/fsp/api.h +++ b/src/drivers/intel/fsp2_0/include/fsp/api.h @@ -33,7 +33,7 @@ enum fsp_status { }; /* Main FSP stages */ -enum fsp_status fsp_memory_init(void); +enum fsp_status fsp_memory_init(void **hob_list); enum fsp_status fsp_silicon_init(void); enum fsp_status fsp_notify(void); diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index c05c286..92c30b4 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -58,13 +58,13 @@ void platform_fsp_memory_init_params_cb(struct MEMORY_INIT_UPD *memupd) printk(BIOS_DEBUG, "WEAK: %s called\n", __func__); } -static enum fsp_status do_fsp_memory_init(struct fsp_header *hdr) +static enum fsp_status do_fsp_memory_init(void **hob_list_ptr, + struct fsp_header *hdr) { enum fsp_status status; fsp_memory_init_fn fsp_raminit; struct fsp_memory_init_params raminit_params; struct fsp_init_rt_common_buffer rt_buffer; - void *hob_list_ptr; struct MEMORY_INIT_UPD raminit_upd; struct UPD_DATA_REGION *upd_region; @@ -81,7 +81,7 @@ static enum fsp_status do_fsp_memory_init(struct fsp_header *hdr) /* Get any board specific changes */ raminit_params.nvs_buffer = NULL; raminit_params.rt_buffer = &rt_buffer; - raminit_params.hob_list = &hob_list_ptr; + raminit_params.hob_list = hob_list_ptr; /* Update the UPD data */ raminit_upd.GpioPadInitTablePtr = NULL; @@ -116,12 +116,12 @@ static void relocate_fit(void) memcpy((void*)CONFIG_FIT_CAR_ADDR, (void*)fit_loc, FIT_SIZE); } -enum fsp_status fsp_memory_init(void) +enum fsp_status fsp_memory_init(void **hob_list) { struct fsp_header hdr; if (fsp_load_binary(&hdr, "blobs/fsp-m.bin") != CB_SUCCESS) return FSP_NOT_FOUND; relocate_fit(); - return do_fsp_memory_init(&hdr); + return do_fsp_memory_init(hob_list, &hdr); } diff --git a/src/soc/intel/apollolake/romstage/romstage.c b/src/soc/intel/apollolake/romstage/romstage.c index 6efbdd5..88d872e 100644 --- a/src/soc/intel/apollolake/romstage/romstage.c +++ b/src/soc/intel/apollolake/romstage/romstage.c @@ -73,6 +73,7 @@ static void *alloc_stack_in_ram(void) asmlinkage void* romstage_entry(void) { + void *hob_list_ptr; /* Be careful. Bootblock might already have initialized the console */ if (!IS_ENABLED(CONFIG_BOOTBLOCK_CONSOLE)) { lpss_console_uart_init(); @@ -83,7 +84,7 @@ asmlinkage void* romstage_entry(void) soc_early_romstage_init(); - fsp_memory_init(); + fsp_memory_init(&hob_list_ptr); cbmem_initialize_empty(); return alloc_stack_in_ram();

1 0

Patch set updated for coreboot: soc/apollolake: Call FSP Silicon Init as part of chip init
by Alexandru Gagniuc 26 Jan '16

26 Jan '16

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13346 -gerrit commit 26faf51ae60b0536b5d2de0a958266feb88353af Author: Andrey Petrov <andrey.petrov(a)intel.com> Date: Thu Nov 5 14:40:23 2015 -0800 soc/apollolake: Call FSP Silicon Init as part of chip init Change-Id: Ic1ed0dccefe4130195ab91792f0844e696e0746f Signed-off-by: Andrey Petrov <andrey.petrov(a)intel.com> --- src/soc/intel/apollolake/chip.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index 2b6384a..34d6d3a 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -3,6 +3,7 @@ * * Copyright (C) 2015 Intel Corp. * (Written by Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com> for Intel Corp.) + * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.) * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -13,6 +14,7 @@ #include <cpu/cpu.h> #include <device/device.h> #include <device/pci.h> +#include <fsp/api.h> static struct device_operations pci_domain_ops = { .read_resources = pci_domain_read_resources, @@ -46,7 +48,13 @@ static void enable_dev(device_t dev) } } +static void soc_init(void *data) +{ + fsp_silicon_init(); +} + struct chip_operations soc_intel_apollolake_ops = { CHIP_NAME("Intel Apollolake SOC") .enable_dev = &enable_dev, + .init = &soc_init };

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Patch set updated for coreboot: intel/apollolake_rvp: Fill pci tree to match silicon.
by Alexandru Gagniuc 26 Jan '16

26 Jan '16

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13347 -gerrit commit 8170723cc1f065c3a9a692dd29a6fd3d0a1c2725 Author: Lance Zhao <lijian.zhao(a)intel.com> Date: Thu Nov 5 14:58:46 2015 -0800 intel/apollolake_rvp: Fill pci tree to match silicon. Follow Bxt-P Pci configuration matrix to fufill the device tree. Change-Id: I228fe7383e052f1b78dc6ab0edb6e78eeb5bc234 Signed-off-by: Lance Zhao <lijian.zhao(a)intel.com> --- src/mainboard/intel/apollolake_rvp/devicetree.cb | 40 ++++++++++++++++++++++++ 1 file changed, 40 insertions(+) diff --git a/src/mainboard/intel/apollolake_rvp/devicetree.cb b/src/mainboard/intel/apollolake_rvp/devicetree.cb index 741d88e..639d293 100755 --- a/src/mainboard/intel/apollolake_rvp/devicetree.cb +++ b/src/mainboard/intel/apollolake_rvp/devicetree.cb @@ -4,5 +4,45 @@ chip soc/intel/apollolake device lapic 0 on end end device domain 0 on + device pci 00.0 on end # - Host Bridge + device pci 00.1 on end # - DPTF + device pci 00.2 on end # - NPK + device pci 02.0 on end # - Gen + device pci 03.0 on end # - Iunit + device pci 0d.0 on end # - P2SB + device pci 0d.1 on end # - PMC + device pci 0d.2 on end # - SPI + device pci 0d.3 on end # - Shared SRAM + device pci 0e.0 on end # - Audio + device pci 11.0 on end # - ISH + device pci 12.0 on end # - SATA + device pci 13.0 on end # - PCIe-A 0 + device pci 13.2 on end # - Onboard Lan + device pci 13.3 on end # - PCIe-A 3 + device pci 14.0 on end # - PCIe-B 0 + device pci 14.1 on end # - Onboard M2 Slot(Wifi/BT) + device pci 15.0 on end # - XHCI + device pci 15.1 on end # - XDCI + device pci 16.0 on end # - I2C 0 + device pci 16.1 on end # - I2C 1 + device pci 16.2 on end # - I2C 2 + device pci 16.3 on end # - I2C 3 + device pci 17.0 on end # - I2C 4 + device pci 17.1 on end # - I2C 5 + device pci 17.2 on end # - I2C 6 + device pci 17.3 on end # - I2C 7 + device pci 18.0 on end # - UART 0 + device pci 18.1 on end # - UART 1 + device pci 18.2 on end # - UART 2 + device pci 18.3 on end # - UART 3 + device pci 19.0 on end # - SPI 0 + device pci 19.1 on end # - SPI 1 + device pci 19.2 on end # - SPI 2 + device pci 1a.0 on end # - PWM + device pci 1b.0 on end # - SDCARD + device pci 1c.0 on end # - eMMC + device pci 1e.0 on end # - SDIO + device pci 1f.0 on end # - LPC + device pci 1f.1 on end # - SMBUS end end

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Patch set updated for coreboot: drivers/intel/fsp2_0: Add FSP-S support
by Alexandru Gagniuc 26 Jan '16

26 Jan '16

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13345 -gerrit commit 5f03c7943ecea1a13731a0db7179ad26e415cf67 Author: Andrey Petrov <andrey.petrov(a)intel.com> Date: Thu Nov 5 13:00:34 2015 -0800 drivers/intel/fsp2_0: Add FSP-S support This implements loading FSP-S blob and calling into Silicon Init API Change-Id: Ib3242d31e550efbbbf1a4c388997a0bbc4a465b1 Signed-off-by: Andrey Petrov <andrey.petrov(a)intel.com> --- src/drivers/intel/fsp2_0/Makefile.inc | 4 ++- src/drivers/intel/fsp2_0/silicon_init.c | 59 +++++++++++++++++++++++++++++++++ 2 files changed, 62 insertions(+), 1 deletion(-) diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 763b46d..ef0cae8 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -1,7 +1,9 @@ - romstage-y += util.c romstage-y += memory_init.c +ramstage-y += silicon_init.c +ramstage-y += util.c + CPPFLAGS_common += -I$(src)/drivers/intel/fsp2_0/include cbfs-files-$(CONFIG_ADD_FSP_BINARIES) += blobs/fsp-m.bin diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c new file mode 100644 index 0000000..a6011c9 --- /dev/null +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -0,0 +1,59 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2015 Intel Corp. + * (Written by Andrey Petrov <andrey.petrov(a)intel.com> for Intel Corp.) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include <arch/cpu.h> +#include <console/console.h> +#include <fsp/api.h> +#include <fsp/util.h> +#include <string.h> + +typedef asmlinkage enum fsp_status (*fsp_silicon_init_fn) + (struct SILICON_INIT_UPD *upd); + + +static enum fsp_status do_silicon_init(struct fsp_header *hdr) +{ + struct SILICON_INIT_UPD silicon_upd; + fsp_silicon_init_fn silicon_init; + void *upd_region; + enum fsp_status status; + + upd_region = (void*)(hdr->cfg_region_offset + hdr->image_base); + + /* populate upd with defaults */ + memcpy(&silicon_upd, upd_region, sizeof(silicon_upd)); + + silicon_init = (void *)(hdr->image_base + hdr->silicon_init_entry_offset); + + /* give a chance to populate entries */ + platform_fsp_silicon_init_params_cb(&silicon_upd); + + status = silicon_init(&silicon_upd); + printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status); + return status; +} + +enum fsp_status fsp_silicon_init(void) +{ + struct fsp_header hdr; + + if (fsp_load_binary(&hdr, "blobs/fsp-s.bin") != CB_SUCCESS) + return FSP_NOT_FOUND; + + return do_silicon_init(&hdr); +} + +__attribute__((weak)) +void platform_fsp_silicon_init_params_cb(struct SILICON_INIT_UPD *silupd) +{ + printk(BIOS_DEBUG, "WEAK: %s called\n", __func__); +}

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