coreboot-gerrit January 2016

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Patch set updated for coreboot: util/cbfstool: add machine parseable print
by Aaron Durbin 26 Jan '16

26 Jan '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13475 -gerrit commit c5bf80e8b68fdcb0c74c188e8d2f6c0a6495dd9a Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Jan 26 15:35:34 2016 -0600 util/cbfstool: add machine parseable print In order to more easily process the output of 'cbfstool print' with other tools provide a -k option which spits out the tab-separated header and fields: Name Offset Type Metadata Size Data Size Total Size ALIGN_UP(Offset + Total Size, 64) would be the start of the next entry. Also, one can analzye the overhead and offsets of each file more easily. Example output (note: tabs aren't in here): $ ./coreboot-builds/sharedutils/cbfstool/cbfstool test.serial.bin print -r FW_MAIN_A -k Performing operation on 'FW_MAIN_A' region... Name Offset Type Metadata Size Data Size Total Size cmos_layout.bin 0x0 cmos_layout 0x38 0x48c 0x4c4 dmic-2ch-48khz-16b.bin 0x500 raw 0x48 0xb68 0xbb0 dmic-2ch-48khz-32b.bin 0x10c0 raw 0x48 0xb68 0xbb0 nau88l25-2ch-48khz-24b.bin 0x1c80 raw 0x48 0x54 0x9c ssm4567-render-2ch-48khz-24b.bin 0x1d40 raw 0x58 0x54 0xac ssm4567-capture-4ch-48khz-32b.bin 0x1e00 raw 0x58 0x54 0xac vbt.bin 0x1ec0 optionrom 0x38 0x1000 0x1038 spd.bin 0x2f00 spd 0x38 0x600 0x638 config 0x3540 raw 0x38 0x1ab7 0x1aef revision 0x5040 raw 0x38 0x25e 0x296 font.bin 0x5300 raw 0x38 0x77f 0x7b7 vbgfx.bin 0x5ac0 raw 0x38 0x32f8 0x3330 locales 0x8e00 raw 0x28 0x2 0x2a locale_en.bin 0x8e40 raw 0x38 0x29f6 0x2a2e u-boot.dtb 0xb880 mrc_cache 0x38 0xff1 0x1029 (empty) 0xc8c0 null 0x64 0xadf4 0xae58 fallback/ramstage 0x17740 stage 0x38 0x15245 0x1527d (empty) 0x2c9c0 null 0x64 0xd324 0xd388 fallback/payload 0x39d80 payload 0x38 0x12245 0x1227d cpu_microcode_blob.bin 0x4c000 microcode 0x60 0x17000 0x17060 (empty) 0x63080 null 0x28 0x37cf18 0x37cf40 Change-Id: I1c5f8c1b5f2f980033d6c954c9840299c6268431 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- util/cbfstool/cbfs_image.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++ util/cbfstool/cbfs_image.h | 1 + util/cbfstool/cbfstool.c | 13 ++++++++--- 3 files changed, 67 insertions(+), 3 deletions(-) diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index 2d7a6f0..24231fb 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -1075,6 +1075,42 @@ int cbfs_print_entry_info(struct cbfs_image *image, struct cbfs_file *entry, return 0; } +static int cbfs_print_parseable_entry_info(struct cbfs_image *image, + struct cbfs_file *entry, void *arg) +{ + FILE *fp = (FILE *)arg; + const char *name; + const char *type; + size_t offset; + size_t metadata_size; + size_t data_size; + const char *sep = "\t"; + + if (!cbfs_is_valid_entry(image, entry)) { + ERROR("cbfs_print_entry_info: Invalid entry at 0x%x\n", + cbfs_get_entry_addr(image, entry)); + return -1; + } + + name = entry->filename; + if (*name == '\0') + name = "(empty)"; + type = get_cbfs_entry_type_name(ntohl(entry->type)), + metadata_size = ntohl(entry->offset); + data_size = ntohl(entry->len); + offset = cbfs_get_entry_addr(image, entry); + + fprintf(fp, "%s%s", name, sep); + fprintf(fp, "0x%zx%s", offset, sep); + fprintf(fp, "%s%s", type, sep); + fprintf(fp, "0x%zx%s", metadata_size, sep); + fprintf(fp, "0x%zx%s", data_size, sep); + fprintf(fp, "0x%zx%s", metadata_size + data_size, sep); + fprintf(fp, "\n"); + + return 0; +} + int cbfs_print_directory(struct cbfs_image *image) { if (cbfs_is_legacy_cbfs(image)) @@ -1084,6 +1120,26 @@ int cbfs_print_directory(struct cbfs_image *image) return 0; } +int cbfs_print_parseable_directory(struct cbfs_image *image) +{ + int i; + const char *header[] = { + "Name", + "Offset", + "Type", + "Metadata Size", + "Data Size", + "Total Size", + }; + const char *sep = "\t"; + + for (i = 0; i < ARRAY_SIZE(header); i++) + fprintf(stdout, "%s%s", header[i], sep); + fprintf(stdout, "\n"); + cbfs_walk(image, cbfs_print_parseable_entry_info, stdout); + return 0; +} + int cbfs_merge_empty_entry(struct cbfs_image *image, struct cbfs_file *entry, unused void *arg) { diff --git a/util/cbfstool/cbfs_image.h b/util/cbfstool/cbfs_image.h index 00adcc8..38510d2 100644 --- a/util/cbfstool/cbfs_image.h +++ b/util/cbfstool/cbfs_image.h @@ -158,6 +158,7 @@ int cbfs_is_valid_entry(struct cbfs_image *image, struct cbfs_file *entry); /* Print CBFS component information. */ int cbfs_print_directory(struct cbfs_image *image); +int cbfs_print_parseable_directory(struct cbfs_image *image); int cbfs_print_header_info(struct cbfs_image *image); int cbfs_print_entry_info(struct cbfs_image *image, struct cbfs_file *entry, void *arg); diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 23787d8..13a9956 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -75,6 +75,7 @@ static struct param { bool show_immutable; bool stage_xip; bool autogen_attr; + bool machine_parseable; int fit_empty_entries; enum comp_algo compression; enum vb2_hash_algorithm hash; @@ -838,8 +839,10 @@ static int cbfs_print(void) if (cbfs_image_from_buffer(&image, param.image_region, param.headeroffset)) return 1; - cbfs_print_directory(&image); - return 0; + if (param.machine_parseable) + return cbfs_print_parseable_directory(&image); + else + return cbfs_print_directory(&image); } /* Forward declared so there aren't type collisions with cbfstool proper @@ -1066,7 +1069,7 @@ static const struct command commands[] = { {"hashcbfs", "r:R:A:vh?", cbfs_hash, true, true}, {"extract", "H:r:m:n:f:vh?", cbfs_extract, true, false}, {"layout", "wvh?", cbfs_layout, false, false}, - {"print", "H:r:vh?", cbfs_print, true, false}, + {"print", "H:r:vkh?", cbfs_print, true, false}, {"read", "r:f:vh?", cbfs_read, true, false}, {"remove", "H:r:n:vh?", cbfs_remove, true, true}, {"update-fit", "H:r:n:x:vh?", cbfs_update_fit, true, true}, @@ -1105,6 +1108,7 @@ static struct option long_options[] = { {"with-readonly", no_argument, 0, 'w' }, {"xip", no_argument, 0, 'y' }, {"gen-attribute", no_argument, 0, 'g' }, + {"mach-parseable",no_argument, 0, 'k' }, {NULL, 0, 0, 0 } }; @@ -1407,6 +1411,9 @@ int main(int argc, char **argv) case 'g': param.autogen_attr = true; break; + case 'k': + param.machine_parseable = true; + break; case 'h': case '?': usage(argv[0]);

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New patch to review for coreboot: util/cbfstool: add machine parseable print
by Aaron Durbin 26 Jan '16

26 Jan '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13475 -gerrit commit 2b8f74af3d98e5b875d4daceef4abef97a61c6c0 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Tue Jan 26 15:35:34 2016 -0600 util/cbfstool: add machine parseable print In order to more easily process the output of 'cbfstool print' with other tools provide a -k option which spits out the tab-separated header and fields: Name Offset Type Metadata Size Data Size Total Size ALIGN_UP(Offset + Total Size, 64) would be the start of the next entry. Also, one can analzye the overhead and offsets of each file more easily. Change-Id: I1c5f8c1b5f2f980033d6c954c9840299c6268431 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- util/cbfstool/cbfs_image.c | 56 ++++++++++++++++++++++++++++++++++++++++++++++ util/cbfstool/cbfs_image.h | 1 + util/cbfstool/cbfstool.c | 13 ++++++++--- 3 files changed, 67 insertions(+), 3 deletions(-) diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index 2d7a6f0..24231fb 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -1075,6 +1075,42 @@ int cbfs_print_entry_info(struct cbfs_image *image, struct cbfs_file *entry, return 0; } +static int cbfs_print_parseable_entry_info(struct cbfs_image *image, + struct cbfs_file *entry, void *arg) +{ + FILE *fp = (FILE *)arg; + const char *name; + const char *type; + size_t offset; + size_t metadata_size; + size_t data_size; + const char *sep = "\t"; + + if (!cbfs_is_valid_entry(image, entry)) { + ERROR("cbfs_print_entry_info: Invalid entry at 0x%x\n", + cbfs_get_entry_addr(image, entry)); + return -1; + } + + name = entry->filename; + if (*name == '\0') + name = "(empty)"; + type = get_cbfs_entry_type_name(ntohl(entry->type)), + metadata_size = ntohl(entry->offset); + data_size = ntohl(entry->len); + offset = cbfs_get_entry_addr(image, entry); + + fprintf(fp, "%s%s", name, sep); + fprintf(fp, "0x%zx%s", offset, sep); + fprintf(fp, "%s%s", type, sep); + fprintf(fp, "0x%zx%s", metadata_size, sep); + fprintf(fp, "0x%zx%s", data_size, sep); + fprintf(fp, "0x%zx%s", metadata_size + data_size, sep); + fprintf(fp, "\n"); + + return 0; +} + int cbfs_print_directory(struct cbfs_image *image) { if (cbfs_is_legacy_cbfs(image)) @@ -1084,6 +1120,26 @@ int cbfs_print_directory(struct cbfs_image *image) return 0; } +int cbfs_print_parseable_directory(struct cbfs_image *image) +{ + int i; + const char *header[] = { + "Name", + "Offset", + "Type", + "Metadata Size", + "Data Size", + "Total Size", + }; + const char *sep = "\t"; + + for (i = 0; i < ARRAY_SIZE(header); i++) + fprintf(stdout, "%s%s", header[i], sep); + fprintf(stdout, "\n"); + cbfs_walk(image, cbfs_print_parseable_entry_info, stdout); + return 0; +} + int cbfs_merge_empty_entry(struct cbfs_image *image, struct cbfs_file *entry, unused void *arg) { diff --git a/util/cbfstool/cbfs_image.h b/util/cbfstool/cbfs_image.h index 00adcc8..38510d2 100644 --- a/util/cbfstool/cbfs_image.h +++ b/util/cbfstool/cbfs_image.h @@ -158,6 +158,7 @@ int cbfs_is_valid_entry(struct cbfs_image *image, struct cbfs_file *entry); /* Print CBFS component information. */ int cbfs_print_directory(struct cbfs_image *image); +int cbfs_print_parseable_directory(struct cbfs_image *image); int cbfs_print_header_info(struct cbfs_image *image); int cbfs_print_entry_info(struct cbfs_image *image, struct cbfs_file *entry, void *arg); diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c index 23787d8..13a9956 100644 --- a/util/cbfstool/cbfstool.c +++ b/util/cbfstool/cbfstool.c @@ -75,6 +75,7 @@ static struct param { bool show_immutable; bool stage_xip; bool autogen_attr; + bool machine_parseable; int fit_empty_entries; enum comp_algo compression; enum vb2_hash_algorithm hash; @@ -838,8 +839,10 @@ static int cbfs_print(void) if (cbfs_image_from_buffer(&image, param.image_region, param.headeroffset)) return 1; - cbfs_print_directory(&image); - return 0; + if (param.machine_parseable) + return cbfs_print_parseable_directory(&image); + else + return cbfs_print_directory(&image); } /* Forward declared so there aren't type collisions with cbfstool proper @@ -1066,7 +1069,7 @@ static const struct command commands[] = { {"hashcbfs", "r:R:A:vh?", cbfs_hash, true, true}, {"extract", "H:r:m:n:f:vh?", cbfs_extract, true, false}, {"layout", "wvh?", cbfs_layout, false, false}, - {"print", "H:r:vh?", cbfs_print, true, false}, + {"print", "H:r:vkh?", cbfs_print, true, false}, {"read", "r:f:vh?", cbfs_read, true, false}, {"remove", "H:r:n:vh?", cbfs_remove, true, true}, {"update-fit", "H:r:n:x:vh?", cbfs_update_fit, true, true}, @@ -1105,6 +1108,7 @@ static struct option long_options[] = { {"with-readonly", no_argument, 0, 'w' }, {"xip", no_argument, 0, 'y' }, {"gen-attribute", no_argument, 0, 'g' }, + {"mach-parseable",no_argument, 0, 'k' }, {NULL, 0, 0, 0 } }; @@ -1407,6 +1411,9 @@ int main(int argc, char **argv) case 'g': param.autogen_attr = true; break; + case 'k': + param.machine_parseable = true; + break; case 'h': case '?': usage(argv[0]);

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New patch to review for coreboot: build system: Fix UPDATE_IMAGE
by Patrick Georgi 26 Jan '16

26 Jan '16

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13474 -gerrit commit 5f96c76831bcdad0047ce2006a73f1ca53e88c96 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Tue Jan 26 22:25:40 2016 +0100 build system: Fix UPDATE_IMAGE A quote was missing in a command. Change-Id: I04148538007e5c450c6be113aab8a7fbb534db26 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> Reported-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- Makefile.inc | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Makefile.inc b/Makefile.inc index 5f98864..86ccc31 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -784,7 +784,7 @@ prebuild-files = \ $(obj)/coreboot.pre: $$(prebuilt-files) $(CBFSTOOL) mv $(obj)/coreboot.rom $@.tmp || \ (echo "Error: You have UPDATE_IMAGE set in Kconfig, but have no existing image to update." && \ - echo Exiting." && \ + echo "Exiting." && \ false) $(prebuild-files) true mv $@.tmp $@

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Patch set updated for coreboot: mainboard/asus/kgpe-d16: Add support for lifted BSP APIC IDs
by Timothy Pearson 26 Jan '16

26 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13164 -gerrit commit 2bb42a86ad91ebe4a988b82b0416e5c845f1b9f7 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Nov 24 14:12:01 2015 -0600 mainboard/asus/kgpe-d16: Add support for lifted BSP APIC IDs Change-Id: Ic4b68a032068208d56b2a04150f7fc7d61b38eba Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/mainboard/asus/kgpe-d16/acpi_tables.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) diff --git a/src/mainboard/asus/kgpe-d16/acpi_tables.c b/src/mainboard/asus/kgpe-d16/acpi_tables.c index 24c1724..f20e837 100644 --- a/src/mainboard/asus/kgpe-d16/acpi_tables.c +++ b/src/mainboard/asus/kgpe-d16/acpi_tables.c @@ -36,7 +36,10 @@ unsigned long acpi_fill_madt(unsigned long current) /* create all subtables for processors */ current = acpi_create_madt_lapics(current); - apicid_sp5100 = 0x20; + if (IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) && (CONFIG_APIC_ID_OFFSET > 0)) + apicid_sp5100 = 0x0; + else + apicid_sp5100 = 0x20; apicid_sr5650 = apicid_sp5100 + 1; /* Write SB700 IOAPIC, only one */ @@ -56,15 +59,10 @@ unsigned long acpi_fill_madt(unsigned long current) current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) current, 0, 0, 2, 0); current += acpi_create_madt_irqoverride((acpi_madt_irqoverride_t *) - current, 0, 9, 9, 0xF); - /* 0: mean bus 0--->ISA */ - /* 0: PIC 0 */ - /* 2: APIC 2 */ - /* 5 mean: 0101 --> Edge-triggered, Active high */ + current, 0, 9, 9, 0xf); /* create all subtables for processors */ - current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0, 5, 1); - current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 1, 5, 1); + current += acpi_create_madt_lapic_nmi((acpi_madt_lapic_nmi_t *)current, 0xff, 0, 1); /* 1: LINT1 connect to NMI */ return current; @@ -77,7 +75,10 @@ unsigned long acpi_fill_ivrs_ioapic(acpi_ivrs_t* ivrs, unsigned long current) uint32_t apicid_sp5100; uint32_t apicid_sr5650; - apicid_sp5100 = 0x20; + if (IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID) && (CONFIG_APIC_ID_OFFSET > 0)) + apicid_sp5100 = 0x0; + else + apicid_sp5100 = 0x20; apicid_sr5650 = apicid_sp5100 + 1; /* Describe NB IOAPIC */

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Patch set updated for coreboot: drivers/pc80: Add PS/2 mouse presence detect
by Timothy Pearson 26 Jan '16

26 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13165 -gerrit commit 9b0c49d8f8569bb62190bea89cf9c072dcdc8bf2 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Nov 24 14:12:01 2015 -0600 drivers/pc80: Add PS/2 mouse presence detect On certain Winbond SuperIO devices, when a PS/2 mouse is not present on the auxiliary channel both channels will cease to function if the auxiliary channel is probed while the primary channel is active. Therefore, knowledge of mouse presence must be gathered by coreboot during early boot, and used to enable or disable the auxiliary PS/2 port before control is passed to the operating system. Add auxiliary channel PS/2 device presence detect, and update the Winbond W83667HG-A driver to flag the auxiliary channel as disabled if no device was detected. Change-Id: I76274493dacc9016ac6d0dff8548d1dc931c6266 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/drivers/pc80/keyboard.c | 101 +++++++++++++++++----- src/ec/compal/ene932/ec.c | 2 +- src/ec/google/chromeec/ec_lpc.c | 2 +- src/ec/lenovo/h8/h8.c | 2 +- src/ec/quanta/ene_kb3940q/ec.c | 2 +- src/ec/quanta/it8518/ec.c | 2 +- src/include/pc80/keyboard.h | 5 +- src/mainboard/emulation/qemu-i440fx/mainboard.c | 2 +- src/mainboard/emulation/qemu-q35/mainboard.c | 2 +- src/mainboard/packardbell/ms2290/mainboard.c | 2 +- src/mainboard/roda/rk9/mainboard.c | 2 +- src/northbridge/via/cx700/lpc.c | 2 +- src/northbridge/via/vx800/lpc.c | 2 +- src/southbridge/dmp/vortex86ex/southbridge.c | 2 +- src/southbridge/sis/sis966/lpc.c | 2 +- src/southbridge/via/vt8237r/lpc.c | 2 +- src/superio/fintek/f71863fg/superio.c | 2 +- src/superio/fintek/f71869ad/superio.c | 2 +- src/superio/fintek/f71872/superio.c | 2 +- src/superio/fintek/f81865f/superio.c | 2 +- src/superio/fintek/f81866d/superio.c | 2 +- src/superio/ite/it8671f/superio.c | 2 +- src/superio/ite/it8712f/superio.c | 2 +- src/superio/ite/it8716f/superio.c | 2 +- src/superio/ite/it8718f/superio.c | 2 +- src/superio/ite/it8721f/superio.c | 2 +- src/superio/ite/it8728f/superio.c | 2 +- src/superio/ite/it8772f/superio.c | 2 +- src/superio/nsc/pc87309/superio.c | 2 +- src/superio/nsc/pc87360/superio.c | 2 +- src/superio/nsc/pc87366/superio.c | 2 +- src/superio/nsc/pc87417/superio.c | 2 +- src/superio/nsc/pc97317/superio.c | 2 +- src/superio/nuvoton/nct5572d/superio.c | 2 +- src/superio/nuvoton/nct6779d/superio.c | 2 +- src/superio/nuvoton/wpcm450/superio.c | 2 +- src/superio/renesas/m3885x/superio.c | 2 +- src/superio/smsc/dme1737/superio.c | 2 +- src/superio/smsc/fdc37n972/fdc37n972.c | 2 +- src/superio/smsc/kbc1100/superio.c | 2 +- src/superio/smsc/lpc47b272/superio.c | 2 +- src/superio/smsc/lpc47b397/superio.c | 2 +- src/superio/smsc/lpc47m10x/superio.c | 2 +- src/superio/smsc/lpc47m15x/superio.c | 2 +- src/superio/smsc/lpc47n227/superio.c | 2 +- src/superio/smsc/mec1308/superio.c | 2 +- src/superio/smsc/sch4037/superio.c | 2 +- src/superio/smsc/sio10n268/sio10n268.c | 2 +- src/superio/smsc/smscsuperio/superio.c | 2 +- src/superio/winbond/w83627dhg/superio.c | 2 +- src/superio/winbond/w83627ehg/superio.c | 2 +- src/superio/winbond/w83627hf/superio.c | 2 +- src/superio/winbond/w83627thg/superio.c | 2 +- src/superio/winbond/w83627uhg/superio.c | 2 +- src/superio/winbond/w83667hg-a/ps2_controller.asl | 78 +++++++++++++++++ src/superio/winbond/w83667hg-a/superio.c | 20 ++++- src/superio/winbond/w83977tf/superio.c | 2 +- src/superio/winbond/wpcd376i/superio.c | 2 +- 58 files changed, 233 insertions(+), 79 deletions(-) diff --git a/src/drivers/pc80/keyboard.c b/src/drivers/pc80/keyboard.c index 3e61a51..56b1fce 100644 --- a/src/drivers/pc80/keyboard.c +++ b/src/drivers/pc80/keyboard.c @@ -1,6 +1,7 @@ /* * This file is part of the coreboot project. * + * Copyright (C) 2015 Raptor Engineering * Copyright (C) 2009 coresystems GmbH * Copyright (C) 2008 Advanced Micro Devices, Inc. * Copyright (C) 2003 Ollie Lo <ollielo(a)hotmail.com> @@ -32,6 +33,8 @@ // Keyboard Controller Commands #define KBC_CMD_READ_COMMAND 0x20 // Read command byte #define KBC_CMD_WRITE_COMMAND 0x60 // Write command byte +#define KBC_CMD_AUX_ENABLE 0xA8 // Auxiliary Interface enable +#define KBC_CMD_AUX_TEST 0xA9 // Auxiliary Interface test #define KBC_CMD_SELF_TEST 0xAA // Controller self-test #define KBC_CMD_KBD_TEST 0xAB // Keyboard Interface test @@ -106,9 +109,14 @@ static int kbc_cleanup_buffers(void) return !!timeout; } -static enum cb_err kbc_self_test(void) +static enum cb_err kbc_self_test(uint8_t probe_aux, uint8_t *aux_probe_result) { - u8 self_test; + uint8_t self_test; + uint8_t byte; + + /* Set initial aux probe output value */ + if (aux_probe_result) + *aux_probe_result = 0; /* Clean up any junk that might have been in the KBC. * Both input and output buffers must be empty. @@ -154,6 +162,48 @@ static enum cb_err kbc_self_test(void) return CB_KBD_INTERFACE_FAILURE; } + if (probe_aux) { + /* aux interface detect */ + outb(KBC_CMD_AUX_ENABLE, KBD_COMMAND); + if (!kbc_input_buffer_empty()) { + printk(BIOS_ERR, "Timeout waiting for controller during aux enable.\n"); + return CB_KBD_CONTROLLER_FAILURE; + } + outb(KBC_CMD_READ_COMMAND, KBD_COMMAND); + if (!kbc_output_buffer_full()) { + printk(BIOS_ERR, "Timeout waiting for controller during aux probe.\n"); + return CB_KBD_CONTROLLER_FAILURE; + } + + byte = inb(KBD_DATA); + if (!(byte & (0x1 << 5))) { + printk(BIOS_DEBUG, "PS/2 auxiliary channel detected...\n"); + + /* auxiliary interface test */ + outb(KBC_CMD_AUX_TEST, KBD_COMMAND); + + if (!kbc_output_buffer_full()) { + printk(BIOS_ERR, "Auxiliary channel probe timed out.\n"); + goto aux_failure; + } + + /* read test result, 0x00 should be returned in case of no failures */ + self_test = inb(KBD_DATA); + + if (self_test != 0x00) { + printk(BIOS_ERR, "No device detected on auxiliary channel: 0x%x\n", + self_test); + goto aux_failure; + } + + printk(BIOS_DEBUG, "PS/2 device detected on auxiliary channel\n"); + if (aux_probe_result) + *aux_probe_result = 1; + } + } + +aux_failure: + return CB_SUCCESS; } @@ -187,53 +237,54 @@ static u8 send_keyboard(u8 command) return regval; } -void pc_keyboard_init(void) +uint8_t pc_keyboard_init(uint8_t probe_aux) { u8 retries; u8 regval; enum cb_err err; + uint8_t aux_dev_detected; if (!CONFIG_DRIVERS_PS2_KEYBOARD) - return; + return 0; if (acpi_is_wakeup_s3()) - return; + return 0; printk(BIOS_DEBUG, "Keyboard init...\n"); /* Run a keyboard controller self-test */ - err = kbc_self_test(); + err = kbc_self_test(probe_aux, &aux_dev_detected); /* Ignore iterface failure as it's non-fatal. */ if (err != CB_SUCCESS && err != CB_KBD_INTERFACE_FAILURE) - return; + return 0; /* Enable keyboard interface - No IRQ */ if (!kbc_input_buffer_empty()) - return; + return 0; outb(0x60, KBD_COMMAND); if (!kbc_input_buffer_empty()) - return; + return 0; outb(0x20, KBD_DATA); /* send cmd: enable keyboard */ if (!kbc_input_buffer_empty()) { printk(BIOS_INFO, "Timeout while enabling keyboard\n"); - return; + return 0; } /* clean up any junk that might have been in the keyboard */ if (!kbc_cleanup_buffers()) - return; + return 0; /* reset keyboard and self test (keyboard side) */ regval = send_keyboard(0xFF); if (regval == KBD_REPLY_RESEND) { /* keeps sending RESENDs, probably no keyboard. */ printk(BIOS_INFO, "No PS/2 keyboard detected.\n"); - return; + return 0; } if (regval != KBD_REPLY_ACK) { printk(BIOS_ERR, "Keyboard reset failed ACK: 0x%x\n", regval); - return; + return 0; } /* the reset command takes some time, so wait a little longer */ @@ -241,14 +292,14 @@ void pc_keyboard_init(void) if (!kbc_output_buffer_full()) { printk(BIOS_ERR, "Timeout waiting for keyboard after reset.\n"); - return; + return 0; } regval = inb(KBD_DATA); if (regval != 0xAA) { printk(BIOS_ERR, "Keyboard reset selftest failed: 0x%x\n", regval); - return; + return 0; } /* @@ -260,7 +311,7 @@ void pc_keyboard_init(void) regval = send_keyboard(0xF5); if (regval != KBD_REPLY_ACK) { printk(BIOS_ERR, "Keyboard disable failed ACK: 0x%x\n", regval); - return; + return 0; } /* Set scancode command */ @@ -268,34 +319,38 @@ void pc_keyboard_init(void) if (regval != KBD_REPLY_ACK) { printk(BIOS_ERR, "Keyboard set scancode cmd failed ACK: 0x%x\n", regval); - return; + return 0; } /* Set scancode mode 2 */ regval = send_keyboard(0x02); if (regval != KBD_REPLY_ACK) { printk(BIOS_ERR, "Keyboard set scancode mode failed ACK: 0x%x\n", regval); - return; + return 0; } /* All is well - enable keyboard interface */ if (!kbc_input_buffer_empty()) - return; + return 0; outb(0x60, KBD_COMMAND); if (!kbc_input_buffer_empty()) - return; + return 0; outb(0x65, KBD_DATA); /* send cmd: enable keyboard and IRQ 1 */ if (!kbc_input_buffer_empty()) { printk(BIOS_ERR, "Timeout during keyboard enable\n"); - return; + return 0; } /* enable the keyboard */ regval = send_keyboard(0xF4); if (regval != KBD_REPLY_ACK) { printk(BIOS_ERR, "Keyboard enable failed ACK: 0x%x\n", regval); - return; + return 0; } + + printk(BIOS_DEBUG, "PS/2 keyboard initialized on primary channel\n"); + + return aux_dev_detected; } /* @@ -308,7 +363,7 @@ void set_kbc_ps2_mode(void) enum cb_err err; /* Run a keyboard controller self-test */ - err = kbc_self_test(); + err = kbc_self_test(0, NULL); /* Ignore iterface failure as it's non-fatal. */ if (err != CB_SUCCESS && err != CB_KBD_INTERFACE_FAILURE) return; diff --git a/src/ec/compal/ene932/ec.c b/src/ec/compal/ene932/ec.c index d1687e9..c21672e 100644 --- a/src/ec/compal/ene932/ec.c +++ b/src/ec/compal/ene932/ec.c @@ -133,7 +133,7 @@ static void ene932_init(struct device *dev) return; printk(BIOS_DEBUG, "Compal ENE932: Initializing keyboard.\n"); - pc_keyboard_init(); + pc_keyboard_init(NO_AUX_DEVICE); } diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index 9a16906..8a04135 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -403,7 +403,7 @@ static void lpc_ec_init(struct device *dev) if (!dev->enabled) return; - pc_keyboard_init(); + pc_keyboard_init(0); google_chromeec_init(); } diff --git a/src/ec/lenovo/h8/h8.c b/src/ec/lenovo/h8/h8.c index 3cd30bc..f0ccd48 100644 --- a/src/ec/lenovo/h8/h8.c +++ b/src/ec/lenovo/h8/h8.c @@ -175,7 +175,7 @@ static void h8_smbios_strings(struct device *dev, struct smbios_type11 *t) static void h8_init(device_t dev) { - pc_keyboard_init(); + pc_keyboard_init(0); } struct device_operations h8_dev_ops = { diff --git a/src/ec/quanta/ene_kb3940q/ec.c b/src/ec/quanta/ene_kb3940q/ec.c index 8f23e33..a7d5bd7 100644 --- a/src/ec/quanta/ene_kb3940q/ec.c +++ b/src/ec/quanta/ene_kb3940q/ec.c @@ -142,7 +142,7 @@ static void ene_kb3940q_init(struct device *dev) return; printk(BIOS_DEBUG, "Quanta EnE KB3940Q: Initializing keyboard.\n"); - pc_keyboard_init(); + pc_keyboard_init(0); ene_kb3940q_log_events(); } diff --git a/src/ec/quanta/it8518/ec.c b/src/ec/quanta/it8518/ec.c index 7388c01..dd7268a 100644 --- a/src/ec/quanta/it8518/ec.c +++ b/src/ec/quanta/it8518/ec.c @@ -157,7 +157,7 @@ static void it8518_init(struct device *dev) return; printk(BIOS_DEBUG, "Quanta IT8518: Initializing keyboard.\n"); - pc_keyboard_init(); + pc_keyboard_init(0); } static struct device_operations ops = { diff --git a/src/include/pc80/keyboard.h b/src/include/pc80/keyboard.h index 16cb959..fa45826 100644 --- a/src/include/pc80/keyboard.h +++ b/src/include/pc80/keyboard.h @@ -1,7 +1,10 @@ #ifndef PC80_KEYBOARD_H #define PC80_KEYBOARD_H -void pc_keyboard_init(void); +#define NO_AUX_DEVICE 0 +#define PROBE_AUX_DEVICE 1 + +uint8_t pc_keyboard_init(uint8_t probe_aux); void set_kbc_ps2_mode(void); #endif /* PC80_KEYBOARD_H */ diff --git a/src/mainboard/emulation/qemu-i440fx/mainboard.c b/src/mainboard/emulation/qemu-i440fx/mainboard.c index b2fb46c..e5fb3cb 100644 --- a/src/mainboard/emulation/qemu-i440fx/mainboard.c +++ b/src/mainboard/emulation/qemu-i440fx/mainboard.c @@ -39,7 +39,7 @@ static void qemu_nb_init(device_t dev) /* This sneaked in here, because Qemu does not * emulate a SuperIO chip */ - pc_keyboard_init(); + pc_keyboard_init(0); /* setup IRQ routing */ for (i = 0; i < 32; i++) diff --git a/src/mainboard/emulation/qemu-q35/mainboard.c b/src/mainboard/emulation/qemu-q35/mainboard.c index 82716c9..0000564 100644 --- a/src/mainboard/emulation/qemu-q35/mainboard.c +++ b/src/mainboard/emulation/qemu-q35/mainboard.c @@ -60,7 +60,7 @@ static void qemu_nb_init(device_t dev) /* This sneaked in here, because Qemu does not * emulate a SuperIO chip */ - pc_keyboard_init(); + pc_keyboard_init(0); /* setup IRQ routing for pci slots */ for (i = 0; i < 25; i++) diff --git a/src/mainboard/packardbell/ms2290/mainboard.c b/src/mainboard/packardbell/ms2290/mainboard.c index 065ca94..f964c57 100644 --- a/src/mainboard/packardbell/ms2290/mainboard.c +++ b/src/mainboard/packardbell/ms2290/mainboard.c @@ -121,7 +121,7 @@ static void mainboard_enable(device_t dev) /* This sneaked in here, because EasyNote has no SuperIO chip. */ - pc_keyboard_init(); + pc_keyboard_init(0); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/roda/rk9/mainboard.c b/src/mainboard/roda/rk9/mainboard.c index a5465f9..50e9a75 100644 --- a/src/mainboard/roda/rk9/mainboard.c +++ b/src/mainboard/roda/rk9/mainboard.c @@ -46,7 +46,7 @@ static void mainboard_enable(device_t dev) /* We have no driver for the embedded controller since the firmware does most of the job. Hence, initialize keyboards here. */ - pc_keyboard_init(); + pc_keyboard_init(0); } struct chip_operations mainboard_ops = { diff --git a/src/northbridge/via/cx700/lpc.c b/src/northbridge/via/cx700/lpc.c index 9262e40..e19f638 100644 --- a/src/northbridge/via/cx700/lpc.c +++ b/src/northbridge/via/cx700/lpc.c @@ -285,7 +285,7 @@ static void cx700_lpc_init(struct device *dev) isa_dma_init(); /* Initialize keyboard controller */ - pc_keyboard_init(); + pc_keyboard_init(0); } static struct device_operations cx700_lpc_ops = { diff --git a/src/northbridge/via/vx800/lpc.c b/src/northbridge/via/vx800/lpc.c index 8fbb3be..1bdd7b8 100644 --- a/src/northbridge/via/vx800/lpc.c +++ b/src/northbridge/via/vx800/lpc.c @@ -322,7 +322,7 @@ static void southbridge_init(struct device *dev) setup_i8259(); // make sure interupt controller is configured before keyboard init /* turn on keyboard and RTC, no need to visit this reg twice */ - pc_keyboard_init(); + pc_keyboard_init(0); printk(BIOS_DEBUG, "ps2 usb lid, you set who can wakeup system from s3 sleep\n"); S3_ps2_kb_ms_wakeup(dev); diff --git a/src/southbridge/dmp/vortex86ex/southbridge.c b/src/southbridge/dmp/vortex86ex/southbridge.c index 3ef6a5d..5da7d74 100644 --- a/src/southbridge/dmp/vortex86ex/southbridge.c +++ b/src/southbridge/dmp/vortex86ex/southbridge.c @@ -607,7 +607,7 @@ static void southbridge_init(struct device *dev) retries--; } post_code(POST_DMP_KBD_IS_READY); - pc_keyboard_init(); + pc_keyboard_init(0); } static struct device_operations vortex_sb_ops = { diff --git a/src/southbridge/sis/sis966/lpc.c b/src/southbridge/sis/sis966/lpc.c index 940844b..c40df0a 100644 --- a/src/southbridge/sis/sis966/lpc.c +++ b/src/southbridge/sis/sis966/lpc.c @@ -91,7 +91,7 @@ static void lpc_init(device_t dev) int nmi_option; printk(BIOS_DEBUG, "LPC_INIT -------->\n"); - pc_keyboard_init(); + pc_keyboard_init(0); lpc_usb_legacy_init(dev); lpc_common_init(dev); diff --git a/src/southbridge/via/vt8237r/lpc.c b/src/southbridge/via/vt8237r/lpc.c index b54d494..113ce93 100644 --- a/src/southbridge/via/vt8237r/lpc.c +++ b/src/southbridge/via/vt8237r/lpc.c @@ -625,7 +625,7 @@ static void init_keyboard(struct device *dev) { u8 regval = pci_read_config8(dev, 0x51); if (regval & 0x1) - pc_keyboard_init(); + pc_keyboard_init(0); } static void southbridge_init_common(struct device *dev) diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c index 8e0a643..bb09d01 100644 --- a/src/superio/fintek/f71863fg/superio.c +++ b/src/superio/fintek/f71863fg/superio.c @@ -34,7 +34,7 @@ static void f71863fg_init(struct device *dev) /* TODO: Might potentially need code for HWM or FDC etc. */ case F71863FG_KBC: res0 = find_resource(dev, PNP_IDX_IO0); - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c index f16c37f..8cf9008 100644 --- a/src/superio/fintek/f71869ad/superio.c +++ b/src/superio/fintek/f71869ad/superio.c @@ -34,7 +34,7 @@ static void f71869ad_init(struct device *dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71869AD_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; case F71869AD_HWM: f71869ad_multifunc_init(dev); diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c index 6b4de2d..a973da8 100644 --- a/src/superio/fintek/f71872/superio.c +++ b/src/superio/fintek/f71872/superio.c @@ -32,7 +32,7 @@ static void f71872_init(struct device *dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71872_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/fintek/f81865f/superio.c b/src/superio/fintek/f81865f/superio.c index 9cd5c95..fa9e23e 100644 --- a/src/superio/fintek/f81865f/superio.c +++ b/src/superio/fintek/f81865f/superio.c @@ -32,7 +32,7 @@ static void f81865f_init(struct device *dev) switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F81865F_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/fintek/f81866d/superio.c b/src/superio/fintek/f81866d/superio.c index ce0e066..2a95219 100644 --- a/src/superio/fintek/f81866d/superio.c +++ b/src/superio/fintek/f81866d/superio.c @@ -34,7 +34,7 @@ static void f81866d_init(struct device *dev) switch (dev->path.pnp.device) { /* TODO: Might potentially need extra code for serial, wdt etc. */ case F81866D_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; case F81866D_HWM: // Fixing temp sensor read out and init Fan control diff --git a/src/superio/ite/it8671f/superio.c b/src/superio/ite/it8671f/superio.c index 72e31f1..907e020 100644 --- a/src/superio/ite/it8671f/superio.c +++ b/src/superio/ite/it8671f/superio.c @@ -32,7 +32,7 @@ static void init(struct device *dev) case IT8671F_PP: /* TODO. */ break; case IT8671F_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; case IT8671F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8712f/superio.c b/src/superio/ite/it8712f/superio.c index 02cbefc..1d87f47 100644 --- a/src/superio/ite/it8712f/superio.c +++ b/src/superio/ite/it8712f/superio.c @@ -39,7 +39,7 @@ static void it8712f_init(struct device *dev) break; case IT8712F_KBCK: set_kbc_ps2_mode(); - pc_keyboard_init(); + pc_keyboard_init(0); break; case IT8712F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8716f/superio.c b/src/superio/ite/it8716f/superio.c index 3a9e790..469c255 100644 --- a/src/superio/ite/it8716f/superio.c +++ b/src/superio/ite/it8716f/superio.c @@ -60,7 +60,7 @@ static void it8716f_init(struct device *dev) init_ec(res0->base + EC_INDEX_PORT); break; case IT8716F_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/ite/it8718f/superio.c b/src/superio/ite/it8718f/superio.c index 3f03405..ce10dae 100644 --- a/src/superio/ite/it8718f/superio.c +++ b/src/superio/ite/it8718f/superio.c @@ -34,7 +34,7 @@ static void init(struct device *dev) case IT8718F_EC: /* TODO. */ break; case IT8718F_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; case IT8718F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8721f/superio.c b/src/superio/ite/it8721f/superio.c index 4fc0562..ae052a3 100644 --- a/src/superio/ite/it8721f/superio.c +++ b/src/superio/ite/it8721f/superio.c @@ -35,7 +35,7 @@ static void init(struct device *dev) case IT8721F_EC: /* TODO. */ break; case IT8721F_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; case IT8721F_KBCM: /* TODO. */ break; diff --git a/src/superio/ite/it8728f/superio.c b/src/superio/ite/it8728f/superio.c index 4591bb1..3849d63 100644 --- a/src/superio/ite/it8728f/superio.c +++ b/src/superio/ite/it8728f/superio.c @@ -38,7 +38,7 @@ static void it8728f_init(struct device *dev) break; case IT8728F_KBCK: set_kbc_ps2_mode(); - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/ite/it8772f/superio.c b/src/superio/ite/it8772f/superio.c index 400bbbe..fb1e57a 100644 --- a/src/superio/ite/it8772f/superio.c +++ b/src/superio/ite/it8772f/superio.c @@ -246,7 +246,7 @@ static void it8772f_init(struct device *dev) case IT8772F_KBCK: if (!conf->skip_keyboard) { set_kbc_ps2_mode(); - pc_keyboard_init(); + pc_keyboard_init(0); } break; case IT8772F_KBCM: diff --git a/src/superio/nsc/pc87309/superio.c b/src/superio/nsc/pc87309/superio.c index ecda1e7..f22566c 100644 --- a/src/superio/nsc/pc87309/superio.c +++ b/src/superio/nsc/pc87309/superio.c @@ -29,7 +29,7 @@ static void init(struct device *dev) switch (dev->path.pnp.device) { case PC87309_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c index 6b6e790..248c793 100644 --- a/src/superio/nsc/pc87360/superio.c +++ b/src/superio/nsc/pc87360/superio.c @@ -31,7 +31,7 @@ static void init(struct device *dev) switch(dev->path.pnp.device) { case PC87360_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c index f9dca21..e5c8ac2 100644 --- a/src/superio/nsc/pc87366/superio.c +++ b/src/superio/nsc/pc87366/superio.c @@ -31,7 +31,7 @@ static void init(struct device *dev) switch(dev->path.pnp.device) { case PC87366_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c index 1855db9..7a8d76f 100644 --- a/src/superio/nsc/pc87417/superio.c +++ b/src/superio/nsc/pc87417/superio.c @@ -32,7 +32,7 @@ static void init(struct device *dev) switch(dev->path.pnp.device) { case PC87417_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c index e8cf842..983c7f1 100644 --- a/src/superio/nsc/pc97317/superio.c +++ b/src/superio/nsc/pc97317/superio.c @@ -33,7 +33,7 @@ static void init(struct device *dev) pnp_set_enable(dev, 0); /* Disable keyboard */ pnp_write_config(dev, 0xf0, 0x40); /* Set KBC clock to 8 MHz. */ pnp_set_enable(dev, 1); /* Enable keyboard */ - pc_keyboard_init(); + pc_keyboard_init(0); break; default: break; diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c index 81a8326..6b5febd 100644 --- a/src/superio/nuvoton/nct5572d/superio.c +++ b/src/superio/nuvoton/nct5572d/superio.c @@ -45,7 +45,7 @@ static void nct5572d_init(struct device *dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case NCT5572D_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; case NCT5572D_ACPI: /* Set power state after power fail */ diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c index 5cc5f54..b6ea5ea 100644 --- a/src/superio/nuvoton/nct6779d/superio.c +++ b/src/superio/nuvoton/nct6779d/superio.c @@ -35,7 +35,7 @@ static void nct6779d_init(struct device *dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case NCT6779D_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/nuvoton/wpcm450/superio.c b/src/superio/nuvoton/wpcm450/superio.c index bfc3c5e..c6cb494 100644 --- a/src/superio/nuvoton/wpcm450/superio.c +++ b/src/superio/nuvoton/wpcm450/superio.c @@ -31,7 +31,7 @@ static void init(struct device *dev) switch(dev->path.pnp.device) { case WPCM450_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/renesas/m3885x/superio.c b/src/superio/renesas/m3885x/superio.c index 1f30bfe..84c014c 100644 --- a/src/superio/renesas/m3885x/superio.c +++ b/src/superio/renesas/m3885x/superio.c @@ -33,7 +33,7 @@ static void m3885x_init(struct device *dev) printk(BIOS_DEBUG, "Renesas M3885x: Initializing keyboard.\n"); set_kbc_ps2_mode(); - pc_keyboard_init(); + pc_keyboard_init(0); m3885_configure_multikey(); } diff --git a/src/superio/smsc/dme1737/superio.c b/src/superio/smsc/dme1737/superio.c index 23f2c7d..0e9bd4c 100644 --- a/src/superio/smsc/dme1737/superio.c +++ b/src/superio/smsc/dme1737/superio.c @@ -35,7 +35,7 @@ static void dme1737_init(struct device *dev) switch(dev->path.pnp.device) { case DME1737_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/fdc37n972/fdc37n972.c b/src/superio/smsc/fdc37n972/fdc37n972.c index 0c6b517..cf94912 100644 --- a/src/superio/smsc/fdc37n972/fdc37n972.c +++ b/src/superio/smsc/fdc37n972/fdc37n972.c @@ -31,7 +31,7 @@ static void init(struct device *dev) case FDC37N972_PP: /* TODO. */ break; case FDC37N972_KBDC: - pc_keyboard_init(); + pc_keyboard_init(0); break; // [..] The rest: TODO } diff --git a/src/superio/smsc/kbc1100/superio.c b/src/superio/smsc/kbc1100/superio.c index 81fb394..687691c 100644 --- a/src/superio/smsc/kbc1100/superio.c +++ b/src/superio/smsc/kbc1100/superio.c @@ -68,7 +68,7 @@ static void kbc1100_init(struct device *dev) case KBC1100_KBC: res0 = find_resource(dev, PNP_IDX_IO0); res1 = find_resource(dev, PNP_IDX_IO1); - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c index 6cc4823..e8d4741 100644 --- a/src/superio/smsc/lpc47b272/superio.c +++ b/src/superio/smsc/lpc47b272/superio.c @@ -46,7 +46,7 @@ static void lpc47b272_init(struct device *dev) switch(dev->path.pnp.device) { case LPC47B272_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c index 6270d92..76164b5 100644 --- a/src/superio/smsc/lpc47b397/superio.c +++ b/src/superio/smsc/lpc47b397/superio.c @@ -45,7 +45,7 @@ static void lpc47b397_init(struct device *dev) switch(dev->path.pnp.device) { case LPC47B397_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c index c3c7feb..bcde524 100644 --- a/src/superio/smsc/lpc47m10x/superio.c +++ b/src/superio/smsc/lpc47m10x/superio.c @@ -44,7 +44,7 @@ static void lpc47m10x_init(struct device *dev) switch(dev->path.pnp.device) { case LPC47M10X2_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c index 166f383..6736621 100644 --- a/src/superio/smsc/lpc47m15x/superio.c +++ b/src/superio/smsc/lpc47m15x/superio.c @@ -66,7 +66,7 @@ static void lpc47m15x_init(struct device *dev) switch(dev->path.pnp.device) { case LPC47M15X_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/lpc47n227/superio.c b/src/superio/smsc/lpc47n227/superio.c index 3885ef32..a5e33fa 100644 --- a/src/superio/smsc/lpc47n227/superio.c +++ b/src/superio/smsc/lpc47n227/superio.c @@ -131,7 +131,7 @@ static void lpc47n227_init(struct device *dev) switch (dev->path.pnp.device) { case LPC47N227_KBDC: printk(BIOS_DEBUG, "LPC47N227: Initializing keyboard.\n"); - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/mec1308/superio.c b/src/superio/smsc/mec1308/superio.c index 2beeec6..aa3d012 100644 --- a/src/superio/smsc/mec1308/superio.c +++ b/src/superio/smsc/mec1308/superio.c @@ -34,7 +34,7 @@ static void mec1308_init(struct device *dev) switch(dev->path.pnp.device) { case MEC1308_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c index 0f09914..4906aa2 100644 --- a/src/superio/smsc/sch4037/superio.c +++ b/src/superio/smsc/sch4037/superio.c @@ -33,7 +33,7 @@ static void sch4037_init(struct device *dev) switch(dev->path.pnp.device) { case SCH4037_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/smsc/sio10n268/sio10n268.c b/src/superio/smsc/sio10n268/sio10n268.c index 5892f0c..e0b0d99 100644 --- a/src/superio/smsc/sio10n268/sio10n268.c +++ b/src/superio/smsc/sio10n268/sio10n268.c @@ -31,7 +31,7 @@ static void init(struct device *dev) break; case SIO10N268_KBDC: /* TODO: This is still hardcoded. */ - pc_keyboard_init(); + pc_keyboard_init(0); break; // [..] The rest: TODO } diff --git a/src/superio/smsc/smscsuperio/superio.c b/src/superio/smsc/smscsuperio/superio.c index b3238de..fec8157 100644 --- a/src/superio/smsc/smscsuperio/superio.c +++ b/src/superio/smsc/smscsuperio/superio.c @@ -163,7 +163,7 @@ static void smsc_init(struct device *dev) /* A Super I/O was found, so initialize the respective device. */ ld = dev->path.pnp.device; if (ld == logical_device_table[i].devs[LD_KBC]) { - pc_keyboard_init(); + pc_keyboard_init(0); } } diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index 10dba59..ddda25e 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -43,7 +43,7 @@ static void w83627dhg_init(struct device *dev) w83627dhg_enable_UR2(dev); break; case W83627DHG_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index ea7a982..1060059 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -85,7 +85,7 @@ static void w83627ehg_init(struct device *dev) switch(dev->path.pnp.device) { case W83627EHG_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; case W83627EHG_HWM: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index fe250a1..2402ae0 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -92,7 +92,7 @@ static void w83627hf_init(struct device *dev) switch(dev->path.pnp.device) { case W83627HF_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; case W83627HF_HWM: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/winbond/w83627thg/superio.c b/src/superio/winbond/w83627thg/superio.c index f42f948..da9bab2 100644 --- a/src/superio/winbond/w83627thg/superio.c +++ b/src/superio/winbond/w83627thg/superio.c @@ -33,7 +33,7 @@ static void w83627thg_init(struct device *dev) switch(dev->path.pnp.device) { case W83627THG_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c index 5192c32..d0e443c 100644 --- a/src/superio/winbond/w83627uhg/superio.c +++ b/src/superio/winbond/w83627uhg/superio.c @@ -79,7 +79,7 @@ static void w83627uhg_init(struct device *dev) set_uart_clock_source(dev, 0); break; case W83627UHG_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/winbond/w83667hg-a/ps2_controller.asl b/src/superio/winbond/w83667hg-a/ps2_controller.asl new file mode 100644 index 0000000..c3b5c75 --- /dev/null +++ b/src/superio/winbond/w83667hg-a/ps2_controller.asl @@ -0,0 +1,78 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (c) 2013 Vladimir Serbinenko + * Copyright (c) 2015 Raptor Engineering + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + + /* SuperIO control port */ + Name (SPIO, 0x2E) + + /* SuperIO control map */ + OperationRegion (SPIM, SystemIO, SPIO, 0x02) + Field (SPIM, ByteAcc, NoLock, Preserve) { + SIOI, 8, + SIOD, 8 + } + + /* SuperIO control registers */ + IndexField (SIOI, SIOD, ByteAcc, NoLock, Preserve) { + Offset (0x2A), + CR2A, 8, /* Pin function selection */ + } + + Device (PS2K) // Keyboard + { + Name(_HID, EISAID("PNP0303")) + Name(_CID, EISAID("PNP030B")) + + Name(_CRS, ResourceTemplate() + { + IO (Decode16, 0x60, 0x60, 0x01, 0x01) + IO (Decode16, 0x64, 0x64, 0x01, 0x01) + IRQ (Edge, ActiveHigh, Exclusive) { 0x01 } // IRQ 1 + }) + + Method (_STA, 0) + { + Return (0xf) + } + } + + Device (PS2M) // Mouse + { + Name(_HID, EISAID("PNP0F13")) + Name(_CRS, ResourceTemplate() + { + IRQ (Edge, ActiveHigh, Exclusive) { 0x0c } // IRQ 12 + }) + + Method(_STA, 0) + { + /* Access SuperIO ACPI device */ + Store(0x87, SIOI) + Store(0x87, SIOI) + + /* Read Pin56 function select */ + And(CR2A, 0x2, Local0) + + /* Restore default SuperIO access */ + Store(0xAA, SIOI) + + if (LEqual(Local0, 0x0)) { + /* Mouse function selected */ + Return (0xf) + } + Return (0x0) + } + } diff --git a/src/superio/winbond/w83667hg-a/superio.c b/src/superio/winbond/w83667hg-a/superio.c index 96eddd7..70e3cd0 100644 --- a/src/superio/winbond/w83667hg-a/superio.c +++ b/src/superio/winbond/w83667hg-a/superio.c @@ -23,6 +23,7 @@ #include <pc80/keyboard.h> #include <pc80/mc146818rtc.h> #include <stdlib.h> +#include <arch/acpi.h> #include <superio/conf_mode.h> #include "w83667hg-a.h" @@ -38,6 +39,7 @@ static void w83667hg_a_init(struct device *dev) { uint8_t byte; uint8_t power_status; + uint8_t mouse_detected; if (!dev->enabled) return; @@ -45,7 +47,23 @@ static void w83667hg_a_init(struct device *dev) switch(dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case W83667HG_A_KBC: - pc_keyboard_init(); + /* Enable mouse controller */ + pnp_enter_conf_mode_8787(dev); + byte = pnp_read_config(dev, 0x2a); + byte &= ~(0x1 << 1); + pnp_write_config(dev, 0x2a, byte); + pnp_exit_conf_mode_aa(dev); + + mouse_detected = pc_keyboard_init(1); + + if (!mouse_detected && !acpi_is_wakeup_s3()) { + /* Disable mouse controller */ + pnp_enter_conf_mode_8787(dev); + byte = pnp_read_config(dev, 0x2a); + byte |= 0x1 << 1; + pnp_write_config(dev, 0x2a, byte); + pnp_exit_conf_mode_aa(dev); + } break; case W83667HG_A_ACPI: /* Set power state after power fail */ diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c index f23d7c4..b4fe594 100644 --- a/src/superio/winbond/w83977tf/superio.c +++ b/src/superio/winbond/w83977tf/superio.c @@ -34,7 +34,7 @@ static void w83977tf_init(struct device *dev) switch(dev->path.pnp.device) { case W83977TF_KBC: - pc_keyboard_init(); + pc_keyboard_init(0); break; } } diff --git a/src/superio/winbond/wpcd376i/superio.c b/src/superio/winbond/wpcd376i/superio.c index c455340..3dfb44d 100644 --- a/src/superio/winbond/wpcd376i/superio.c +++ b/src/superio/winbond/wpcd376i/superio.c @@ -41,7 +41,7 @@ static void init(device_t dev) break; case WPCD376I_KBCK: - pc_keyboard_init(); + pc_keyboard_init(0); break; } }

1 0

Patch set updated for coreboot: mainboard/asus/kgpe-d16: Use W83667HG-A specific PS/2 ASL file
by Timothy Pearson 26 Jan '16

26 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13166 -gerrit commit e485f778b319c31e5153b87c7ae6d5e4ba6c2f1f Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Nov 24 14:12:01 2015 -0600 mainboard/asus/kgpe-d16: Use W83667HG-A specific PS/2 ASL file Change-Id: I5a4e223b2e247decd30d8fb2a083be4cff6500a4 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/mainboard/asus/kgpe-d16/dsdt.asl | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/asus/kgpe-d16/dsdt.asl b/src/mainboard/asus/kgpe-d16/dsdt.asl index 702ace1..5f9195a 100644 --- a/src/mainboard/asus/kgpe-d16/dsdt.asl +++ b/src/mainboard/asus/kgpe-d16/dsdt.asl @@ -562,7 +562,7 @@ DefinitionBlock ( }) } - #include "../../../drivers/pc80/ps2_controller.asl" + #include "../../../superio/winbond/w83667hg-a/ps2_controller.asl" /* UART 1 */ Device (URT1)

1 0

Patch set updated for coreboot: nb/amd/amdmct/mct_ddr3: Save and restore SkewMemClk for S3 resume
by Timothy Pearson 26 Jan '16

26 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13167 -gerrit commit 9d5e921654fbc70a83692083099d495ce3e84bfa Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Nov 24 14:12:02 2015 -0600 nb/amd/amdmct/mct_ddr3: Save and restore SkewMemClk for S3 resume Change-Id: Ib331bd330530d4d6be5eb7351d9f9b15c135dd63 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/northbridge/amd/amdmct/mct_ddr3/mct_d.h | 5 +++-- src/northbridge/amd/amdmct/mct_ddr3/s3utils.c | 6 ++++++ 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h index e7361ac..f953919 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h +++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.h @@ -729,7 +729,7 @@ struct amd_s3_persistent_mct_channel_data { uint32_t f3x5c; uint32_t f3x60; - /* Family 15h-specific registers (90 dwords) */ + /* Family 15h-specific registers (91 dwords) */ uint32_t f2x200; uint32_t f2x204; uint32_t f2x208; @@ -785,8 +785,9 @@ struct amd_s3_persistent_mct_channel_data { uint32_t f2x9cx0d0fc231; uint32_t f2x9cx0d0f0_0_f_31[9]; /* [lane] */ uint32_t f2x9cx0d0f8021; + uint32_t f2x9cx0d0fe00a; - /* TOTAL: 342 dwords */ + /* TOTAL: 343 dwords */ } __attribute__((packed)); struct amd_s3_persistent_node_data { diff --git a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c index ae2cca1..fe77075 100644 --- a/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c +++ b/src/northbridge/amd/amdmct/mct_ddr3/s3utils.c @@ -454,6 +454,9 @@ void copy_mct_data_to_save_variable(struct amd_s3_persistent_data* persistent_da data->f2x9cx0d0f0_0_f_31[i] = read_amd_dct_index_register_dct(dev_fn2, node, channel, 0x98, 0x0d0f0031 | (i << 8)); data->f2x9cx0d0f8021 = read_amd_dct_index_register_dct(dev_fn2, node, channel, 0x98, 0x0d0f8021); + + if (channel == 1) + data->f2x9cx0d0fe00a = read_amd_dct_index_register_dct(dev_fn2, node, channel, 0x98, 0x0d0fe00a); } /* Stage 4 */ @@ -796,6 +799,9 @@ void restore_mct_data_from_save_variable(struct amd_s3_persistent_data* persiste write_amd_dct_index_register_dct(PCI_DEV(0, 0x18 + node, 2), node, channel, 0x98, 0x0d0f0031 | (i << 8), data->f2x9cx0d0f0_0_f_31[i]); write_amd_dct_index_register_dct(PCI_DEV(0, 0x18 + node, 2), node, channel, 0x98, 0x0d0f8021, data->f2x9cx0d0f8021); + + if (channel == 1) + write_amd_dct_index_register_dct(PCI_DEV(0, 0x18 + node, 2), node, channel, 0x98, 0x0d0fe00a, data->f2x9cx0d0fe00a); } } }

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Patch set updated for coreboot: southbridge/amd/sb700: Enable extended APIC ID when Kconfig option set
by Timothy Pearson 26 Jan '16

26 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13160 -gerrit commit e97f42d2b312f607ebc0db34b65280307ce65145 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Nov 24 14:11:58 2015 -0600 southbridge/amd/sb700: Enable extended APIC ID when Kconfig option set Change-Id: I52fc2c2294edead3b5dacf397c0a1ab2e08b1e3f Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/southbridge/amd/sb700/sm.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/src/southbridge/amd/sb700/sm.c b/src/southbridge/amd/sb700/sm.c index 5f6d20e..6d93b17 100644 --- a/src/southbridge/amd/sb700/sm.c +++ b/src/southbridge/amd/sb700/sm.c @@ -308,9 +308,11 @@ static void sm_init(device_t dev) dword |= 0x1; pci_write_config32(dev, SB_MMIO_CFG_REG, dword); } - //ACPI_DISABLE_TIMER_IRQ_ENHANCEMENT_FOR_8254_TIMER byte = pci_read_config8(dev, 0xAE); - byte |= 1 << 5; + if (IS_ENABLED(CONFIG_ENABLE_APIC_EXT_ID)) + byte |= 1 << 4; + byte |= 1 << 5; /* ACPI_DISABLE_TIMER_IRQ_ENHANCEMENT_FOR_8254_TIMER */ + byte |= 1 << 6; /* Enable arbiter between APIC and PIC interrupts */ pci_write_config8(dev, 0xAE, byte); /* 4.11:Programming Cycle Delay for AB and BIF Clock Gating */

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Patch set updated for coreboot: mainboard/asus/kgpe-d16: Update DSDT with new devices and bump version
by Timothy Pearson 26 Jan '16

26 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13161 -gerrit commit 6feedd0c56f3c86ce9e502b0367611e0fa5d8964 Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Nov 24 14:11:59 2015 -0600 mainboard/asus/kgpe-d16: Update DSDT with new devices and bump version Change-Id: I15fedb067f1911799f7528b60b8754f2984b38ec Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/mainboard/asus/kgpe-d16/dsdt.asl | 123 ++++++++++++++++++++++++++--------- 1 file changed, 94 insertions(+), 29 deletions(-) diff --git a/src/mainboard/asus/kgpe-d16/dsdt.asl b/src/mainboard/asus/kgpe-d16/dsdt.asl index 44b6a98..702ace1 100644 --- a/src/mainboard/asus/kgpe-d16/dsdt.asl +++ b/src/mainboard/asus/kgpe-d16/dsdt.asl @@ -33,7 +33,7 @@ DefinitionBlock ( "DSDT.AML", /* Output filename */ "DSDT", /* Signature */ - 0x02, /* DSDT Revision, needs to be 2 for 64bit */ + 0x03, /* DSDT Revision, needs to be 2 or higher for 64bit */ "ASUS ", /* OEMID */ "COREBOOT", /* TABLE ID */ 0x00000001 /* OEM Revision */ @@ -47,9 +47,8 @@ DefinitionBlock ( Name(OSV, Ones) /* Assume nothing */ Name(PICM, One) /* Assume APIC */ - /* HPET control */ - Name (SHPB, 0xFED00000) - Name (SHPL, 0x1000) + /* HPET enable */ + Name (HPTE, 0x1) /* Define power states */ Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) /* Normal operation */ @@ -126,12 +125,13 @@ DefinitionBlock ( /* Root of the bus hierarchy */ Scope (\_SB) { - /* Top southbridge PCI device (SR5690) */ + /* Top southbridge PCI device (SR5690 + SP5100) */ Device (PCI0) { /* BUS0 root bus */ - Name (_HID, EisaId ("PNP0A03")) + Name (_HID, EisaId ("PNP0A08")) /* PCI-e root bus (SR5690) */ + Name (_CID, EisaId ("PNP0A03")) /* PCI root bus (SP5100) */ Name (_ADR, 0x00180001) Name (_UID, 0x00) @@ -490,6 +490,78 @@ DefinitionBlock ( Name (_HID, EisaId ("PNP0A05")) Name (_ADR, 0x00140003) + /* Real Time Clock Device */ + Device(RTC0) { + Name(_HID, EISAID("PNP0B00")) /* AT Real Time Clock (not PIIX4 compatible) */ + Name(BUF0, ResourceTemplate() { + IO(Decode16, 0x0070, 0x0070, 0x01, 0x02) + }) + Name(BUF1, ResourceTemplate() { + IRQNoFlags() { 8 } + IO(Decode16, 0x0070, 0x0070, 0x01, 0x02) + }) + Method(_CRS, 0) { + If(HPTE) { + Return(BUF0) + } + Return(BUF1) + } + } + + Device(TMR) { /* Timer */ + Name(_HID,EISAID("PNP0100")) /* System Timer */ + Name(BUF0, ResourceTemplate() { + IO(Decode16, 0x0040, 0x0040, 0x01, 0x04) + }) + Name(BUF1, ResourceTemplate() { + IRQNoFlags() { 0 } + IO(Decode16, 0x0040, 0x0040, 0x01, 0x04) + }) + Method(_CRS, 0) { + If(HPTE) { + Return(BUF0) + } + Return(BUF1) + } + } + + Device(SPKR) { /* Speaker */ + Name(_HID,EISAID("PNP0800")) /* AT style speaker */ + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x0061, 0x0061, 0, 1) + }) + } + + Device(PIC) { + Name(_HID,EISAID("PNP0000")) /* AT Interrupt Controller */ + Name(_CRS, ResourceTemplate() { + IRQNoFlags() { 2 } + IO(Decode16,0x0020, 0x0020, 0, 2) + IO(Decode16,0x00A0, 0x00A0, 0, 2) + }) + } + + Device(MAD) { /* 8257 DMA */ + Name(_HID,EISAID("PNP0200")) /* Hardware Device ID */ + Name(_CRS, ResourceTemplate() { + DMA(Compatibility,BusMaster,Transfer8){4} + IO(Decode16, 0x0000, 0x0000, 0x10, 0x10) + IO(Decode16, 0x0081, 0x0081, 0x01, 0x03) + IO(Decode16, 0x0087, 0x0087, 0x01, 0x01) + IO(Decode16, 0x0089, 0x0089, 0x01, 0x03) + IO(Decode16, 0x008F, 0x008F, 0x01, 0x01) + IO(Decode16, 0x00C0, 0x00C0, 0x10, 0x20) + }) /* End Name(_SB.PCI0.LpcIsaBr.MAD._CRS) */ + } + + Device(COPR) { + Name(_HID,EISAID("PNP0C04")) /* Math Coprocessor */ + Name(_CRS, ResourceTemplate() { + IO(Decode16, 0x00F0, 0x00F0, 0, 0x10) + IRQNoFlags(){13} + }) + } + #include "../../../drivers/pc80/ps2_controller.asl" /* UART 1 */ @@ -515,34 +587,27 @@ DefinitionBlock ( }) } } + } - /* High Precision Event Timer */ - Device (HPET) + /* High Precision Event Timer */ + Device (HPET) + { + Name (_HID, EisaId ("PNP0103")) + Name (CRS, ResourceTemplate () { - Name (_HID, EisaId ("PNP0103")) - Name (CRS, ResourceTemplate () - { - Memory32Fixed (ReadOnly, - 0x00000000, - 0x00001000, - _Y02) - IRQNoFlags () {0} - IRQNoFlags () {8} - }) - Method (_STA, 0, NotSerialized) - { + Memory32Fixed(ReadOnly, 0xFED00000, 0x00000400) + }) + Method (_STA, 0) + { + If(HPTE) { Return (0x0F) } - Method (_CRS, 0, NotSerialized) - { - CreateDWordField (CRS, \_SB.PCI0.LPC.HPET._Y02._BAS, HPT1) - CreateDWordField (CRS, \_SB.PCI0.LPC.HPET._Y02._LEN, HPT2) - Store (SHPB, HPT1) - Store (SHPL, HPT2) - Return (CRS) - } - + Return (0x0) } + Method(_CRS, 0) + { + Return(CRS) + } } /* 0:14.4 PCI Bridge */

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Patch set updated for coreboot: mainboard/asus/kgpe-d16: Clean up legacy PIRQ table code
by Timothy Pearson 26 Jan '16

26 Jan '16

Timothy Pearson (tpearson(a)raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13162 -gerrit commit 5cf0289ee4c61b7ed8f54af092dc66822dd0de0c Author: Timothy Pearson <tpearson(a)raptorengineeringinc.com> Date: Tue Nov 24 14:11:59 2015 -0600 mainboard/asus/kgpe-d16: Clean up legacy PIRQ table code Change-Id: Ib4f46944f076f1e696cf16a1e532eb8635b603c9 Signed-off-by: Timothy Pearson <tpearson(a)raptorengineeringinc.com> --- src/mainboard/asus/kgpe-d16/irq_tables.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/src/mainboard/asus/kgpe-d16/irq_tables.c b/src/mainboard/asus/kgpe-d16/irq_tables.c index 029dea8..ef39db2 100644 --- a/src/mainboard/asus/kgpe-d16/irq_tables.c +++ b/src/mainboard/asus/kgpe-d16/irq_tables.c @@ -2,7 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2010 Advanced Micro Devices, Inc. - * Copyright (C) 2015 Timothy Pearson <tpearson(a)raptorengineeringinc.com>, Raptor Engineering + * Copyright (C) 2015 Raptor Engineering * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -23,6 +23,24 @@ #include <cpu/amd/amdfam10_sysconf.h> +/* Free irqs are 3, 4, 5, 6, 7, 9, 10, 11, 12, 14, and 15 */ +#define IRQBM ((1<<3)|(1<<4)|(1<<5)|(1<<6)|(1<<7)|(1<<9)|(1<<10)|(1<<11)|(1<<12)|(1<<14)|(1<<15)) + +#define LNKA 1 +#define LNKB 2 +#define LNKC 3 +#define LNKD 4 + +/* + * For simplicity map LNK[E-H] to LNK[A-D]. + * This also means we are 82C596 compatible. + * Needs 0:11.0 0x46[4] set to 0. + */ +#define LNKE 1 +#define LNKF 2 +#define LNKG 3 +#define LNKH 4 + static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, u8 link0, u16 bitmap0, u8 link1, u16 bitmap1, u8 link2, u16 bitmap2, u8 link3, u16 bitmap3, @@ -42,9 +60,10 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn, pirq_info->rfu = rfu; } extern u8 bus_isa; -extern u8 bus_rs780[8]; +extern u8 bus_sr5650[14]; extern u8 bus_sp5100[2]; -extern unsigned long sbdn_sp5100; +extern u32 sbdn_sp5100; +extern u32 sbdn_sr5650; unsigned long write_pirq_routing_table(unsigned long addr) { @@ -71,6 +90,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->signature = PIRQ_SIGNATURE; pirq->version = PIRQ_VERSION; + /* Where the interrupt router resides */ pirq->rtr_bus = bus_sp5100[0]; pirq->rtr_devfn = PCI_DEVFN(0x14, 4); @@ -88,8 +108,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) /* pci bridge */ write_pirq_info(pirq_info, bus_sp5100[0], ((sbdn_sp5100 + 0x14) << 3) | 4, - 0x1, 0xdef8, 0x2, 0xdef8, 0x3, 0xdef8, 0x4, 0xdef8, 0, - 0); + LNKA, IRQBM, LNKB, IRQBM, LNKC, IRQBM, LNKD, IRQBM, 0, 0); pirq_info++; slot_num++; @@ -103,7 +122,7 @@ unsigned long write_pirq_routing_table(unsigned long addr) pirq->checksum = sum; } - printk(BIOS_INFO, "write_pirq_routing_table done.\n"); + printk(BIOS_INFO, "done.\n"); return (unsigned long)pirq_info; }

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coreboot-gerrit January 2016