coreboot-gerrit July 2015

coreboot-gerrit@coreboot.org

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1048 discussions

New patch to review for coreboot: intel/sandybridge/gma: Add graphics PCI Device ID 0x0162
by Damien Zammit 13 Jul '15

13 Jul '15

Damien Zammit (damien(a)zamaudio.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10896 -gerrit commit baa35c894b3008aec066d2a8c8051ee2beefbd0e Author: Damien Zammit <damien(a)zamaudio.com> Date: Mon Jul 13 16:10:52 2015 +1000 intel/sandybridge/gma: Add graphics PCI Device ID 0x0162 Change-Id: Ide0fd757cdd31a5b5ff184f7ab2d48e62ea50015 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> --- src/northbridge/intel/sandybridge/gma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 979d65a..d635a36 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -651,7 +651,7 @@ static struct device_operations gma_func0_ops = { static const unsigned short pci_device_ids[] = { 0x0102, 0x0106, 0x010a, 0x0112, 0x0116, 0x0122, 0x0126, 0x0156, - 0x0166, + 0x0166, 0x0162, 0 }; static const struct pci_driver gma __pci_driver = {

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New patch to review for coreboot: gigabyte/ga-b75m-d3h: Mainboard boot fix
by Damien Zammit 13 Jul '15

13 Jul '15

Damien Zammit (damien(a)zamaudio.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10895 -gerrit commit 1a47e4bde8832c47e1626b131eda98c80c21a532 Author: Damien Zammit <damien(a)zamaudio.com> Date: Mon Jul 13 15:27:01 2015 +1000 gigabyte/ga-b75m-d3h: Mainboard boot fix NB: This patch needs to be tested on the hardware. I believe this patch will resolve all outstanding issues with PCI device enumeration and getting the board to boot into GNU/Linux with VGA rom. Patrick R, can you please test this patch on your D3H board with VGA rom? Change-Id: Ide1f406652659e6f99ee5d993719c187650fffe4 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> --- src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb index 19a476c..f4a8664 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb @@ -24,7 +24,7 @@ chip northbridge/intel/sandybridge device pci 00.0 on # host bridge subsystemid 0x1458 0x5000 end - device pci 01.0 off end # PCIe Bridge for discrete graphics + device pci 01.0 on end # PCIe Bridge for discrete graphics device pci 02.0 on # vga controller subsystemid 0x1458 0xd000 end @@ -58,7 +58,7 @@ chip northbridge/intel/sandybridge device pci 1b.0 on # High Definition Audio subsystemid 0x1458 0xa002 end - device pci 1c.0 off end # PCIe Port #1 + device pci 1c.0 on end # PCIe Port #1 device pci 1c.1 off end # PCIe Port #2 device pci 1c.2 off end # PCIe Port #3 device pci 1c.3 off end # PCIe Port #4 @@ -92,17 +92,19 @@ chip northbridge/intel/sandybridge drq 0x74 = 4 end device pnp 2e.4 on # EC + io 0x60 = 0xa30 irq 0x70 = 9 + io 0x62 = 0xa20 end device pnp 2e.5 on # Keyboard + io 0x60 = 0x60 irq 0x70 = 1 + io 0x62 = 0x64 end device pnp 2e.6 on # Mouse irq 0x70 = 12 end - device pnp 2e.7 on # GPIO - irq 0x70 = 0 - end + device pnp 2e.7 off end # GPIO device pnp 2e.a off end # IR end end

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New patch to review for coreboot: x86emu/debug.h: add back #ifdef CONFIG_DEFAULT_CONSOLE_LOGLEVEL
by Martin Roth 13 Jul '15

13 Jul '15

Martin Roth (gaumless(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10894 -gerrit commit ea7c3a4a17458d09ea37581aea6638bd60dac361 Author: Martin Roth <gaumless(a)gmail.com> Date: Sun Jul 12 20:15:20 2015 -0600 x86emu/debug.h: add back #ifdef CONFIG_DEFAULT_CONSOLE_LOGLEVEL This reverts commit 3a391fd2 : x86emu/debug.h: remove #ifdef CONFIG_DEFAULT_CONSOLE_LOGLEVEL. This #ifdef isn't here for the coreboot code itself, but is used in the util/vgabios code which builds in the emulation code. I've added back the ifdef, and added a comment explaining why it's there. Long term, it might be better to rewrite the vgabios utility to use printk instead of printf. The comment is on the same line as the ifdef so it can be seen in the output when grepping the code for '#ifdef CONFIG_'. Change-Id: I148f2acb38b720bb4801c31ec950b248ba742f7e Signed-off-by: Martin Roth <gaumless(a)gmail.com> --- src/device/oprom/x86emu/debug.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/device/oprom/x86emu/debug.h b/src/device/oprom/x86emu/debug.h index 186c161..c7fbb1d 100644 --- a/src/device/oprom/x86emu/debug.h +++ b/src/device/oprom/x86emu/debug.h @@ -42,8 +42,10 @@ /*---------------------- Macros and type definitions ----------------------*/ +#ifdef CONFIG_DEFAULT_CONSOLE_LOGLEVEL /* #ifdef for compiling util/vgabios */ /* printf is not available in coreboot... use printk */ #define printf(x...) printk(BIOS_DEBUG, x) +#endif /* checks to be enabled for "runtime" */

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Patch merged into coreboot/master: intel raminit: improve logging
by gerrit＠coreboot.org 13 Jul '15

13 Jul '15

the following patch was just integrated into master: commit 2b374beebc4985376d7c6ee34dd678d74404eb32 Author: Patrick Rudolph <siro(a)das-labor.org> Date: Sun Jul 12 17:06:41 2015 +0200 intel raminit: improve logging Print the old timB value to observes changes made. Change-Id: Iecec4918f1d95560b6e7933a169ccce83fcf073d Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Reviewed-on: http://review.coreboot.org/10891 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Nicolas Reinecke <nr(a)das-labor.org> See http://review.coreboot.org/10891 for details. -gerrit

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Patch merged into coreboot/master: intel raminit: fix timB high adjust calculation
by gerrit＠coreboot.org 12 Jul '15

12 Jul '15

the following patch was just integrated into master: commit 6f7ce9b2172297b56c4b255a1c322b576a4583b8 Author: Patrick Rudolph <siro(a)das-labor.org> Date: Sun Jul 12 12:17:21 2015 +0200 intel raminit: fix timB high adjust calculation Issue observed: Any memory DIMM placed in channel0 slots stops at "c320c discovery failed". The same memory DIMM works when placed in channel1 slots. Test system: * Intel Pentium CPU G2130 * Gigabyte GA-B75M-D3H * DIMMs: * elixir 1GB 1Rx8 PC3-10600U M2Y1G64CB88A5N * crucial 2GB 256Mx64 CT2566aBA160BJ * corsair 8GB CMZ16GX3M2A1866C9 Problem description: In case of good timmings (all bits are set) an offset of 3*64 was applied. The following test (c320c discovery) failed only on those byte-lanes. Problem solution: Don't modify timB in case of good timings measured. Final testing result: The system boots with every DIMM placed in channel 0 slots. Change-Id: Iea426ea4470640ce254f16e958a395644ff1a55c Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Reviewed-on: http://review.coreboot.org/10889 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder(a)gmail.com> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Nicolas Reinecke <nr(a)das-labor.org> See http://review.coreboot.org/10889 for details. -gerrit

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Patch merged into coreboot/master: intel raminit: whitespace fixes
by gerrit＠coreboot.org 12 Jul '15

12 Jul '15

the following patch was just integrated into master: commit 073b017bed5e51244f0578056d52e6f88734d64b Author: Patrick Rudolph <siro(a)das-labor.org> Date: Sun Jul 12 11:39:45 2015 +0200 intel raminit: whitespace fixes Remove whitespace errors. Change-Id: If69244a5d47424e3e984fdf782ea9d2d3c466d86 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Reviewed-on: http://review.coreboot.org/10888 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Nicolas Reinecke <nr(a)das-labor.org> See http://review.coreboot.org/10888 for details. -gerrit

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Patch merged into coreboot/master: intel sandybridge: add VGA pci device id
by gerrit＠coreboot.org 12 Jul '15

12 Jul '15

the following patch was just integrated into master: commit 03a88d3773ae1b2cb54cad176231ebf8ab8bc226 Author: Patrick Rudolph <siro(a)das-labor.org> Date: Sun Jul 5 13:29:41 2015 +0200 intel sandybridge: add VGA pci device id Add VGA pci device id 0x0152 for Intel IvyBridge CPUs. Test system: * Intel Pentium CPU G2130 * Gigabyte GA-B75M-D3H Change-Id: Ia546fdf0cc3bbd4c0ef6b5fd969232f105bceb22 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Reviewed-on: http://review.coreboot.org/10798 Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke <nr(a)das-labor.org> See http://review.coreboot.org/10798 for details. -gerrit

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Patch set updated for coreboot: azalia: fix up and clean up shrinkage of boilerplate code
by Jonathan A. Kollasch 12 Jul '15

12 Jul '15

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10826 -gerrit commit 75d04a9e98352b2490d15f09fe9583439affbb00 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Tue Jul 7 12:57:46 2015 -0500 azalia: fix up and clean up shrinkage of boilerplate code Should fix regression in HDA verb setup on nvidia mcp55 and intel sch southbridges. The mcp55 code could not find the mainboard's verb table because the table was not even being compiled in. The sch boards appeared to have the same issue. Intel broadwell and fsp_bd82x6x seemed to have not gotten the boilerplate shrink, so apply it to those too. Followup-to: Ib3e09644c0ee71aacb067adaa85653d151b52078 (azalia: Shrink boilerplate) Change-Id: If7aae69f5171db67055ffe220bdff392caaa5d9f Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/mainboard/asus/m2n-e/hda_verb.c | 2 + src/mainboard/gigabyte/m57sli/hda_verb.c | 7 ++ src/mainboard/google/auron/hda_verb.c | 123 ++++++++++++++++++++++++ src/mainboard/google/auron/hda_verb.h | 122 ----------------------- src/mainboard/google/auron/mainboard.c | 18 ---- src/mainboard/google/jecht/hda_verb.c | 113 ++++++++++++++++++++++ src/mainboard/google/jecht/hda_verb.h | 112 --------------------- src/mainboard/google/jecht/mainboard.c | 18 ---- src/mainboard/intel/cougar_canyon2/hda_verb.c | 3 + src/mainboard/iwave/iWRainbowG6/hda_verb.c | 7 +- src/mainboard/msi/ms7260/hda_verb.c | 7 ++ src/mainboard/msi/ms9652_fam10/hda_verb.c | 7 ++ src/mainboard/nvidia/l1_2pvv/hda_verb.c | 7 +- src/mainboard/supermicro/h8dme/hda_verb.c | 7 ++ src/mainboard/supermicro/h8dmr/hda_verb.c | 7 ++ src/mainboard/supermicro/h8dmr_fam10/hda_verb.c | 7 ++ src/soc/intel/broadwell/Makefile.inc | 2 + src/soc/intel/broadwell/hda.c | 8 +- src/southbridge/intel/fsp_bd82x6x/Makefile.inc | 2 + src/southbridge/intel/fsp_bd82x6x/azalia.c | 6 +- src/southbridge/intel/sch/Makefile.inc | 1 + src/southbridge/intel/sch/audio.c | 4 +- src/southbridge/nvidia/mcp55/Makefile.inc | 4 + src/southbridge/nvidia/mcp55/azalia.c | 11 ++- 24 files changed, 315 insertions(+), 290 deletions(-) diff --git a/src/mainboard/asus/m2n-e/hda_verb.c b/src/mainboard/asus/m2n-e/hda_verb.c index 58bb983..7e9a53c 100644 --- a/src/mainboard/asus/m2n-e/hda_verb.c +++ b/src/mainboard/asus/m2n-e/hda_verb.c @@ -78,4 +78,6 @@ const u32 cim_verb_data[] = { AZALIA_PIN_CFG(0x0, 0x25, 0x01012014), }; +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/gigabyte/m57sli/hda_verb.c b/src/mainboard/gigabyte/m57sli/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/gigabyte/m57sli/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/auron/hda_verb.c b/src/mainboard/google/auron/hda_verb.c new file mode 100644 index 0000000..e015a83 --- /dev/null +++ b/src/mainboard/google/auron/hda_verb.c @@ -0,0 +1,123 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2014 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 + 0x10ec0283, // Subsystem ID + 0x0000000d, // Number of jacks (NID entries) + + 0x0017ff00, // Function Reset + 0x0017ff00, // Double Function Reset + 0x000F0000, // Pad - get vendor id + 0x000F0002, // Pad - get revision id + + /* Bits 31:28 - Codec Address */ + /* Bits 27:20 - NID */ + /* Bits 19:8 - Verb ID */ + /* Bits 7:0 - Payload */ + + /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ + 0x00172083, + 0x00172102, + 0x001722ec, + 0x00172310, + + /* Pin Widget Verb Table */ + + /* Pin Complex (NID 0x12) DMIC - Disabled */ + 0x01271cf0, // + 0x01271d11, // + 0x01271e11, // + 0x01271f41, // + + /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */ + 0x01471c10, // group 1, cap 0 + 0x01471d01, // no connector, no jack detect + 0x01471e17, // speaker out, analog + 0x01471f90, // fixed function, internal, Location N/A + + /* Pin Complex (NID 0x17) MONO Out - Disabled */ + 0x01771cf0, // + 0x01771d11, // + 0x01771e11, // + 0x01771f41, // + + /* Pin Complex (NID 0x18) Disabled */ + 0x01871cf0, // + 0x01871d11, // + 0x01871e11, // + 0x01871f41, // + + /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */ + 0x01971c20, // group2, cap 0 + 0x01971d10, // black, jack detect + 0x01971ea1, // Mic in, 3.5mm Jack + 0x01971f03, // connector, External left panel + + /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */ + 0x01a71c11, // group 1, cap 1 + 0x01a71d01, // no connector, no jack detect + 0x01a71ea7, // mic in, analog connection + 0x01a71f90, // Fixed function, internal, Location N/A + + /* Pin Complex (NID 0x1B) LINE2 - Disabled */ + 0x01b71cf0, // + 0x01b71d11, // + 0x01b71e11, // + 0x01b71f41, // + + /* Pin Complex (NID 0x1D) PCBeep */ + 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable + 0x01d71d81, // mute spkr on hpout + 0x01d71e15, // pcbeep en able, checksum + 0x01d71f40, // no physical, Internal, Location N/A + + /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/ + 0x01e71cf0, // + 0x01e71d11, // + 0x01e71e11, // + 0x01e71f41, // + + /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/ + 0x02171c21, // group2, cap 1 + 0x02171d10, // black, jack detect + 0x02171e21, // HPOut, 3.5mm Jack + 0x02171f03, // connector, left panel + + /* Undocumented settings from Realtek (needed for beep_gen) */ + /* Widget node 0x20 */ + 0x02050010, + 0x02040c20, + 0x0205001b, + 0x0204081b, +}; + +const u32 pc_beep_verbs[] = { + 0x00170500, /* power up everything (codec, dac, adc, mixers) */ + 0x01470740, /* enable speaker out */ + 0x01470c02, /* set speaker EAPD pin */ + 0x0143b01f, /* unmute speaker */ + 0x00c37100, /* unmute mixer nid 0xc input 1 */ + 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ +}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/auron/hda_verb.h b/src/mainboard/google/auron/hda_verb.h deleted file mode 100644 index 275ee3a..0000000 --- a/src/mainboard/google/auron/hda_verb.h +++ /dev/null @@ -1,122 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2014 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -static const u32 mainboard_cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 - 0x10ec0283, // Subsystem ID - 0x0000000d, // Number of jacks (NID entries) - - 0x0017ff00, // Function Reset - 0x0017ff00, // Double Function Reset - 0x000F0000, // Pad - get vendor id - 0x000F0002, // Pad - get revision id - - /* Bits 31:28 - Codec Address */ - /* Bits 27:20 - NID */ - /* Bits 19:8 - Verb ID */ - /* Bits 7:0 - Payload */ - - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ - 0x00172083, - 0x00172102, - 0x001722ec, - 0x00172310, - - /* Pin Widget Verb Table */ - - /* Pin Complex (NID 0x12) DMIC - Disabled */ - 0x01271cf0, // - 0x01271d11, // - 0x01271e11, // - 0x01271f41, // - - /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */ - 0x01471c10, // group 1, cap 0 - 0x01471d01, // no connector, no jack detect - 0x01471e17, // speaker out, analog - 0x01471f90, // fixed function, internal, Location N/A - - /* Pin Complex (NID 0x17) MONO Out - Disabled */ - 0x01771cf0, // - 0x01771d11, // - 0x01771e11, // - 0x01771f41, // - - /* Pin Complex (NID 0x18) Disabled */ - 0x01871cf0, // - 0x01871d11, // - 0x01871e11, // - 0x01871f41, // - - /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */ - 0x01971c20, // group2, cap 0 - 0x01971d10, // black, jack detect - 0x01971ea1, // Mic in, 3.5mm Jack - 0x01971f03, // connector, External left panel - - /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */ - 0x01a71c11, // group 1, cap 1 - 0x01a71d01, // no connector, no jack detect - 0x01a71ea7, // mic in, analog connection - 0x01a71f90, // Fixed function, internal, Location N/A - - /* Pin Complex (NID 0x1B) LINE2 - Disabled */ - 0x01b71cf0, // - 0x01b71d11, // - 0x01b71e11, // - 0x01b71f41, // - - /* Pin Complex (NID 0x1D) PCBeep */ - 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable - 0x01d71d81, // mute spkr on hpout - 0x01d71e15, // pcbeep en able, checksum - 0x01d71f40, // no physical, Internal, Location N/A - - /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/ - 0x01e71cf0, // - 0x01e71d11, // - 0x01e71e11, // - 0x01e71f41, // - - /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/ - 0x02171c21, // group2, cap 1 - 0x02171d10, // black, jack detect - 0x02171e21, // HPOut, 3.5mm Jack - 0x02171f03, // connector, left panel - - /* Undocumented settings from Realtek (needed for beep_gen) */ - /* Widget node 0x20 */ - 0x02050010, - 0x02040c20, - 0x0205001b, - 0x0204081b, -}; - -static const u32 mainboard_pc_beep_verbs[] = { - 0x00170500, /* power up everything (codec, dac, adc, mixers) */ - 0x01470740, /* enable speaker out */ - 0x01470c02, /* set speaker EAPD pin */ - 0x0143b01f, /* unmute speaker */ - 0x00c37100, /* unmute mixer nid 0xc input 1 */ - 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ -}; - -static const u32 mainboard_pc_beep_verbs_size = - sizeof(mainboard_pc_beep_verbs) / sizeof(mainboard_pc_beep_verbs[0]); diff --git a/src/mainboard/google/auron/mainboard.c b/src/mainboard/google/auron/mainboard.c index cc9907e..13eec7e 100644 --- a/src/mainboard/google/auron/mainboard.c +++ b/src/mainboard/google/auron/mainboard.c @@ -32,27 +32,10 @@ #include <arch/io.h> #include <arch/interrupt.h> #include <boot/coreboot_tables.h> -#include "hda_verb.h" #include "ec.h" #include "onboard.h" -/* Audio Setup */ - -extern const u32 *cim_verb_data; -extern u32 cim_verb_data_size; -extern const u32 *pc_beep_verbs; -extern u32 pc_beep_verbs_size; - -static void verb_setup(void) -{ - cim_verb_data = mainboard_cim_verb_data; - cim_verb_data_size = sizeof(mainboard_cim_verb_data); - pc_beep_verbs = mainboard_pc_beep_verbs; - pc_beep_verbs_size = mainboard_pc_beep_verbs_size; - -} - static void mainboard_init(device_t dev) { mainboard_ec_init(); @@ -110,7 +93,6 @@ static void mainboard_enable(device_t dev) dev->ops->init = mainboard_init; dev->ops->get_smbios_data = mainboard_smbios_data; install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_EDP, GMA_INT15_PANEL_FIT_CENTERING, GMA_INT15_BOOT_DISPLAY_DEFAULT, 0); - verb_setup(); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/google/jecht/hda_verb.c b/src/mainboard/google/jecht/hda_verb.c new file mode 100644 index 0000000..f4b5982 --- /dev/null +++ b/src/mainboard/google/jecht/hda_verb.c @@ -0,0 +1,113 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2013 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 + 0x10ec0283, // Subsystem ID + 0x0000000c, // Number of jacks (NID entries) + + /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ + 0x00172083, + 0x00172102, + 0x001722ec, + 0x00172310, + + /* Pin Widget Verb Table */ + + /* Pin Complex (NID 0x12) DMIC */ + 0x01271cf0, + 0x01271d11, + 0x01271e11, + 0x01271f41, + + /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ + 0x01471cf0, + 0x01471d11, + 0x01471e11, + 0x01471f40, + + /* Pin Complex (NID 0x17) */ + 0x01771cf0, + 0x01771d11, + 0x01771e11, + 0x01771f41, + + /* Pin Complex (NID 0x18) MIC1 PORTB */ + 0x01971c11, // group 1, cap 1 + 0x01971d10, // black, jack detect + 0x01971ea7, // mic in, analog + 0x01971f03, // connector, left panel + + /* Pin Complex (NID 0x19) MIC2 PORTF */ + 0x01871cf0, + 0x01871d11, + 0x01871e11, + 0x01871f41, + + /* Pin Complex (NID 0x1A) LINE1 PORTC */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, + + /* Pin Complex (NID 0x1B) LINE2 PORTE */ + 0x01a71cf0, + 0x01a71d11, + 0x01a71e11, + 0x01a71f41, + + /* Pin Complex (NID 0x1d) PCBeep */ + 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable + 0x01d71d81, // mute spkr on hpout + 0x01d71e15, // pcbeep en able, checksum + 0x01d71f40, // no physical, internal + + /* Pin Complex (NID 0x1E) SPDIF-OUT */ + 0x01e71cf0, + 0x01e71d11, + 0x01e71e11, + 0x01e71f41, + + /* Pin Complex (NID 0x21) HPOUT PORT-I */ + 0x02171c1f, // group1, + 0x02171d10, // black, jack detect + 0x02171e21, // HPOut, 1/8 stereo + 0x02171f03, // connector, left panel + + /* Undocumented settings from Realtek (needed for beep_gen) */ + /* Widget node 0x20 */ + 0x02050010, + 0x02040c20, + 0x0205001b, + 0x0204081b, +}; + +const u32 pc_beep_verbs[] = { + 0x00170500, /* power up everything (codec, dac, adc, mixers) */ + 0x01470740, /* enable speaker out */ + 0x01470c02, /* set speaker EAPD pin */ + 0x0143b01f, /* unmute speaker */ + 0x00c37100, /* unmute mixer nid 0xc input 1 */ + 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ +}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/jecht/hda_verb.h b/src/mainboard/google/jecht/hda_verb.h deleted file mode 100644 index bc7cf1d..0000000 --- a/src/mainboard/google/jecht/hda_verb.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2013 Google Inc. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc. - */ - -static const u32 mainboard_cim_verb_data[] = { - /* coreboot specific header */ - 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283 - 0x10ec0283, // Subsystem ID - 0x0000000c, // Number of jacks (NID entries) - - /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */ - 0x00172083, - 0x00172102, - 0x001722ec, - 0x00172310, - - /* Pin Widget Verb Table */ - - /* Pin Complex (NID 0x12) DMIC */ - 0x01271cf0, - 0x01271d11, - 0x01271e11, - 0x01271f41, - - /* Pin Complex (NID 0x14) SPKR-OUT PORTD */ - 0x01471cf0, - 0x01471d11, - 0x01471e11, - 0x01471f40, - - /* Pin Complex (NID 0x17) */ - 0x01771cf0, - 0x01771d11, - 0x01771e11, - 0x01771f41, - - /* Pin Complex (NID 0x18) MIC1 PORTB */ - 0x01971c11, // group 1, cap 1 - 0x01971d10, // black, jack detect - 0x01971ea7, // mic in, analog - 0x01971f03, // connector, left panel - - /* Pin Complex (NID 0x19) MIC2 PORTF */ - 0x01871cf0, - 0x01871d11, - 0x01871e11, - 0x01871f41, - - /* Pin Complex (NID 0x1A) LINE1 PORTC */ - 0x01a71cf0, - 0x01a71d11, - 0x01a71e11, - 0x01a71f41, - - /* Pin Complex (NID 0x1B) LINE2 PORTE */ - 0x01a71cf0, - 0x01a71d11, - 0x01a71e11, - 0x01a71f41, - - /* Pin Complex (NID 0x1d) PCBeep */ - 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable - 0x01d71d81, // mute spkr on hpout - 0x01d71e15, // pcbeep en able, checksum - 0x01d71f40, // no physical, internal - - /* Pin Complex (NID 0x1E) SPDIF-OUT */ - 0x01e71cf0, - 0x01e71d11, - 0x01e71e11, - 0x01e71f41, - - /* Pin Complex (NID 0x21) HPOUT PORT-I */ - 0x02171c1f, // group1, - 0x02171d10, // black, jack detect - 0x02171e21, // HPOut, 1/8 stereo - 0x02171f03, // connector, left panel - - /* Undocumented settings from Realtek (needed for beep_gen) */ - /* Widget node 0x20 */ - 0x02050010, - 0x02040c20, - 0x0205001b, - 0x0204081b, -}; - -static const u32 mainboard_pc_beep_verbs[] = { - 0x00170500, /* power up everything (codec, dac, adc, mixers) */ - 0x01470740, /* enable speaker out */ - 0x01470c02, /* set speaker EAPD pin */ - 0x0143b01f, /* unmute speaker */ - 0x00c37100, /* unmute mixer nid 0xc input 1 */ - 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ -}; - -static const u32 mainboard_pc_beep_verbs_size = - sizeof(mainboard_pc_beep_verbs) / sizeof(mainboard_pc_beep_verbs[0]); diff --git a/src/mainboard/google/jecht/mainboard.c b/src/mainboard/google/jecht/mainboard.c index 8b3363c..f0b2e37 100644 --- a/src/mainboard/google/jecht/mainboard.c +++ b/src/mainboard/google/jecht/mainboard.c @@ -34,7 +34,6 @@ #include <arch/io.h> #include <arch/interrupt.h> #include <boot/coreboot_tables.h> -#include "hda_verb.h" #include "onboard.h" void mainboard_suspend_resume(void) @@ -129,22 +128,6 @@ static int int15_handler(void) } #endif -/* Audio Setup */ - -extern const u32 *cim_verb_data; -extern u32 cim_verb_data_size; -extern const u32 *pc_beep_verbs; -extern u32 pc_beep_verbs_size; - -static void verb_setup(void) -{ - cim_verb_data = mainboard_cim_verb_data; - cim_verb_data_size = sizeof(mainboard_cim_verb_data); - pc_beep_verbs = mainboard_pc_beep_verbs; - pc_beep_verbs_size = mainboard_pc_beep_verbs_size; - -} - static void mainboard_init(device_t dev) { lan_init(); @@ -160,7 +143,6 @@ static void mainboard_enable(device_t dev) /* Install custom int15 handler for VGA OPROM */ mainboard_interrupt_handlers(0x15, &int15_handler); #endif - verb_setup(); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/intel/cougar_canyon2/hda_verb.c b/src/mainboard/intel/cougar_canyon2/hda_verb.c index 51b6356..a110246 100644 --- a/src/mainboard/intel/cougar_canyon2/hda_verb.c +++ b/src/mainboard/intel/cougar_canyon2/hda_verb.c @@ -37,4 +37,7 @@ const u32 cim_verb_data[] = { /* Pin Complex (NID 0x07) Digital Out at Int HDMI */ AZALIA_PIN_CFG(0x3, 0x07, 0x18560030) }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/iwave/iWRainbowG6/hda_verb.c b/src/mainboard/iwave/iWRainbowG6/hda_verb.c index effc22e..21b230b 100644 --- a/src/mainboard/iwave/iWRainbowG6/hda_verb.c +++ b/src/mainboard/iwave/iWRainbowG6/hda_verb.c @@ -17,7 +17,9 @@ * Foundation, Inc. */ -static u32 mainboard_cim_verb_data[] = { +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { /* coreboot specific header */ 0x111d76d5, // Codec Vendor / Device ID: IDT 92HD81 0x00000000, // Subsystem ID @@ -89,4 +91,7 @@ static u32 mainboard_cim_verb_data[] = { /* BTL Gain */ 0x017F417, /* Gain = 16.79dB */ }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/msi/ms7260/hda_verb.c b/src/mainboard/msi/ms7260/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/msi/ms7260/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/msi/ms9652_fam10/hda_verb.c b/src/mainboard/msi/ms9652_fam10/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/msi/ms9652_fam10/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/nvidia/l1_2pvv/hda_verb.c b/src/mainboard/nvidia/l1_2pvv/hda_verb.c index bb20c2b..68076f9 100644 --- a/src/mainboard/nvidia/l1_2pvv/hda_verb.c +++ b/src/mainboard/nvidia/l1_2pvv/hda_verb.c @@ -19,7 +19,9 @@ * Foundation, Inc. */ -static u32 mainboard_cim_verb_data[] = { +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { /* coreboot specific header */ 0x10ec0880, // Codec Vendor / Device ID: Realtek ALC880 0x00000000, // Subsystem ID @@ -64,4 +66,7 @@ static u32 mainboard_cim_verb_data[] = { /* NID 0x1f, S/PDIF-IN */ AZALIA_PIN_CFG(0x0, 0x1f, 0x01c59150), }; + +const u32 pc_beep_verbs[0] = {}; + AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dme/hda_verb.c b/src/mainboard/supermicro/h8dme/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dme/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dmr/hda_verb.c b/src/mainboard/supermicro/h8dmr/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dmr/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c b/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c new file mode 100644 index 0000000..072a306 --- /dev/null +++ b/src/mainboard/supermicro/h8dmr_fam10/hda_verb.c @@ -0,0 +1,7 @@ +#include <device/azalia_device.h> + +const u32 cim_verb_data[0] = {}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/soc/intel/broadwell/Makefile.inc b/src/soc/intel/broadwell/Makefile.inc index d7845e6..4b14ff8 100644 --- a/src/soc/intel/broadwell/Makefile.inc +++ b/src/soc/intel/broadwell/Makefile.inc @@ -66,6 +66,8 @@ ramstage-y += ehci.c ramstage-y += xhci.c smm-y += xhci.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c + ifeq ($(CONFIG_USBDEBUG),y) ramstage-y += usbdebug.c romstage-y += usbdebug.c diff --git a/src/soc/intel/broadwell/hda.c b/src/soc/intel/broadwell/hda.c index 28b3df7..43321b7 100644 --- a/src/soc/intel/broadwell/hda.c +++ b/src/soc/intel/broadwell/hda.c @@ -21,6 +21,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -31,11 +32,6 @@ #include <soc/ramstage.h> #include <soc/rcba.h> -const u32 * cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -const u32 * pc_beep_verbs = NULL; -u32 pc_beep_verbs_size = 0; - static void codecs_init(u8 *base, u32 codec_mask) { int i; @@ -48,7 +44,7 @@ static void codecs_init(u8 *base, u32 codec_mask) cim_verb_data); } - if (pc_beep_verbs_size && pc_beep_verbs) + if (pc_beep_verbs_size) hda_codec_write(base, pc_beep_verbs_size, pc_beep_verbs); } diff --git a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc index d96e641..228b6eb 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Makefile.inc +++ b/src/southbridge/intel/fsp_bd82x6x/Makefile.inc @@ -39,6 +39,8 @@ smm-$(CONFIG_SPI_FLASH_SMM) += ../common/spi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c me.c me_8.x.c finalize.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c + romstage-y += early_usb.c early_smbus.c early_me.c me_status.c gpio.c early_init.c romstage-$(CONFIG_USBDEBUG) += usb_debug.c ramstage-$(CONFIG_USBDEBUG) += usb_debug.c diff --git a/src/southbridge/intel/fsp_bd82x6x/azalia.c b/src/southbridge/intel/fsp_bd82x6x/azalia.c index e6c9b27..b6f728c 100644 --- a/src/southbridge/intel/fsp_bd82x6x/azalia.c +++ b/src/southbridge/intel/fsp_bd82x6x/azalia.c @@ -21,6 +21,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -91,11 +92,6 @@ no_codec: return 0; } -const u32 * cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -const u32 * pc_beep_verbs = NULL; -u32 pc_beep_verbs_size = 0; - static u32 find_verb(struct device *dev, u32 viddid, const u32 ** verb) { int idx=0; diff --git a/src/southbridge/intel/sch/Makefile.inc b/src/southbridge/intel/sch/Makefile.inc index db876a1..0b21801 100644 --- a/src/southbridge/intel/sch/Makefile.inc +++ b/src/southbridge/intel/sch/Makefile.inc @@ -36,6 +36,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c ramstage-$(CONFIG_HAVE_SMI_HANDLER) += ../../../cpu/x86/smm/smmrelocate.S smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c # We don't ship that, but booting without it is bound to fail cbfs-files-$(CONFIG_HAVE_CMC) += cmc.bin diff --git a/src/southbridge/intel/sch/audio.c b/src/southbridge/intel/sch/audio.c index 770bb75..bba2f7b 100644 --- a/src/southbridge/intel/sch/audio.c +++ b/src/southbridge/intel/sch/audio.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -112,9 +113,6 @@ no_codec: return 0; } -const u32 *cim_verb_data = NULL; -u32 cim_verb_data_size = 0; - static u32 find_verb(struct device *dev, u32 viddid, const u32 ** verb) { printk(BIOS_DEBUG, "sch_audio: dev=%s\n", dev_path(dev)); diff --git a/src/southbridge/nvidia/mcp55/Makefile.inc b/src/southbridge/nvidia/mcp55/Makefile.inc index 3e24f1c..fb9c3fb 100644 --- a/src/southbridge/nvidia/mcp55/Makefile.inc +++ b/src/southbridge/nvidia/mcp55/Makefile.inc @@ -20,6 +20,10 @@ ramstage-y += reset.c romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += enable_usbdebug.c ramstage-$(CONFIG_USBDEBUG) += enable_usbdebug.c +ifeq ($(CONFIG_MCP55_USE_AZA),y) +ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/hda_verb.c +endif + chipset_bootblock_inc += $(src)/southbridge/nvidia/mcp55/romstrap.inc bootblock-y += romstrap.ld diff --git a/src/southbridge/nvidia/mcp55/azalia.c b/src/southbridge/nvidia/mcp55/azalia.c index 8285749..bb4376f 100644 --- a/src/southbridge/nvidia/mcp55/azalia.c +++ b/src/southbridge/nvidia/mcp55/azalia.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <device/device.h> +#include <device/azalia_device.h> #include <device/pci.h> #include <device/pci_ids.h> #include <device/pci_ops.h> @@ -27,6 +28,7 @@ #include <delay.h> #include "mcp55.h" +#if IS_ENABLED(CONFIG_MCP55_USE_AZA) #define HDA_ICII_REG 0x68 #define HDA_ICII_BUSY (1 << 0) #define HDA_ICII_VALID (1 << 1) @@ -86,10 +88,8 @@ no_codec: return 0; } -u32 *cim_verb_data = NULL; -u32 cim_verb_data_size = 0; -static u32 find_verb(struct device *dev, u32 viddid, u32 **verb) +static u32 find_verb(struct device *dev, u32 viddid, const u32 **verb) { int idx = 0; @@ -155,7 +155,7 @@ static int wait_for_valid(u8 *base) static void codec_init(struct device *dev, u8 *base, int addr) { u32 reg32, verb_size; - u32 *verb; + const u32 *verb; int i; printk(BIOS_DEBUG, "Azalia: Initializing codec #%d\n", addr); @@ -203,9 +203,11 @@ static void codecs_init(struct device *dev, u8 *base, u32 codec_mask) codec_init(dev, base, i); } } +#endif static void azalia_init(struct device *dev) { +#if IS_ENABLED(CONFIG_MCP55_USE_AZA) u8 *base; u32 codec_mask, reg32; struct resource *res; @@ -253,6 +255,7 @@ static void azalia_init(struct device *dev) printk(BIOS_DEBUG, "Azalia: codec_mask = %02x\n", codec_mask); codecs_init(dev, base, codec_mask); } +#endif } static void azalia_set_subsystem(device_t dev, unsigned vendor, unsigned device)

1 0

Patch set updated for coreboot: superio/smsc: Add support for SMSC DME1737
by Jonathan A. Kollasch 12 Jul '15

12 Jul '15

Jonathan A. Kollasch (jakllsch(a)kollasch.net) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10893 -gerrit commit ce3891d4ce80e0d2b0e13997d78ab0707a59f8b1 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Sun Jul 12 11:49:16 2015 -0500 superio/smsc: Add support for SMSC DME1737 Change-Id: If2ba9ca48c809fe4f7dc0595a3cb3df168d630fd Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> --- src/superio/smsc/Kconfig | 2 + src/superio/smsc/Makefile.inc | 1 + src/superio/smsc/dme1737/Makefile.inc | 4 +- src/superio/smsc/dme1737/dme1737.h | 21 +++--- src/superio/smsc/dme1737/early_serial.c | 4 +- src/superio/smsc/dme1737/superio.c | 112 ++++---------------------------- 6 files changed, 30 insertions(+), 114 deletions(-) diff --git a/src/superio/smsc/Kconfig b/src/superio/smsc/Kconfig index ceb53a6..00d4126 100644 --- a/src/superio/smsc/Kconfig +++ b/src/superio/smsc/Kconfig @@ -21,6 +21,8 @@ config SUPERIO_WANTS_14MHZ_CLOCK bool +config SUPERIO_SMSC_DME1737 + bool config SUPERIO_SMSC_FDC37M60X bool config SUPERIO_SMSC_FDC37N972 diff --git a/src/superio/smsc/Makefile.inc b/src/superio/smsc/Makefile.inc index 78cb2ae..1856884 100644 --- a/src/superio/smsc/Makefile.inc +++ b/src/superio/smsc/Makefile.inc @@ -18,6 +18,7 @@ ## Foundation, Inc. ## +subdirs-y += dme1737 subdirs-y += fdc37m60x subdirs-y += fdc37n972 subdirs-y += lpc47b272 diff --git a/src/superio/smsc/dme1737/Makefile.inc b/src/superio/smsc/dme1737/Makefile.inc index 5e359d7..fcd8ff1 100644 --- a/src/superio/smsc/dme1737/Makefile.inc +++ b/src/superio/smsc/dme1737/Makefile.inc @@ -20,5 +20,5 @@ ## Foundation, Inc. ## -romstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += early_serial.c -ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B397) += superio.c +romstage-$(CONFIG_SUPERIO_SMSC_DME1737) += early_serial.c +ramstage-$(CONFIG_SUPERIO_SMSC_DME1737) += superio.c diff --git a/src/superio/smsc/dme1737/dme1737.h b/src/superio/smsc/dme1737/dme1737.h index bc70ba9..ee2d43d 100644 --- a/src/superio/smsc/dme1737/dme1737.h +++ b/src/superio/smsc/dme1737/dme1737.h @@ -20,20 +20,19 @@ * Foundation, Inc. */ -#ifndef SUPERIO_SMSC_LPC47B397_H -#define SUPERIO_SMSC_LPC47B397_H +#ifndef SUPERIO_SMSC_DME1737_H +#define SUPERIO_SMSC_DME1737_H -#define LPC47B397_FDC 0 /* Floppy */ -#define LPC47B397_PP 3 /* Parallel Port */ -#define LPC47B397_SP1 4 /* Com1 */ -#define LPC47B397_SP2 5 /* Com2 */ -#define LPC47B397_KBC 7 /* Keyboard & Mouse */ -#define LPC47B397_HWM 8 /* HW Monitor */ -#define LPC47B397_RT 10 /* Runtime reg*/ +#define DME1737_FDC 0 /* Floppy */ +#define DME1737_PP 3 /* Parallel Port */ +#define DME1737_SP1 4 /* Com1 */ +#define DME1737_SP2 5 /* Com2 */ +#define DME1737_KBC 7 /* Keyboard & Mouse */ +#define DME1737_RT 10 /* Runtime reg*/ #include <arch/io.h> #include <stdint.h> -void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase); +void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase); -#endif /* SUPERIO_SMSC_LPC47B397_H */ +#endif /* SUPERIO_SMSC_DME1737_H */ diff --git a/src/superio/smsc/dme1737/early_serial.c b/src/superio/smsc/dme1737/early_serial.c index f5b321e..d2d4764 100644 --- a/src/superio/smsc/dme1737/early_serial.c +++ b/src/superio/smsc/dme1737/early_serial.c @@ -23,7 +23,7 @@ #include <arch/io.h> #include <device/pnp.h> #include <stdint.h> -#include "lpc47b397.h" +#include "dme1737.h" static void pnp_enter_conf_state(pnp_devfn_t dev) { @@ -37,7 +37,7 @@ static void pnp_exit_conf_state(pnp_devfn_t dev) outb(0xaa, port); } -void lpc47b397_enable_serial(pnp_devfn_t dev, u16 iobase) +void dme1737_enable_serial(pnp_devfn_t dev, u16 iobase) { pnp_enter_conf_state(dev); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/dme1737/superio.c b/src/superio/smsc/dme1737/superio.c index a9a8092..528f71d 100644 --- a/src/superio/smsc/dme1737/superio.c +++ b/src/superio/smsc/dme1737/superio.c @@ -29,123 +29,37 @@ #include <string.h> #include <pc80/keyboard.h> #include <stdlib.h> -#include "lpc47b397.h" +#include "dme1737.h" -static void enable_hwm_smbus(struct device *dev) -{ - /* Enable SensorBus register access. */ - u8 reg8; - - reg8 = pnp_read_config(dev, 0xf0); - reg8 |= (1 << 1); - pnp_write_config(dev, 0xf0, reg8); -} - -static void lpc47b397_init(struct device *dev) +static void dme1737_init(struct device *dev) { if (!dev->enabled) return; switch(dev->path.pnp.device) { - case LPC47B397_KBC: + case DME1737_KBC: pc_keyboard_init(); break; } } -static void lpc47b397_pnp_enable_resources(struct device *dev) -{ - pnp_enable_resources(dev); - - pnp_enter_conf_mode(dev); - switch(dev->path.pnp.device) { - case LPC47B397_HWM: - printk(BIOS_DEBUG, "LPC47B397 SensorBus register access enabled\n"); - pnp_set_logical_device(dev); - enable_hwm_smbus(dev); - break; - } - /* dump_pnp_device(dev); */ - pnp_exit_conf_mode(dev); -} - static struct device_operations ops = { .read_resources = pnp_read_resources, .set_resources = pnp_set_resources, - .enable_resources = lpc47b397_pnp_enable_resources, - .enable = pnp_alt_enable, - .init = lpc47b397_init, - .ops_pnp_mode = &pnp_conf_mode_55_aa, -}; - -#define HWM_INDEX 0 -#define HWM_DATA 1 -#define SB_INDEX 0x0b -#define SB_DATA0 0x0c -#define SB_DATA1 0x0d -#define SB_DATA2 0x0e -#define SB_DATA3 0x0f - -static int lsmbus_read_byte(struct device *dev, u8 address) -{ - unsigned int device; - struct resource *res; - int result; - - device = dev->path.i2c.device; - - res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0); - - pnp_write_index(res->base + HWM_INDEX, 0, device); /* Why 0? */ - - /* We only read it one byte one time. */ - result = pnp_read_index(res->base + SB_INDEX, address); - - return result; -} - -static int lsmbus_write_byte(struct device *dev, u8 address, u8 val) -{ - unsigned int device; - struct resource *res; - - device = dev->path.i2c.device; - res = find_resource(get_pbus_smbus(dev)->dev, PNP_IDX_IO0); - - pnp_write_index(res->base+HWM_INDEX, 0, device); /* Why 0? */ - - /* We only write it one byte one time. */ - pnp_write_index(res->base+SB_INDEX, address, val); - - return 0; -} - -static struct smbus_bus_operations lops_smbus_bus = { - /* .recv_byte = lsmbus_recv_byte, */ - /* .send_byte = lsmbus_send_byte, */ - .read_byte = lsmbus_read_byte, - .write_byte = lsmbus_write_byte, -}; - -static struct device_operations ops_hwm = { - .read_resources = pnp_read_resources, - .set_resources = pnp_set_resources, - .enable_resources = lpc47b397_pnp_enable_resources, + .enable_resources = pnp_enable_resources, .enable = pnp_alt_enable, - .init = lpc47b397_init, - .ops_smbus_bus = &lops_smbus_bus, + .init = dme1737_init, .ops_pnp_mode = &pnp_conf_mode_55_aa, }; static struct pnp_info pnp_dev_info[] = { - { &ops, LPC47B397_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, - { &ops, LPC47B397_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, - { &ops, LPC47B397_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, - { &ops, LPC47B397_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, - { &ops, LPC47B397_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, }, - { &ops_hwm, LPC47B397_HWM, PNP_IO0, {0x07f0, 0}, }, - { &ops, LPC47B397_RT, PNP_IO0, {0x0780, 0}, }, + { &ops, DME1737_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, + { &ops, DME1737_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, }, + { &ops, DME1737_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, DME1737_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, }, + { &ops, DME1737_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, }, + { &ops, DME1737_RT, PNP_IO0, {0x0780, 0}, }, }; static void enable_dev(struct device *dev) @@ -154,7 +68,7 @@ static void enable_dev(struct device *dev) ARRAY_SIZE(pnp_dev_info), pnp_dev_info); } -struct chip_operations superio_smsc_lpc47b397_ops = { - CHIP_NAME("SMSC LPC47B397 Super I/O") +struct chip_operations superio_smsc_dme1737_ops = { + CHIP_NAME("SMSC DME1737 Super I/O") .enable_dev = enable_dev, };

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Patch merged into coreboot/master: Verify Kconfigs symbols are not zero for hex and int type symbols
by gerrit＠coreboot.org 12 Jul '15

12 Jul '15

the following patch was just integrated into master: commit 46cf9f7b7a20a94a2eb9bdfb4b8fba2a8c889474 Author: Martin Roth <gaumless(a)gmail.com> Date: Sat Jul 11 13:56:58 2015 -0600 Verify Kconfigs symbols are not zero for hex and int type symbols For hex and int type kconfig symbols, IS_ENABLED() doesn't work. Instead check to make sure they're defined and not zero. In some cases, zero might be a valid value, but it didn't look like zero was valid in these cases. Change-Id: Ib51fb31b3babffbf25ed3ae4ed11a2dc9a4be709 Signed-off-by: Martin Roth <gaumless(a)gmail.com> Reviewed-on: http://review.coreboot.org/10886 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/10886 for details. -gerrit

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coreboot-gerrit July 2015