coreboot-gerrit September 2014

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New patch to review for coreboot: 6507ab7 samus: Fix 8GB SPD
by Isaac Christensen 09 Sep '14

09 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6856 -gerrit commit 6507ab76252d68ce0b2772f1bb91b3322d446634 Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Wed Nov 13 14:49:51 2013 +0800 samus: Fix 8GB SPD The 8GB variant is x16 with 11 column bits and 4Gb density. Change-Id: I3aa647aba88dbc928fefd826cbd01e4fa8273660 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176640 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Commit-Queue: Aaron Durbin <adurbin(a)chromium.org> (cherry picked from commit d18462f6fc0d40328e9619525240778ea6b1a426) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- src/mainboard/google/samus/elpida_8Gb.spd.hex | 2 +- src/mainboard/google/samus/samsung_8Gb.spd.hex | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/samus/elpida_8Gb.spd.hex b/src/mainboard/google/samus/elpida_8Gb.spd.hex index 997a297..b790943 100644 --- a/src/mainboard/google/samus/elpida_8Gb.spd.hex +++ b/src/mainboard/google/samus/elpida_8Gb.spd.hex @@ -1,4 +1,4 @@ -92 11 F1 03 05 11 02 0B 03 11 01 08 0A 00 FE 00 +92 11 F1 03 04 12 02 0A 03 11 01 08 0A 00 FE 00 69 78 69 3C 69 11 18 81 20 08 3C 3C 01 40 83 05 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0F 01 02 00 diff --git a/src/mainboard/google/samus/samsung_8Gb.spd.hex b/src/mainboard/google/samus/samsung_8Gb.spd.hex index d9294f3..a7a1409 100644 --- a/src/mainboard/google/samus/samsung_8Gb.spd.hex +++ b/src/mainboard/google/samus/samsung_8Gb.spd.hex @@ -1,4 +1,4 @@ -92 11 F1 03 05 11 02 0B 03 11 01 08 0A 00 FE 00 +92 11 F1 03 04 12 02 0A 03 11 01 08 0A 00 FE 00 69 78 69 3C 69 11 18 81 F0 0A 3C 3C 01 40 83 01 00 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0F 11 02 00

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New patch to review for coreboot: 41acdcf tpm: Clean up I2C TPM driver
by Isaac Christensen 09 Sep '14

09 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6855 -gerrit commit 41acdcf6930490cb96b90b323069005001644cad Author: Stefan Reinauer <reinauer(a)chromium.org> Date: Mon Nov 4 17:38:32 2013 -0800 tpm: Clean up I2C TPM driver Drop a lot of u-boot-isms and share common TIS API between I2C driver and LPC driver. Signed-off-by: Stefan Reinauer <reinauer(a)google.com> Change-Id: I43be8eea0acbdaef58ef256a2bc5336b83368a0e Reviewed-on: https://chromium-review.googlesource.com/175670 Commit-Queue: Stefan Reinauer <reinauer(a)chromium.org> Tested-by: Stefan Reinauer <reinauer(a)chromium.org> Reviewed-by: David Hendricks <dhendrix(a)chromium.org> (cherry picked from commit 3fc8515b9dcef66998658e1aa5c020d22509810c) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- src/drivers/i2c/tpm/Kconfig | 5 + src/drivers/i2c/tpm/Makefile.inc | 4 +- src/drivers/i2c/tpm/tis.c | 182 ++++++++ src/drivers/i2c/tpm/tis.h | 74 ---- src/drivers/i2c/tpm/tis_i2c.c | 103 ----- src/drivers/i2c/tpm/tpm.c | 555 +++++++++++++++++++++---- src/drivers/i2c/tpm/tpm.h | 19 - src/drivers/i2c/tpm/tpm_tis_i2c.c | 578 -------------------------- src/drivers/pc80/tpm.c | 2 +- src/include/pc80/tpm.h | 29 -- src/include/tpm.h | 69 +++ src/vendorcode/google/chromeos/vboot.c | 2 +- src/vendorcode/google/chromeos/vboot_loader.c | 2 +- 13 files changed, 746 insertions(+), 878 deletions(-) diff --git a/src/drivers/i2c/tpm/Kconfig b/src/drivers/i2c/tpm/Kconfig index 2456204..cb754bd 100644 --- a/src/drivers/i2c/tpm/Kconfig +++ b/src/drivers/i2c/tpm/Kconfig @@ -2,6 +2,11 @@ config I2C_TPM bool "I2C TPM" depends on !PC80 # for now +config DRIVER_TPM_I2C_BUS + hex "I2C TPM chip bus" + default 9 # FIXME, workaround for Kconfig BS + depends on I2C_TPM + config DRIVER_TPM_I2C_ADDR hex "I2C TPM chip address" default 2 # FIXME, workaround for Kconfig BS diff --git a/src/drivers/i2c/tpm/Makefile.inc b/src/drivers/i2c/tpm/Makefile.inc index 74d9b7e..e06097f 100644 --- a/src/drivers/i2c/tpm/Makefile.inc +++ b/src/drivers/i2c/tpm/Makefile.inc @@ -1,2 +1,2 @@ -ramstage-$(CONFIG_I2C_TPM) += tis_i2c.c tpm.c tpm_tis_i2c.c -romstage-$(CONFIG_I2C_TPM) += tis_i2c.c tpm.c tpm_tis_i2c.c +ramstage-$(CONFIG_I2C_TPM) += tis.c tpm.c +romstage-$(CONFIG_I2C_TPM) += tis.c tpm.c diff --git a/src/drivers/i2c/tpm/tis.c b/src/drivers/i2c/tpm/tis.c new file mode 100644 index 0000000..3a5f519 --- /dev/null +++ b/src/drivers/i2c/tpm/tis.c @@ -0,0 +1,182 @@ +/* + * Copyright (C) 2011 Infineon Technologies + * Copyright 2013 Google Inc. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but without any warranty; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <stdint.h> +#include <string.h> +#include <assert.h> +#include <delay.h> +#include <arch/byteorder.h> +#include <device/i2c.h> +#include <tpm.h> +#include "tpm.h" + +#include <console/console.h> + +/* global structure for tpm chip data */ +struct tpm_chip g_chip; + +#define TPM_CMD_COUNT_BYTE 2 +#define TPM_CMD_ORDINAL_BYTE 6 + +int tis_open(void) +{ + int rc; + + if (g_chip.is_open) { + printk(BIOS_DEBUG, "tis_open() called twice.\n"); + return -1; + } + + rc = tpm_vendor_init(CONFIG_DRIVER_TPM_I2C_BUS, + CONFIG_DRIVER_TPM_I2C_ADDR); + + if (rc < 0) + g_chip.is_open = 0; + + if (rc) { + return -1; + } + + return 0; +} + +int tis_close(void) +{ + if (g_chip.is_open) { + tpm_vendor_cleanup(&g_chip); + g_chip.is_open = 0; + } + + return 0; +} + +int tis_init(void) +{ + int bus = CONFIG_DRIVER_TPM_I2C_BUS; + int chip = CONFIG_DRIVER_TPM_I2C_ADDR; + + /* + * Probe TPM twice; the first probing might fail because TPM is asleep, + * and the probing can wake up TPM. + */ + uint8_t tmp; + + if (i2c_read(bus, chip, 0, 0, &tmp, sizeof(tmp)) && + i2c_read(bus, chip, 0, 0, &tmp, sizeof(tmp))) + return -1; + + return 0; +} + +static ssize_t tpm_transmit(const uint8_t *buf, size_t bufsiz) +{ + int rc; + uint32_t count, ordinal; + + struct tpm_chip *chip = &g_chip; + + memcpy(&count, buf + TPM_CMD_COUNT_BYTE, sizeof(count)); + count = be32_to_cpu(count); + memcpy(&ordinal, buf + TPM_CMD_ORDINAL_BYTE, sizeof(ordinal)); + ordinal = be32_to_cpu(ordinal); + + if (count == 0) { + printk(BIOS_DEBUG, "tpm_transmit: no data\n"); + return -1; + } + if (count > bufsiz) { + printk(BIOS_DEBUG, "tpm_transmit: invalid count value %x %zx\n", + count, bufsiz); + return -1; + } + + ASSERT(chip->vendor.send); + rc = chip->vendor.send(chip, (uint8_t *) buf, count); + if (rc < 0) { + printk(BIOS_DEBUG, "tpm_transmit: tpm_send error\n"); + goto out; + } + + if (chip->vendor.irq) + goto out_recv; + + int timeout = 2 * 60 * 1000; /* two minutes timeout */ + while (timeout) { + ASSERT(chip->vendor.status); + uint8_t status = chip->vendor.status(chip); + if ((status & chip->vendor.req_complete_mask) == + chip->vendor.req_complete_val) { + goto out_recv; + } + + if ((status == chip->vendor.req_canceled)) { + printk(BIOS_DEBUG, "tpm_transmit: Operation Canceled\n"); + rc = -1; + goto out; + } + mdelay(TPM_TIMEOUT); + timeout--; + } + + ASSERT(chip->vendor.cancel); + chip->vendor.cancel(chip); + printk(BIOS_DEBUG, "tpm_transmit: Operation Timed out\n"); + rc = -1; //ETIME; + goto out; + +out_recv: + + rc = chip->vendor.recv(chip, (uint8_t *) buf, TPM_BUFSIZE); + if (rc < 0) + printk(BIOS_DEBUG, "tpm_transmit: tpm_recv: error %zd\n", rc); +out: + return rc; +} + +int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, + uint8_t *recvbuf, size_t *rbuf_len) +{ + uint8_t buf[TPM_BUFSIZE]; + + if (sizeof(buf) < sbuf_size) + return -1; + + memcpy(buf, sendbuf, sbuf_size); + + int len = tpm_transmit(buf, sbuf_size); + + if (len < 10) { + *rbuf_len = 0; + return -1; + } + + if (len > *rbuf_len) { + *rbuf_len = len; + return -1; + } + + memcpy(recvbuf, buf, len); + *rbuf_len = len; + + return 0; +} diff --git a/src/drivers/i2c/tpm/tis.h b/src/drivers/i2c/tpm/tis.h deleted file mode 100644 index 348f9a8..0000000 --- a/src/drivers/i2c/tpm/tis.h +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright 2011 Google Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef __DRIVERS_TPM_TPM_H__ -#define __DRIVERS_TPM_TPM_H__ - -#include <stddef.h> -#include <stdint.h> - -void tis_set_i2c_bus(unsigned _bus); - -/* - * tis_init() - * - * Initialize the TPM device. Returns 0 on success or -1 on - * failure (in case device probing did not succeed). - */ -int tis_init(void); - -/* - * tis_open() - * - * Requests access to locality 0 for the caller. After all commands have been - * completed the caller is supposed to call tis_close(). - * - * Returns 0 on success, -1 on failure. - */ -int tis_open(void); - -/* - * tis_close() - * - * terminate the currect session with the TPM by releasing the locked - * locality. Returns 0 on success of -1 on failure (in case lock - * removal did not succeed). - */ -int tis_close(void); - -/* - * tis_sendrecv() - * - * Send the requested data to the TPM and then try to get its response - * - * @sendbuf - buffer of the data to send - * @send_size size of the data to send - * @recvbuf - memory to save the response to - * @recv_len - pointer to the size of the response buffer - * - * Returns 0 on success (and places the number of response bytes at recv_len) - * or -1 on failure. - */ -int tis_sendrecv(const uint8_t *sendbuf, size_t send_size, uint8_t *recvbuf, - size_t *recv_len); - -#endif /* __DRIVERS_TPM_TPM_H__ */ diff --git a/src/drivers/i2c/tpm/tis_i2c.c b/src/drivers/i2c/tpm/tis_i2c.c deleted file mode 100644 index 59971a2..0000000 --- a/src/drivers/i2c/tpm/tis_i2c.c +++ /dev/null @@ -1,103 +0,0 @@ -/* - * Copyright 2013 Google Inc. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but without any warranty; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <stdint.h> -#include <string.h> -#include <device/i2c.h> -#include "tis.h" -#include "tpm.h" - -static unsigned bus = 0; - -static int opened; - -void tis_set_i2c_bus(unsigned _bus) -{ - bus = _bus; -} - -int tis_open(void) -{ - opened = 1; - if (tpm_open(bus, CONFIG_DRIVER_TPM_I2C_ADDR)) { - opened = 0; - return -1; - } - return 0; -} - -int tis_close(void) -{ - opened = 0; - tpm_close(); - return 0; -} - -int tis_init(void) -{ - int chip = CONFIG_DRIVER_TPM_I2C_ADDR; - - /* - * Probe TPM twice; the first probing might fail because TPM is asleep, - * and the probing can wake up TPM. - */ - uint8_t tmp; - if (!bus) - return -1; - - if (i2c_read(bus, chip, 0, 0, &tmp, sizeof(tmp)) && - i2c_read(bus, chip, 0, 0, &tmp, sizeof(tmp))) - return -1; - - return 0; -} - -int tis_sendrecv(const uint8_t *sendbuf, size_t sbuf_size, - uint8_t *recvbuf, size_t *rbuf_len) -{ - uint8_t buf[TPM_BUFSIZE]; - - if (!opened && tis_open()) - return -1; - - if (sizeof(buf) < sbuf_size) - return -1; - - memcpy(buf, sendbuf, sbuf_size); - - int len = tpm_transmit(buf, sbuf_size); - - if (len < 10) { - *rbuf_len = 0; - return -1; - } - - if (len > *rbuf_len) { - *rbuf_len = len; - return -1; - } - - memcpy(recvbuf, buf, len); - *rbuf_len = len; - - return 0; -} diff --git a/src/drivers/i2c/tpm/tpm.c b/src/drivers/i2c/tpm/tpm.c index d31cc79..837bd23 100644 --- a/src/drivers/i2c/tpm/tpm.c +++ b/src/drivers/i2c/tpm/tpm.c @@ -8,6 +8,10 @@ * Device driver for TCG/TCPA TPM (trusted platform module). * Specifications at www.trustedcomputinggroup.org * + * This device driver implements the TPM interface as defined in + * the TCG TPM Interface Spec version 1.2, revision 1.0 and the + * Infineon I2C Protocol Stack Specification v0.20. + * * It is based on the Linux kernel driver tpm.c from Leendert van * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. * @@ -34,113 +38,524 @@ #include <stdint.h> #include <string.h> -#include <assert.h> +#include <types.h> #include <delay.h> #include <console/console.h> #include <arch/byteorder.h> -#include "tis.h" +#include <device/i2c.h> #include "tpm.h" -/* global structure for tpm chip data */ -struct tpm_chip g_chip; +/* max. buffer size supported by our TPM */ +#ifdef TPM_BUFSIZE +#undef TPM_BUFSIZE +#endif +#define TPM_BUFSIZE 1260 + +/* Address of the TPM on the I2C bus */ +#define TPM_I2C_ADDR 0x20 + +/* max. number of iterations after I2C NAK */ +#define MAX_COUNT 3 + +#define SLEEP_DURATION 60 /* in usec */ + +/* max. number of iterations after I2C NAK for 'long' commands + * we need this especially for sending TPM_READY, since the cleanup after the + * transtion to the ready state may take some time, but it is unpredictable + * how long it will take. + */ +#define MAX_COUNT_LONG 50 + +#define SLEEP_DURATION_LONG 210 /* in usec */ + +/* expected value for DIDVID register */ +#define TPM_TIS_I2C_DID_VID_9635 0x000b15d1L +#define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L + +enum i2c_chip_type { + SLB9635, + SLB9645, + UNKNOWN, +}; + +static const char * const chip_name[] = { + [SLB9635] = "slb9635tt", + [SLB9645] = "slb9645tt", + [UNKNOWN] = "unknown/fallback to slb9635", +}; -#define TPM_CMD_COUNT_BYTE 2 -#define TPM_CMD_ORDINAL_BYTE 6 +/* Structure to store I2C TPM specific stuff */ +struct tpm_inf_dev { + unsigned bus; + unsigned int addr; + uint8_t buf[TPM_BUFSIZE + sizeof(uint8_t)]; // max. buffer size + addr + enum i2c_chip_type chip_type; +}; -ssize_t tpm_transmit(const uint8_t *buf, size_t bufsiz) +static struct tpm_inf_dev tpm_dev = { + .addr = TPM_I2C_ADDR +}; + +/* + * iic_tpm_read() - read from TPM register + * @addr: register address to read from + * @buffer: provided by caller + * @len: number of bytes to read + * + * Read len bytes from TPM register and put them into + * buffer (little-endian format, i.e. first byte is put into buffer[0]). + * + * NOTE: TPM is big-endian for multi-byte values. Multi-byte + * values have to be swapped. + * + * Return -1 on error, 0 on success. + */ +static int iic_tpm_read(uint8_t addr, uint8_t *buffer, size_t len) { - ssize_t rc; - uint32_t count, ordinal; + int rc; + int count; + + if (!tpm_dev.bus) + return -1; + if ((tpm_dev.chip_type == SLB9635) || (tpm_dev.chip_type == UNKNOWN)) { + /* slb9635 protocol should work in both cases */ + for (count = 0; count < MAX_COUNT; count++) { + rc = i2c_write(tpm_dev.bus, tpm_dev.addr, + 0, 0, &addr, 1); + if (rc == 0) + break; /* success, break to skip sleep */ + + udelay(SLEEP_DURATION); + } - struct tpm_chip *chip = &g_chip; + if (rc) + return -1; - memcpy(&count, buf + TPM_CMD_COUNT_BYTE, sizeof(count)); - count = be32_to_cpu(count); - memcpy(&ordinal, buf + TPM_CMD_ORDINAL_BYTE, sizeof(ordinal)); - ordinal = be32_to_cpu(ordinal); + /* After the TPM has successfully received the register address + * it needs some time, thus we're sleeping here again, before + * retrieving the data + */ + for (count = 0; count < MAX_COUNT; count++) { + udelay(SLEEP_DURATION); + rc = i2c_read(tpm_dev.bus, tpm_dev.addr, + 0, 0, buffer, len); + if (rc == 0) + break; /* success, break to skip sleep */ - if (count == 0) { - printk(BIOS_DEBUG, "tpm_transmit: no data\n"); - return -1; //ENODATA; + } + } else { + /* use a combined read for newer chips + * unfortunately the smbus functions are not suitable due to + * the 32 byte limit of the smbus. + * retries should usually not be needed, but are kept just to + * be safe on the safe side. + */ + for (count = 0; count < MAX_COUNT; count++) { + rc = i2c_read(tpm_dev.bus, tpm_dev.addr, + addr, 1, buffer, len); + if (rc == 0) + break; /* break here to skip sleep */ + udelay(SLEEP_DURATION); + } } - if (count > bufsiz) { - printk(BIOS_DEBUG, "tpm_transmit: invalid count value %x %zx\n", - count, bufsiz); - return -1; //E2BIG; + + /* take care of 'guard time' */ + udelay(SLEEP_DURATION); + if (rc) + return -1; + + return 0; +} + +static int iic_tpm_write_generic(uint8_t addr, uint8_t *buffer, size_t len, + unsigned int sleep_time, + uint8_t max_count) +{ + int rc = 0; + int count; + + if (len > TPM_BUFSIZE) { + printk(BIOS_DEBUG, "%s: Length %d is too large\n", __func__, len); + return -1; } - ASSERT(chip->vendor.send); - rc = chip->vendor.send(chip, (uint8_t *) buf, count); - if (rc < 0) { - printk(BIOS_DEBUG, "tpm_transmit: tpm_send: error %zd\n", rc); - goto out; + /* prepare send buffer */ + tpm_dev.buf[0] = addr; + memcpy(&(tpm_dev.buf[1]), buffer, len); + + if (!tpm_dev.bus) + return -1; + for (count = 0; count < max_count; count++) { + rc = i2c_write(tpm_dev.bus, tpm_dev.addr, 0, 0, + tpm_dev.buf, len + 1); + if (rc == 0) + break; /* success, break to skip sleep */ + + udelay(sleep_time); } - if (chip->vendor.irq) - goto out_recv; + /* take care of 'guard time' */ + udelay(SLEEP_DURATION); + if (rc) + return -1; - int timeout = 2 * 60 * 1000; /* two minutes timeout */ + return 0; +} + +/* + * iic_tpm_write() - write to TPM register + * @addr: register address to write to + * @buffer: containing data to be written + * @len: number of bytes to write + * + * Write len bytes from provided buffer to TPM register (little + * endian format, i.e. buffer[0] is written as first byte). + * + * NOTE: TPM is big-endian for multi-byte values. Multi-byte + * values have to be swapped. + * + * NOTE: use this function instead of the iic_tpm_write_generic function. + * + * Return -EIO on error, 0 on success + */ +static int iic_tpm_write(uint8_t addr, uint8_t *buffer, size_t len) +{ + return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION, + MAX_COUNT); +} + +/* + * This function is needed especially for the cleanup situation after + * sending TPM_READY + * */ +static int iic_tpm_write_long(uint8_t addr, uint8_t *buffer, size_t len) +{ + return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG, + MAX_COUNT_LONG); +} + +#define TPM_HEADER_SIZE 10 + +enum tis_access { + TPM_ACCESS_VALID = 0x80, + TPM_ACCESS_ACTIVE_LOCALITY = 0x20, + TPM_ACCESS_REQUEST_PENDING = 0x04, + TPM_ACCESS_REQUEST_USE = 0x02, +}; + +enum tis_status { + TPM_STS_VALID = 0x80, + TPM_STS_COMMAND_READY = 0x40, + TPM_STS_GO = 0x20, + TPM_STS_DATA_AVAIL = 0x10, + TPM_STS_DATA_EXPECT = 0x08, +}; + +#define TPM_ACCESS(l) (0x0000 | ((l) << 4)) +#define TPM_STS(l) (0x0001 | ((l) << 4)) +#define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4)) +#define TPM_DID_VID(l) (0x0006 | ((l) << 4)) + +static int check_locality(struct tpm_chip *chip, int loc) +{ + uint8_t buf; + + if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) + return -1; + + if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == + (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { + chip->vendor.locality = loc; + return loc; + } + + return -1; +} + +static void release_locality(struct tpm_chip *chip, int loc, int force) +{ + uint8_t buf; + if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) + return; + + if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == + (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) { + buf = TPM_ACCESS_ACTIVE_LOCALITY; + iic_tpm_write(TPM_ACCESS(loc), &buf, 1); + } +} + +static int request_locality(struct tpm_chip *chip, int loc) +{ + uint8_t buf = TPM_ACCESS_REQUEST_USE; + + if (check_locality(chip, loc) >= 0) + return loc; /* we already have the locality */ + + iic_tpm_write(TPM_ACCESS(loc), &buf, 1); + + /* wait for burstcount */ + int timeout = 2 * 1000; /* 2s timeout */ while (timeout) { - ASSERT(chip->vendor.status); - uint8_t status = chip->vendor.status(chip); - if ((status & chip->vendor.req_complete_mask) == - chip->vendor.req_complete_val) { - goto out_recv; - } + if (check_locality(chip, loc) >= 0) + return loc; + mdelay(TPM_TIMEOUT); + timeout--; + } - if ((status == chip->vendor.req_canceled)) { - printk(BIOS_DEBUG, "tpm_transmit: Operation Canceled\n"); - rc = -1; - goto out; - } + return -1; +} + +static uint8_t tpm_tis_i2c_status(struct tpm_chip *chip) +{ + /* NOTE: Since I2C read may fail, return 0 in this case --> time-out */ + uint8_t buf; + if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0) + return 0; + else + return buf; +} + +static void tpm_tis_i2c_ready(struct tpm_chip *chip) +{ + /* this causes the current command to be aborted */ + uint8_t buf = TPM_STS_COMMAND_READY; + iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1); +} + +static ssize_t get_burstcount(struct tpm_chip *chip) +{ + ssize_t burstcnt; + uint8_t buf[3]; + + /* wait for burstcount */ + int timeout = 2 * 1000; /* 2s timeout */ + while (timeout) { + /* Note: STS is little endian */ + if (iic_tpm_read(TPM_STS(chip->vendor.locality) + 1, buf, 3) < 0) + burstcnt = 0; + else + burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0]; + + if (burstcnt) + return burstcnt; mdelay(TPM_TIMEOUT); timeout--; } + return -1; +} + +static int wait_for_stat(struct tpm_chip *chip, uint8_t mask, int *status) +{ + unsigned long timeout = 2 * 1024; + while (timeout) { + *status = tpm_tis_i2c_status(chip); + if ((*status & mask) == mask) + return 0; + mdelay(TPM_TIMEOUT); + timeout--; + } + + return -1; +} + +static int recv_data(struct tpm_chip *chip, uint8_t *buf, size_t count) +{ + size_t size = 0; + + while (size < count) { + ssize_t burstcnt = get_burstcount(chip); + int rc; + + /* burstcount < 0 = TPM is busy */ + if (burstcnt < 0) + return burstcnt; + + /* limit received data to max. left */ + if (burstcnt > (count - size)) + burstcnt = count - size; + + rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality), + &(buf[size]), + burstcnt); + if (rc == 0) + size += burstcnt; + + } + return size; +} - ASSERT(chip->vendor.cancel); - chip->vendor.cancel(chip); - printk(BIOS_DEBUG, "tpm_transmit: Operation Timed out\n"); - rc = -1; //ETIME; - goto out; +static int tpm_tis_i2c_recv(struct tpm_chip *chip, uint8_t *buf, size_t count) +{ + int size = 0; + uint32_t expected; + int status; -out_recv: + if (count < TPM_HEADER_SIZE) { + size = -1; + goto out; + } + + /* read first 10 bytes, including tag, paramsize, and result */ + size = recv_data(chip, buf, TPM_HEADER_SIZE); + if (size < TPM_HEADER_SIZE) { + printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Unable to read header\n"); + goto out; + } + + memcpy(&expected, buf + TPM_RSP_SIZE_BYTE, sizeof(expected)); + expected = be32_to_cpu(expected); + if ((size_t)expected > count) { + size = -1; + goto out; + } + + size += recv_data(chip, &buf[TPM_HEADER_SIZE], + expected - TPM_HEADER_SIZE); + if (size < expected) { + printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Unable to " + "read remainder of result\n"); + size = -1; + goto out; + } + + wait_for_stat(chip, TPM_STS_VALID, &status); + if (status & TPM_STS_DATA_AVAIL) { /* retry? */ + printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Error left over data\n"); + size = -1; + goto out; + } - rc = chip->vendor.recv(chip, (uint8_t *) buf, TPM_BUFSIZE); - if (rc < 0) - printk(BIOS_DEBUG, "tpm_transmit: tpm_recv: error %zd\n", rc); out: - return rc; + tpm_tis_i2c_ready(chip); + + return size; } -#define TPM_ERROR_SIZE 10 +static int tpm_tis_i2c_send(struct tpm_chip *chip, uint8_t *buf, size_t len) +{ + int status; + size_t count = 0; + uint8_t sts = TPM_STS_GO; + + if (len > TPM_BUFSIZE) + return -1; /* command is too long for our TPM, sorry */ + + status = tpm_tis_i2c_status(chip); + if ((status & TPM_STS_COMMAND_READY) == 0) { + tpm_tis_i2c_ready(chip); + if (wait_for_stat(chip, TPM_STS_COMMAND_READY, &status) < 0) + goto out_err; + } + + while (count < len - 1) { + ssize_t burstcnt = get_burstcount(chip); + + /* burstcount < 0 = TPM is busy */ + if (burstcnt < 0) + return burstcnt; + + if (burstcnt > (len-1-count)) + burstcnt = len-1-count; + +#ifdef CONFIG_TPM_I2C_BURST_LIMITATION + if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION) + burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION; +#endif /* CONFIG_TPM_I2C_BURST_LIMITATION */ + + if (iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), + &(buf[count]), burstcnt) == 0) + count += burstcnt; + + wait_for_stat(chip, TPM_STS_VALID, &status); + if ((status & TPM_STS_DATA_EXPECT) == 0) + goto out_err; + } + + /* write last byte */ + iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1); + + wait_for_stat(chip, TPM_STS_VALID, &status); + if ((status & TPM_STS_DATA_EXPECT) != 0) + goto out_err; + + /* go and do it */ + iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1); + + return len; -struct tpm_chip *tpm_register_hardware(const struct tpm_vendor_specific *entry) +out_err: + tpm_tis_i2c_ready(chip); + + return -1; +} + +static struct tpm_vendor_specific tpm_tis_i2c = { + .status = tpm_tis_i2c_status, + .recv = tpm_tis_i2c_recv, + .send = tpm_tis_i2c_send, + .cancel = tpm_tis_i2c_ready, + .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, + .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, + .req_canceled = TPM_STS_COMMAND_READY, +}; + +/* Initialization of I2C TPM */ + +int tpm_vendor_init(unsigned bus, uint32_t dev_addr) { + uint32_t vendor; + unsigned int old_addr; struct tpm_chip *chip; + extern struct tpm_chip g_chip; + + old_addr = tpm_dev.addr; + if (dev_addr != 0) + tpm_dev.addr = dev_addr; + tpm_dev.bus = bus; - /* Driver specific per-device data */ chip = &g_chip; - memcpy(&chip->vendor, entry, sizeof(struct tpm_vendor_specific)); + memcpy(&chip->vendor, &tpm_tis_i2c, sizeof(struct tpm_vendor_specific)); chip->is_open = 1; - return chip; -} + /* Disable interrupts (not supported) */ + chip->vendor.irq = 0; -int tpm_open(unsigned bus, uint32_t dev_addr) -{ - int rc; - if (g_chip.is_open) - return -1; //EBUSY; - rc = tpm_vendor_init(bus, dev_addr); - if (rc < 0) - g_chip.is_open = 0; - return rc; + if (request_locality(chip, 0) != 0) + goto out_err; + + /* Read four bytes from DID_VID register */ + if (iic_tpm_read(TPM_DID_VID(0), (uint8_t *)&vendor, 4) < 0) + goto out_release; + + if (vendor == TPM_TIS_I2C_DID_VID_9645) { + tpm_dev.chip_type = SLB9645; + } else if (be32_to_cpu(vendor) == TPM_TIS_I2C_DID_VID_9635) { + tpm_dev.chip_type = SLB9635; + } else { + printk(BIOS_DEBUG, "Vendor ID 0x%08x not recognized.\n", vendor); + goto out_release; + } + + printk(BIOS_DEBUG, "1.2 TPM (chip type %s device-id 0x%X)\n", + chip_name[tpm_dev.chip_type], vendor >> 16); + + /* + * A timeout query to TPM can be placed here. + * Standard timeout values are used so far + */ + + return 0; + +out_release: + release_locality(chip, 0, 1); + +out_err: + tpm_dev.addr = old_addr; + return -1; } -void tpm_close(void) +void tpm_vendor_cleanup(struct tpm_chip *chip) { - if (g_chip.is_open) { - tpm_vendor_cleanup(&g_chip); - g_chip.is_open = 0; - } + release_locality(chip, chip->vendor.locality, 1); } diff --git a/src/drivers/i2c/tpm/tpm.h b/src/drivers/i2c/tpm/tpm.h index daddc59..6d195a1 100644 --- a/src/drivers/i2c/tpm/tpm.h +++ b/src/drivers/i2c/tpm/tpm.h @@ -128,29 +128,10 @@ struct tpm_cmd_t { tpm_cmd_params params; } __attribute__ ((packed)); - /* ---------- Interface for TPM vendor ------------ */ -struct tpm_chip *tpm_register_hardware(const struct tpm_vendor_specific *); - int tpm_vendor_init(unsigned bus, uint32_t dev_addr); void tpm_vendor_cleanup(struct tpm_chip *chip); -/* ---------- Interface for TDDL ------------------- */ - -/* - * if dev_addr != 0 - redefines TPM device address - * Returns < 0 on error, 0 on success. - */ -int tpm_open(unsigned bus, uint32_t dev_addr); - -void tpm_close(void); - -/* - * Transmit bufsiz bytes out of buf to TPM and get results back in buf, too. - * Returns < 0 on error, 0 on success. - */ -ssize_t tpm_transmit(const unsigned char *buf, size_t bufsiz); - #endif /* __DRIVERS_TPM_SLB9635_I2C_TPM_H__ */ diff --git a/src/drivers/i2c/tpm/tpm_tis_i2c.c b/src/drivers/i2c/tpm/tpm_tis_i2c.c deleted file mode 100644 index 008fac6..0000000 --- a/src/drivers/i2c/tpm/tpm_tis_i2c.c +++ /dev/null @@ -1,578 +0,0 @@ -/* - * Copyright (C) 2011 Infineon Technologies - * - * Authors: - * Peter Huewe <huewe.external(a)infineon.com> - * - * Description: - * Device driver for TCG/TCPA TPM (trusted platform module). - * Specifications at www.trustedcomputinggroup.org - * - * This device driver implements the TPM interface as defined in - * the TCG TPM Interface Spec version 1.2, revision 1.0 and the - * Infineon I2C Protocol Stack Specification v0.20. - * - * It is based on the Linux kernel driver tpm.c from Leendert van - * Dorn, Dave Safford, Reiner Sailer, and Kyleen Hall. - * - * Version: 2.1.1 - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation, version 2 of the - * License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#include <stdint.h> -#include <string.h> -#include <types.h> -#include <delay.h> -#include <console/console.h> -#include <arch/byteorder.h> -#include <device/i2c.h> -#include "tpm.h" - -/* max. buffer size supported by our tpm */ -#ifdef TPM_BUFSIZE -#undef TPM_BUFSIZE -#endif -#define TPM_BUFSIZE 1260 -/* Address of the TPM on the I2C bus */ -#define TPM_I2C_ADDR 0x20 -/* max. number of iterations after i2c NAK */ -#define MAX_COUNT 3 - -#define SLEEP_DURATION 60 /*in usec*/ - -/* max. number of iterations after i2c NAK for 'long' commands - * we need this especially for sending TPM_READY, since the cleanup after the - * transtion to the ready state may take some time, but it is unpredictable - * how long it will take. - */ -#define MAX_COUNT_LONG 50 - -#define SLEEP_DURATION_LONG 210 /* in usec */ - -/* expected value for DIDVID register */ -#define TPM_TIS_I2C_DID_VID_9635 0x000b15d1L -#define TPM_TIS_I2C_DID_VID_9645 0x001a15d1L - -enum i2c_chip_type { - SLB9635, - SLB9645, - UNKNOWN, -}; - -static const char * const chip_name[] = { - [SLB9635] = "slb9635tt", - [SLB9645] = "slb9645tt", - [UNKNOWN] = "unknown/fallback to slb9635", -}; - -/* Structure to store I2C TPM specific stuff */ -struct tpm_inf_dev { - unsigned bus; - unsigned int addr; - uint8_t buf[TPM_BUFSIZE + sizeof(uint8_t)]; // max. buffer size + addr - enum i2c_chip_type chip_type; -}; - -static struct tpm_inf_dev tpm_dev = { - .addr = TPM_I2C_ADDR -}; - -/* - * iic_tpm_read() - read from TPM register - * @addr: register address to read from - * @buffer: provided by caller - * @len: number of bytes to read - * - * Read len bytes from TPM register and put them into - * buffer (little-endian format, i.e. first byte is put into buffer[0]). - * - * NOTE: TPM is big-endian for multi-byte values. Multi-byte - * values have to be swapped. - * - * Return -EIO on error, 0 on success. - */ -static int iic_tpm_read(uint8_t addr, uint8_t *buffer, size_t len) -{ - int rc; - int count; - - if (!tpm_dev.bus) - return -1; - if ((tpm_dev.chip_type == SLB9635) || (tpm_dev.chip_type == UNKNOWN)) { - /* slb9635 protocol should work in both cases */ - for (count = 0; count < MAX_COUNT; count++) { - rc = i2c_write(tpm_dev.bus, tpm_dev.addr, - 0, 0, &addr, 1); - if (rc == 0) - break; /* success, break to skip sleep */ - - udelay(SLEEP_DURATION); - } - - if (rc) - return -rc; - - /* After the TPM has successfully received the register address - * it needs some time, thus we're sleeping here again, before - * retrieving the data - */ - for (count = 0; count < MAX_COUNT; count++) { - udelay(SLEEP_DURATION); - rc = i2c_read(tpm_dev.bus, tpm_dev.addr, - 0, 0, buffer, len); - if (rc == 0) - break; /* success, break to skip sleep */ - - } - } else { - /* use a combined read for newer chips - * unfortunately the smbus functions are not suitable due to - * the 32 byte limit of the smbus. - * retries should usually not be needed, but are kept just to - * be safe on the safe side. - */ - for (count = 0; count < MAX_COUNT; count++) { - rc = i2c_read(tpm_dev.bus, tpm_dev.addr, - addr, 1, buffer, len); - if (rc == 0) - break; /* break here to skip sleep */ - udelay(SLEEP_DURATION); - } - } - - /* take care of 'guard time' */ - udelay(SLEEP_DURATION); - if (rc) - return -rc; - - return 0; -} - -static int iic_tpm_write_generic(uint8_t addr, uint8_t *buffer, size_t len, - unsigned int sleep_time, - uint8_t max_count) -{ - int rc = 0; - int count; - - if (len > TPM_BUFSIZE) { - printk(BIOS_DEBUG, "%s: Length %d is too large\n", __func__, len); - return -1; - } - - /* prepare send buffer */ - tpm_dev.buf[0] = addr; - memcpy(&(tpm_dev.buf[1]), buffer, len); - - if (!tpm_dev.bus) - return -1; - for (count = 0; count < max_count; count++) { - rc = i2c_write(tpm_dev.bus, tpm_dev.addr, 0, 0, - tpm_dev.buf, len + 1); - if (rc == 0) - break; /* success, break to skip sleep */ - - udelay(sleep_time); - } - - /* take care of 'guard time' */ - udelay(SLEEP_DURATION); - if (rc) - return -rc; - - return 0; -} - -/* - * iic_tpm_write() - write to TPM register - * @addr: register address to write to - * @buffer: containing data to be written - * @len: number of bytes to write - * - * Write len bytes from provided buffer to TPM register (little - * endian format, i.e. buffer[0] is written as first byte). - * - * NOTE: TPM is big-endian for multi-byte values. Multi-byte - * values have to be swapped. - * - * NOTE: use this function instead of the iic_tpm_write_generic function. - * - * Return -EIO on error, 0 on success - */ -static int iic_tpm_write(uint8_t addr, uint8_t *buffer, size_t len) -{ - return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION, - MAX_COUNT); -} - -/* - * This function is needed especially for the cleanup situation after - * sending TPM_READY - * */ -static int iic_tpm_write_long(uint8_t addr, uint8_t *buffer, size_t len) -{ - return iic_tpm_write_generic(addr, buffer, len, SLEEP_DURATION_LONG, - MAX_COUNT_LONG); -} - -#define TPM_HEADER_SIZE 10 - -enum tis_access { - TPM_ACCESS_VALID = 0x80, - TPM_ACCESS_ACTIVE_LOCALITY = 0x20, - TPM_ACCESS_REQUEST_PENDING = 0x04, - TPM_ACCESS_REQUEST_USE = 0x02, -}; - -enum tis_status { - TPM_STS_VALID = 0x80, - TPM_STS_COMMAND_READY = 0x40, - TPM_STS_GO = 0x20, - TPM_STS_DATA_AVAIL = 0x10, - TPM_STS_DATA_EXPECT = 0x08, -}; - -#define TPM_ACCESS(l) (0x0000 | ((l) << 4)) -#define TPM_STS(l) (0x0001 | ((l) << 4)) -#define TPM_DATA_FIFO(l) (0x0005 | ((l) << 4)) -#define TPM_DID_VID(l) (0x0006 | ((l) << 4)) - -static int check_locality(struct tpm_chip *chip, int loc) -{ - uint8_t buf; - int rc; - - rc = iic_tpm_read(TPM_ACCESS(loc), &buf, 1); - if (rc < 0) - return rc; - - if ((buf & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) == - (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) { - chip->vendor.locality = loc; - return loc; - } - - return -1; -} - -static void release_locality(struct tpm_chip *chip, int loc, int force) -{ - uint8_t buf; - if (iic_tpm_read(TPM_ACCESS(loc), &buf, 1) < 0) - return; - - if (force || (buf & (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) == - (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) { - buf = TPM_ACCESS_ACTIVE_LOCALITY; - iic_tpm_write(TPM_ACCESS(loc), &buf, 1); - } -} - -static int request_locality(struct tpm_chip *chip, int loc) -{ - uint8_t buf = TPM_ACCESS_REQUEST_USE; - - if (check_locality(chip, loc) >= 0) - return loc; /* we already have the locality */ - - iic_tpm_write(TPM_ACCESS(loc), &buf, 1); - - /* wait for burstcount */ - int timeout = 2 * 1000; /* 2s timeout */ - while (timeout) { - if (check_locality(chip, loc) >= 0) - return loc; - mdelay(TPM_TIMEOUT); - timeout--; - } - - return -1; -} - -static uint8_t tpm_tis_i2c_status(struct tpm_chip *chip) -{ - /* NOTE: since i2c read may fail, return 0 in this case --> time-out */ - uint8_t buf; - if (iic_tpm_read(TPM_STS(chip->vendor.locality), &buf, 1) < 0) - return 0; - else - return buf; -} - -static void tpm_tis_i2c_ready(struct tpm_chip *chip) -{ - /* this causes the current command to be aborted */ - uint8_t buf = TPM_STS_COMMAND_READY; - iic_tpm_write_long(TPM_STS(chip->vendor.locality), &buf, 1); -} - -static ssize_t get_burstcount(struct tpm_chip *chip) -{ - ssize_t burstcnt; - uint8_t buf[3]; - - /* wait for burstcount */ - int timeout = 2 * 1000; /* 2s timeout */ - while (timeout) { - /* Note: STS is little endian */ - if (iic_tpm_read(TPM_STS(chip->vendor.locality) + 1, buf, 3) < 0) - burstcnt = 0; - else - burstcnt = (buf[2] << 16) + (buf[1] << 8) + buf[0]; - - if (burstcnt) - return burstcnt; - mdelay(TPM_TIMEOUT); - timeout--; - } - return -1; //EBUSY; -} - -static int wait_for_stat(struct tpm_chip *chip, uint8_t mask, int *status) -{ - unsigned long timeout = 2 * 1024; - while (timeout) { - *status = tpm_tis_i2c_status(chip); - if ((*status & mask) == mask) - return 0; - mdelay(TPM_TIMEOUT); - timeout--; - } - - return -1; //ETIME; -} - -static int recv_data(struct tpm_chip *chip, uint8_t *buf, size_t count) -{ - size_t size = 0; - ssize_t burstcnt; - int rc; - - while (size < count) { - burstcnt = get_burstcount(chip); - - /* burstcount < 0 = tpm is busy */ - if (burstcnt < 0) - return burstcnt; - - /* limit received data to max. left */ - if (burstcnt > (count - size)) - burstcnt = count - size; - - rc = iic_tpm_read(TPM_DATA_FIFO(chip->vendor.locality), - &(buf[size]), - burstcnt); - if (rc == 0) - size += burstcnt; - - } - return size; -} - -static int tpm_tis_i2c_recv(struct tpm_chip *chip, uint8_t *buf, size_t count) -{ - int size = 0; - uint32_t expected; - int status; - - if (count < TPM_HEADER_SIZE) { - size = -1; //EIO; - goto out; - } - - /* read first 10 bytes, including tag, paramsize, and result */ - size = recv_data(chip, buf, TPM_HEADER_SIZE); - if (size < TPM_HEADER_SIZE) { - printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Unable to read header\n"); - goto out; - } - - memcpy(&expected, buf + TPM_RSP_SIZE_BYTE, sizeof(expected)); - expected = be32_to_cpu(expected); - if ((size_t)expected > count) { - size = -1; //EIO; - goto out; - } - - size += recv_data(chip, &buf[TPM_HEADER_SIZE], - expected - TPM_HEADER_SIZE); - if (size < expected) { - printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Unable to " - "read remainder of result\n"); - size = -1; //ETIME; - goto out; - } - - wait_for_stat(chip, TPM_STS_VALID, &status); - if (status & TPM_STS_DATA_AVAIL) { /* retry? */ - printk(BIOS_DEBUG, "tpm_tis_i2c_recv: Error left over data\n"); - size = -1; //EIO; - goto out; - } - -out: - tpm_tis_i2c_ready(chip); - - return size; -} - -static int tpm_tis_i2c_send(struct tpm_chip *chip, uint8_t *buf, size_t len) -{ - int rc, status; - ssize_t burstcnt; - size_t count = 0; - uint8_t sts = TPM_STS_GO; - - if (len > TPM_BUFSIZE) - return -1; //E2BIG; /* command is too long for our tpm, sorry */ - - status = tpm_tis_i2c_status(chip); - if ((status & TPM_STS_COMMAND_READY) == 0) { - tpm_tis_i2c_ready(chip); - if (wait_for_stat(chip, TPM_STS_COMMAND_READY, &status) < 0) { - rc = -1; //ETIME; - goto out_err; - } - } - - while (count < len - 1) { - burstcnt = get_burstcount(chip); - - /* burstcount < 0 = tpm is busy */ - if (burstcnt < 0) - return burstcnt; - - if (burstcnt > (len-1-count)) - burstcnt = len-1-count; - -#ifdef CONFIG_TPM_I2C_BURST_LIMITATION - if (burstcnt > CONFIG_TPM_I2C_BURST_LIMITATION) - burstcnt = CONFIG_TPM_I2C_BURST_LIMITATION; -#endif /* CONFIG_TPM_I2C_BURST_LIMITATION */ - - rc = iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), - &(buf[count]), burstcnt); - if (rc == 0) - count += burstcnt; - - wait_for_stat(chip, TPM_STS_VALID, &status); - - if ((status & TPM_STS_DATA_EXPECT) == 0) { - rc = -1; //EIO; - goto out_err; - } - - } - - /* write last byte */ - iic_tpm_write(TPM_DATA_FIFO(chip->vendor.locality), &(buf[count]), 1); - wait_for_stat(chip, TPM_STS_VALID, &status); - if ((status & TPM_STS_DATA_EXPECT) != 0) { - rc = -1; //EIO; - goto out_err; - } - - /* go and do it */ - iic_tpm_write(TPM_STS(chip->vendor.locality), &sts, 1); - - return len; -out_err: - tpm_tis_i2c_ready(chip); - - return rc; -} - -static struct tpm_vendor_specific tpm_tis_i2c = { - .status = tpm_tis_i2c_status, - .recv = tpm_tis_i2c_recv, - .send = tpm_tis_i2c_send, - .cancel = tpm_tis_i2c_ready, - .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID, - .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID, - .req_canceled = TPM_STS_COMMAND_READY, -}; - -/* initialisation of i2c tpm */ - - -int tpm_vendor_init(unsigned bus, uint32_t dev_addr) -{ - uint32_t vendor; - unsigned int old_addr; - int rc = 0; - struct tpm_chip *chip; - - old_addr = tpm_dev.addr; - if (dev_addr != 0) - tpm_dev.addr = dev_addr; - tpm_dev.bus = bus; - - chip = tpm_register_hardware(&tpm_tis_i2c); - if (chip < 0) { - rc = -1; //ENODEV; - goto out_err; - } - - /* Disable interrupts (not supported) */ - chip->vendor.irq = 0; - - if (request_locality(chip, 0) != 0) { - rc = -1; //ENODEV; - goto out_err; - } - - /* read four bytes from DID_VID register */ - if (iic_tpm_read(TPM_DID_VID(0), (uint8_t *)&vendor, 4) < 0) { - rc = -1; //EIO; - goto out_release; - } - - if (vendor == TPM_TIS_I2C_DID_VID_9645) { - tpm_dev.chip_type = SLB9645; - } else if (be32_to_cpu(vendor) == TPM_TIS_I2C_DID_VID_9635) { - tpm_dev.chip_type = SLB9635; - } else { - printk(BIOS_DEBUG, "Vendor ID 0x%08x not recognized.\n", vendor); - rc = -1; //ENODEV; - goto out_release; - } - - printk(BIOS_DEBUG, "1.2 TPM (chip type %s device-id 0x%X)\n", - chip_name[tpm_dev.chip_type], vendor >> 16); - - /* - * A timeout query to TPM can be placed here. - * Standard timeout values are used so far - */ - - return 0; - -out_release: - release_locality(chip, 0, 1); - -out_err: - tpm_dev.addr = old_addr; - return rc; -} - -void tpm_vendor_cleanup(struct tpm_chip *chip) -{ - release_locality(chip, chip->vendor.locality, 1); -} diff --git a/src/drivers/pc80/tpm.c b/src/drivers/pc80/tpm.c index 40f1e7b..c0429dd 100644 --- a/src/drivers/pc80/tpm.c +++ b/src/drivers/pc80/tpm.c @@ -33,7 +33,7 @@ #include <arch/io.h> #include <arch/byteorder.h> #include <console/console.h> -#include <pc80/tpm.h> +#include <tpm.h> #include <arch/early_variables.h> #define PREFIX "lpc_tpm: " diff --git a/src/include/pc80/tpm.h b/src/include/pc80/tpm.h deleted file mode 100644 index 2eff15a..0000000 --- a/src/include/pc80/tpm.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2011 The Chromium OS Authors. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef TPM_H_ -#define TPM_H_ - -int tis_init(void); -int tis_open(void); -int tis_close(void); -int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf, - size_t *recv_len); - -#endif /* TPM_H_ */ diff --git a/src/include/tpm.h b/src/include/tpm.h new file mode 100644 index 0000000..e25ad6a --- /dev/null +++ b/src/include/tpm.h @@ -0,0 +1,69 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2011 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +#ifndef TPM_H_ +#define TPM_H_ + +#include <stddef.h> +#include <stdint.h> + +/* + * tis_init() + * + * Initialize the TPM device. Returns 0 on success or -1 on + * failure (in case device probing did not succeed). + */ +int tis_init(void); + +/* + * tis_open() + * + * Requests access to locality 0 for the caller. After all commands have been + * completed the caller is supposed to call tis_close(). + * + * Returns 0 on success, -1 on failure. + */ +int tis_open(void); + +/* + * tis_close() + * + * terminate the currect session with the TPM by releasing the locked + * locality. Returns 0 on success of -1 on failure (in case lock + * removal did not succeed). + */ +int tis_close(void); + +/* + * tis_sendrecv() + * + * Send the requested data to the TPM and then try to get its response + * + * @sendbuf - buffer of the data to send + * @send_size size of the data to send + * @recvbuf - memory to save the response to + * @recv_len - pointer to the size of the response buffer + * + * Returns 0 on success (and places the number of response bytes at recv_len) + * or -1 on failure. + */ +int tis_sendrecv(const u8 *sendbuf, size_t send_size, u8 *recvbuf, + size_t *recv_len); + +#endif /* TPM_H_ */ diff --git a/src/vendorcode/google/chromeos/vboot.c b/src/vendorcode/google/chromeos/vboot.c index 03d759c..e42961f 100644 --- a/src/vendorcode/google/chromeos/vboot.c +++ b/src/vendorcode/google/chromeos/vboot.c @@ -20,7 +20,7 @@ #include <types.h> #include <console/console.h> #include <arch/acpi.h> -#include <pc80/tpm.h> +#include <tpm.h> #include <reset.h> #include "chromeos.h" diff --git a/src/vendorcode/google/chromeos/vboot_loader.c b/src/vendorcode/google/chromeos/vboot_loader.c index 943ad17..2f786ad 100644 --- a/src/vendorcode/google/chromeos/vboot_loader.c +++ b/src/vendorcode/google/chromeos/vboot_loader.c @@ -24,7 +24,7 @@ #include <cbmem.h> #include <console/console.h> #include <console/vtxprintf.h> -#include <pc80/tpm.h> +#include <tpm.h> #include <reset.h> #include <ramstage_loader.h> #include <romstage_handoff.h>

1 0

New patch to review for coreboot: e9b20c1 libpayload: usbhid: Fix typo on descriptor parsing
by Isaac Christensen 09 Sep '14

09 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6854 -gerrit commit e9b20c10cb1293ba2b7ce97820e980c67807919b Author: Julius Werner <jwerner(a)chromium.org> Date: Thu Oct 17 14:31:36 2013 -0700 libpayload: usbhid: Fix typo on descriptor parsing Forgot an asterisk and everything goes to hell. Sorry about that. Change-Id: I6b2503ca3ea0f80d4e4e5d8b8c0e986fec5db2c9 Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/173587 Reviewed-by: Stefan Reinauer <reinauer(a)google.com> Commit-Queue: David James <davidjames(a)chromium.org> (cherry picked from commit 2a357560a697b56cc6022a4dd3dda47b33568d83) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- payloads/libpayload/drivers/usb/usbhid.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/payloads/libpayload/drivers/usb/usbhid.c b/payloads/libpayload/drivers/usb/usbhid.c index 7ae40a8..74b6d5d 100644 --- a/payloads/libpayload/drivers/usb/usbhid.c +++ b/payloads/libpayload/drivers/usb/usbhid.c @@ -452,7 +452,7 @@ usb_hid_init (usbdev_t *dev) hid_descriptor_t *desc = malloc(sizeof(hid_descriptor_t)); if (!desc || get_descriptor(dev, gen_bmRequestType( device_to_host, standard_type, iface_recp), - 0x21, 0, desc, sizeof(*desc)) != sizeof(desc)) { + 0x21, 0, desc, sizeof(*desc)) != sizeof(*desc)) { usb_debug ("get_descriptor(HID) failed\n"); usb_detach_device (dev->controller, dev->address); return;

1 0

New patch to review for coreboot: 4ec143b libpayload: ehci: Fix byte count in dump_td()
by Isaac Christensen 09 Sep '14

09 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6853 -gerrit commit 4ec143bdd073ef314278193a94e2bee2a7827f2f Author: Julius Werner <jwerner(a)chromium.org> Date: Tue Oct 29 11:31:40 2013 -0700 libpayload: ehci: Fix byte count in dump_td() The dump_td() debug function in the EHCI stack incorrectly masks the amount of transferred bytes on output... the actual field is 15 bits wide (30:16). Let's just use the mask constant we already have for all the other code. Change-Id: I28c6f0ec75cc613e38d53b670645d19bf9ffe1b9 Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/174986 Reviewed-by: Stefan Reinauer <reinauer(a)chromium.org> (cherry picked from commit 570077da7f16bbe2204b4a80790e4bd8fe1a2bd7) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- payloads/libpayload/drivers/usb/ehci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/payloads/libpayload/drivers/usb/ehci.c b/payloads/libpayload/drivers/usb/ehci.c index 129b9b8..0c3e32d 100644 --- a/payloads/libpayload/drivers/usb/ehci.c +++ b/payloads/libpayload/drivers/usb/ehci.c @@ -54,7 +54,7 @@ static void dump_td(u32 addr) usb_debug("|:+-----------------------------------------------+:|\n"); usb_debug("|:| Alt. Next qTD [0x%08lx] |:|\n", td->alt_next_qtd); usb_debug("|:+-----------------------------------------------+:|\n"); - usb_debug("|:| | Bytes to Transfer | [%04ld] |:|\n", (td->token & (0x7FUL << 16)) >> 16); + usb_debug("|:| | Bytes to Transfer |[%05ld] |:|\n", (td->token & QTD_TOTAL_LEN_MASK) >> 16); usb_debug("|:| | PID CODE: | [%ld] |:|\n", (td->token & (3UL << 8)) >> 8); usb_debug("|:| | Interrupt On Complete (IOC) | [%ld] |:|\n", (td->token & (1UL << 15)) >> 15); usb_debug("|:| | Status Active | [%ld] |:|\n", (td->token & (1UL << 7)) >> 7);

1 0

New patch to review for coreboot: 2c26bdd samus: GPIO updates for Proto1b
by Isaac Christensen 09 Sep '14

09 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6852 -gerrit commit 2c26bdd8f836c56e4bfaa95f751cca4d3c50c39f Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Thu Oct 31 11:31:20 2013 -0700 samus: GPIO updates for Proto1b Move NFC_INT to GPIO9 Swap CODEC_INT to GPIO46 and WLAN_DISABLE_L to GPIO42 Swap ACCEL_INT to GPIO45 and PP1800_CODEC_EN to GPIO43 Enable PP1800_CODEC_EN, CODEC_LDOENA, CODEC_RESET_L Old-Change-Id: I5547d34f1b7953808375aa5fe5e0a9640ae7e05e Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/175291 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> (cherry picked from commit 5bb4bc59e37ee4fe9a0556e08a53402c822e5bd6) samus: Misc fixes from proto1b bringup - NFC interrupt is expected in the kernel as a GPIO now, so set it back to that type - NFC FW update GPIO should be low - Accel/Codec interrupts were still set as GPIO type, they should be set as PIRQ type Old-Change-Id: I354c848ae7b158943f4745872b82a49e17e67e2f Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> Reviewed-on: https://chromium-review.googlesource.com/176513 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> (cherry picked from commit 75a0944f320c80618f12732a23344ce40010a688) Squashed two small patches for samus. Change-Id: I7ec56191fe2b7f19e470df175ad0bbe320a442f5 Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- src/mainboard/google/samus/gpio.h | 18 +++++++++--------- src/mainboard/google/samus/onboard.h | 16 ++++++++-------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/src/mainboard/google/samus/gpio.h b/src/mainboard/google/samus/gpio.h index d247a26..bc4d2f3 100644 --- a/src/mainboard/google/samus/gpio.h +++ b/src/mainboard/google/samus/gpio.h @@ -32,7 +32,7 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = { LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ LP_GPIO_ACPI_SCI, /* 8: PCH_LTE_WAKE_L */ - LP_GPIO_UNUSED, /* 9: UNUSED */ + LP_GPIO_IRQ_EDGE, /* 9: NFC_INT (GPIO IRQ) */ LP_GPIO_ACPI_SCI, /* 10: PCH_WLAN_WAKE_L */ LP_GPIO_UNUSED, /* 11: UNUSED */ LP_GPIO_UNUSED, /* 12: UNUSED */ @@ -51,7 +51,7 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = { LP_GPIO_INPUT, /* 25: EC_IN_RW */ LP_GPIO_OUT_HIGH, /* 26: NFC_EN */ LP_GPIO_UNUSED, /* 27: UNUSED */ - LP_GPIO_IRQ_EDGE, /* 29: NFC_INT (GPIO IRQ) */ + LP_GPIO_UNUSED, /* 28: UNUSED */ LP_GPIO_UNUSED, /* 29: UNUSED */ LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ LP_GPIO_NATIVE, /* 31: NATIVE: ACOK_BUF */ @@ -65,11 +65,11 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = { LP_GPIO_UNUSED, /* 39: UNUSED */ LP_GPIO_NATIVE, /* 40: NATIVE: PCH_USB1_OC_L */ LP_GPIO_NATIVE, /* 41: NATIVE: PCH_USB2_OC_L */ - LP_GPIO_IRQ_EDGE, /* 42: CODEC_INT_L (GPIO IRQ) */ - LP_GPIO_IRQ_EDGE, /* 43: ACCEL_INT (GPIO IRQ) */ - LP_GPIO_OUT_LOW, /* 44: CODEC_LDOENA (DISABLED FOR BRINGUP) */ - LP_GPIO_OUT_LOW, /* 45: PP1800_CODEC_EN (DISABLED FOR BRINGUP) */ - LP_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ + LP_GPIO_OUT_HIGH, /* 42: WLAN_DISABLE_L */ + LP_GPIO_OUT_HIGH, /* 43: PP1800_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 44: CODEC_LDOENA */ + LP_GPIO_PIRQ, /* 45: ACCEL_INT (PIRQW) */ + LP_GPIO_PIRQ, /* 46: CODEC_INT_L (PIRQO) */ LP_GPIO_PIRQ, /* 47: ACCEL_GYRO_INT (PIRQP) */ LP_GPIO_UNUSED, /* 48: UNUSED */ LP_GPIO_INPUT, /* 49: HDMI_CEC */ @@ -80,14 +80,14 @@ const struct pch_lp_gpio_map mainboard_gpio_map[] = { LP_GPIO_UNUSED, /* 54: UNUSED */ LP_GPIO_UNUSED, /* 55: UNUSED */ LP_GPIO_UNUSED, /* 56: UNUSED */ - LP_GPIO_OUT_LOW, /* 57: CODEC_RESET_L (DISABLED FOR BRINGUP) */ + LP_GPIO_OUT_HIGH, /* 57: CODEC_RESET_L */ LP_GPIO_UNUSED, /* 58: UNUSED */ LP_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */ LP_GPIO_UNUSED, /* 60: UNUSED */ LP_GPIO_NATIVE, /* 61: NATIVE: PCH_SUS_STAT */ LP_GPIO_NATIVE, /* 62: NATIVE: PCH_SUSCLK */ LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - LP_GPIO_OUT_HIGH, /* 64: NFC_FW_UPDATE */ + LP_GPIO_OUT_LOW, /* 64: NFC_FW_UPDATE */ LP_GPIO_INPUT, /* 65: MINIDP_PWR_FLT_L */ LP_GPIO_OUT_HIGH, /* 66: MINIDP_PWR_EN */ LP_GPIO_INPUT, /* 67: RAM_ID0 */ diff --git a/src/mainboard/google/samus/onboard.h b/src/mainboard/google/samus/onboard.h index 2824467..d47d3c9 100644 --- a/src/mainboard/google/samus/onboard.h +++ b/src/mainboard/google/samus/onboard.h @@ -40,23 +40,23 @@ #define BOARD_TOUCHSCREEN_I2C_ADDR 0x4b #define BOARD_CODEC_NAME "codec" -#define BOARD_CODEC_IRQ GPIO_INTERRUPT(42) -#define BOARD_CODEC_IRQ_TYPE BOARD_GPIO_INTERRUPT -#define BOARD_CODEC_WAKE_GPIO 42 /* GPIO42 */ +#define BOARD_CODEC_IRQ 30 /* PIRQO */ +#define BOARD_CODEC_IRQ_TYPE BOARD_PIRQ_INTERRUPT +#define BOARD_CODEC_WAKE_GPIO 46 /* GPIO46 */ #define BOARD_CODEC_I2C_BUS 1 /* I2C0 */ #define BOARD_CODEC_I2C_ADDR 0x1a #define BOARD_NFC_NAME "nfc" -#define BOARD_NFC_IRQ GPIO_INTERRUPT(29) +#define BOARD_NFC_IRQ GPIO_INTERRUPT(9) #define BOARD_NFC_IRQ_TYPE BOARD_GPIO_INTERRUPT -#define BOARD_NFC_WAKE_GPIO 29 /* GPIO29 */ +#define BOARD_NFC_WAKE_GPIO 9 /* GPIO9 */ #define BOARD_NFC_I2C_BUS 1 /* I2C0 */ #define BOARD_NFC_I2C_ADDR 0x28 #define BOARD_ACCEL_NAME "accel" -#define BOARD_ACCEL_IRQ GPIO_INTERRUPT(43) -#define BOARD_ACCEL_IRQ_TYPE BOARD_GPIO_INTERRUPT -#define BOARD_ACCEL_WAKE_GPIO 43 /* GPIO43 */ +#define BOARD_ACCEL_IRQ 29 /* PIRQN */ +#define BOARD_ACCEL_IRQ_TYPE BOARD_PIRQ_INTERRUPT +#define BOARD_ACCEL_WAKE_GPIO 45 /* GPIO45 */ #define BOARD_ACCEL_I2C_BUS 2 /* I2C1 */ #define BOARD_ACCEL_I2C_ADDR 0x0e

1 0

Patch set updated for coreboot: d98f3ce exynos: Install the BL1 and set the checksum in the Makefile.
by Isaac Christensen 09 Sep '14

09 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6834 -gerrit commit d98f3cea43d4368e6869bdd4ea0b74a3eb770657 Author: Gabe Black <gabeblack(a)google.com> Date: Sun Dec 8 12:48:45 2013 -0800 exynos: Install the BL1 and set the checksum in the Makefile. Install the BL1 and set up the checksum in the Makefile instead of relying on post processing. Import the exynos checksum script, split it in two and simplify it significantly. Stop putting the CBFS header in the midst of the bootblock so that it can be checksummed before CBFS is put together. Stop saving space for it and leaving an anchor in the bootblock which nobody looks for. Change-Id: Icbb5a5914ece60b2827433b6dc29d80db996ea6c Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://chromium-review.googlesource.com/179229 Reviewed-by: Ronald Minnich <rminnich(a)chromium.org> Commit-Queue: Gabe Black <gabeblack(a)chromium.org> Tested-by: Gabe Black <gabeblack(a)chromium.org> (cherry picked from commit aa3a416705517c0a6ddfdeb19905ac8cafb33df1) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- src/arch/arm/armv7/bootblock.S | 12 +------ src/soc/samsung/exynos5250/Kconfig | 11 +++--- src/soc/samsung/exynos5250/Makefile.inc | 17 ++++------ src/soc/samsung/exynos5420/Kconfig | 6 ++-- src/soc/samsung/exynos5420/Makefile.inc | 17 ++++------ util/exynos/fixed_cksum.py | 59 +++++++++++++++++++++++++++++++++ util/exynos/variable_cksum.py | 59 +++++++++++++++++++++++++++++++++ 7 files changed, 142 insertions(+), 39 deletions(-) diff --git a/src/arch/arm/armv7/bootblock.S b/src/arch/arm/armv7/bootblock.S index b28a787..82bd79e 100644 --- a/src/arch/arm/armv7/bootblock.S +++ b/src/arch/arm/armv7/bootblock.S @@ -31,17 +31,7 @@ .section ".start", "a", %progbits .globl _start -_start: b reset - .balignl 16,0xdeadbeef - -_cbfs_master_header: - /* The CBFS master header is inserted by cbfstool at the first - * aligned offset after the above anchor string is found. - * Hence, we leave some space for it. - */ - .skip 128 @ Assumes 64-byte alignment - -reset: +_start: /* * Set the cpu to System mode with IRQ and FIQ disabled. Prefetch/Data * aborts may happen early and crash before the abort handlers are diff --git a/src/soc/samsung/exynos5250/Kconfig b/src/soc/samsung/exynos5250/Kconfig index 2b4ad39..8d7c867 100644 --- a/src/soc/samsung/exynos5250/Kconfig +++ b/src/soc/samsung/exynos5250/Kconfig @@ -15,21 +15,22 @@ if CPU_SAMSUNG_EXYNOS5250 # # 0x0000: vendor-provided BL1 (8k). # 0x2000: bootblock -# 0x2010-0x2090: reserved for CBFS master header. -# 0xA000: Free for CBFS data. +# 0x9FFC-0xA000: BL2 checksum +# 0xA000-0xA080: reserved for CBFS master header. +# 0xA080: Free for CBFS data. config BOOTBLOCK_ROM_OFFSET hex - default 0x2000 + default 0 config CBFS_HEADER_ROM_OFFSET hex "offset of master CBFS header in ROM" - default 0x2010 + default 0x9F80 config CBFS_ROM_OFFSET # Calculated by BOOTBLOCK_ROM_OFFSET + max bootblock size. hex "offset of CBFS data in ROM" - default 0x0A000 + default 0x0A080 config SYS_SDRAM_BASE hex diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc index a15bc9c..cc89f2d 100644 --- a/src/soc/samsung/exynos5250/Makefile.inc +++ b/src/soc/samsung/exynos5250/Makefile.inc @@ -50,13 +50,10 @@ ramstage-y += fb.c ramstage-y += usb.c ramstage-y += cbmem.c -# Run an intermediate step when producing coreboot.rom -# that adds additional components to the final firmware -# image outside of CBFS -.PHONY: exynos5250_add_bl1 -$(obj)/coreboot.rom: exynos5250_add_bl1 -exynos5250_add_bl1: $(obj)/coreboot.pre - printf " DD Adding Samsung Exynos5250 BL1\n" - # TODO(hungte) Change this 'cpu' to soc when build scripts are changed. - dd if=3rdparty/cpu/samsung/exynos5250/bl1.bin \ - of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 +$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf + cp $< $@ + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n" + util/exynos/fixed_cksum.py $< $<.cksum 32768 + cat 3rdparty/cpu/samsung/exynos5250/bl1.bin $<.cksum > $@ diff --git a/src/soc/samsung/exynos5420/Kconfig b/src/soc/samsung/exynos5420/Kconfig index a0d6c98..904091e 100644 --- a/src/soc/samsung/exynos5420/Kconfig +++ b/src/soc/samsung/exynos5420/Kconfig @@ -17,16 +17,16 @@ if CPU_SAMSUNG_EXYNOS5420 # 0x0000: vendor-provided BL1 (8k). # 0x2000: variable length bootblock checksum header # 0x2010: bootblock -# 0x2020-0x20A0: reserved for CBFS master header. +# 0x9F80-0xA000: reserved for CBFS master header. # 0xA000: Free for CBFS data. config BOOTBLOCK_ROM_OFFSET hex - default 0x2010 + default 0 config CBFS_HEADER_ROM_OFFSET hex "offset of master CBFS header in ROM" - default 0x2020 + default 0x9F80 config CBFS_ROM_OFFSET # Calculated by BOOTBLOCK_ROM_OFFSET + max bootblock size. diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc index ef77b1b..5f37e7e 100644 --- a/src/soc/samsung/exynos5420/Makefile.inc +++ b/src/soc/samsung/exynos5420/Makefile.inc @@ -50,13 +50,10 @@ ramstage-y += dp.c dp_lowlevel.c fimd.c ramstage-y += usb.c ramstage-y += cbmem.c -# Run an intermediate step when producing coreboot.rom -# that adds additional components to the final firmware -# image outside of CBFS -.PHONY: exynos5420_add_bl1 -$(obj)/coreboot.rom: exynos5420_add_bl1 -exynos5420_add_bl1: $(obj)/coreboot.pre - printf " DD Adding Samsung Exynos5420 BL1\n" - # TODO(hungte) Change this 'cpu' to soc when build scripts are changed. - dd if=3rdparty/cpu/samsung/exynos5420/bl1.bin \ - of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1 +$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf + cp $< $@ + +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin + @printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n" + util/exynos/variable_cksum.py $< $<.cksum + cat 3rdparty/cpu/samsung/exynos5420/bl1.bin $<.cksum > $@ diff --git a/util/exynos/fixed_cksum.py b/util/exynos/fixed_cksum.py new file mode 100755 index 0000000..66da060 --- /dev/null +++ b/util/exynos/fixed_cksum.py @@ -0,0 +1,59 @@ +#!/usr/bin/env python +# +# Copyright (C) 2013 Google Inc. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +# SUCH DAMAGE. + +""" +This utility computes and fills Exynos ROM checksum (for BL1 or BL2). +(Algorithm from U-Boot: tools/mkexynosspl.c) + +Input: IN OUT DATA_SIZE + +Output: + + IN padded out to DATA_SIZE, checksum at the end, written to OUT. +""" + +import struct +import sys + +def main(argv): + if len(argv) != 4: + exit('usage: %s IN OUT DATA_SIZE' % argv[0]) + + in_name, out_name = argv[1:3] + size = int(argv[3], 0) + checksum_format = "<I" + with open(in_name, "rb") as in_file, open(out_name, "wb") as out_file: + data = in_file.read() + checksum_size = struct.calcsize(checksum_format) + data_size = size - checksum_size + assert len(data) <= data_size + checksum = struct.pack(checksum_format, sum(map(ord, data))) + out_file.write(data + bytearray(data_size - len(data)) + checksum) + + +if __name__ == '__main__': + main(sys.argv) diff --git a/util/exynos/variable_cksum.py b/util/exynos/variable_cksum.py new file mode 100755 index 0000000..75cdc74 --- /dev/null +++ b/util/exynos/variable_cksum.py @@ -0,0 +1,59 @@ +#!/usr/bin/env python +# +# Copyright (C) 2013 Google Inc. +# +# Redistribution and use in source and binary forms, with or without +# modification, are permitted provided that the following conditions +# are met: +# 1. Redistributions of source code must retain the above copyright +# notice, this list of conditions and the following disclaimer. +# 2. Redistributions in binary form must reproduce the above copyright +# notice, this list of conditions and the following disclaimer in the +# documentation and/or other materials provided with the distribution. +# 3. The name of the author may not be used to endorse or promote products +# derived from this software without specific prior written permission. +# +# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND +# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE +# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL +# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS +# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) +# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT +# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY +# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF +# SUCH DAMAGE. + +""" +This utility computes and fills Exynos ROM checksum (for BL1 or BL2). +(Algorithm from U-Boot: tools/mkexynosspl.c) + +Input: IN OUT + +Output: + + Checksum header added to IN and written to OUT. + Header: uint32_t size, checksum, reserved[2]. +""" + +import struct +import sys + +def main(argv): + if len(argv) != 3: + exit('usage: %s IN OUT' % argv[0]) + + in_name, out_name = argv[1:3] + header_format = "<IIII" + with open(in_name, "rb") as in_file, open(out_name, "wb") as out_file: + data = in_file.read() + header = struct.pack(header_format, + struct.calcsize(header_format) + len(data), + sum(map(ord, data)), + 0, 0) + out_file.write(header + data) + + +if __name__ == '__main__': + main(sys.argv)

1 0

New patch to review for coreboot: e6b4fc6 nvidia-cbootimage: integrate into coreboot make
by Isaac Christensen 09 Sep '14

09 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6851 -gerrit commit e6b4fc6ba6b1ee9369537e54b98a680b38f79bd5 Author: Isaac Christensen <isaac.christensen(a)se-eng.com> Date: Mon Sep 8 15:28:17 2014 -0600 nvidia-cbootimage: integrate into coreboot make Add rules for building the nvidia-cbootimage utility and add dependencies to the tegra124 platform. Change-Id: Ia9f26981bccd217fe79e1b5dd432ee7da868d22a Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- Makefile.inc | 16 ++++++++++++++-- src/soc/nvidia/tegra124/Makefile.inc | 6 ++---- 2 files changed, 16 insertions(+), 6 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 0640d4d..d343c6c 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -228,7 +228,8 @@ endif CFLAGS_common += -fno-common -ffreestanding -fno-builtin -fomit-frame-pointer additional-dirs := $(objutil)/cbfstool $(objutil)/romcc $(objutil)/ifdtool \ - $(objutil)/ifdfake $(objutil)/options $(objutil)/fletcher + $(objutil)/ifdfake $(objutil)/options $(objutil)/fletcher \ + $(objutil)/cbootimage ####################################################################### # generate build support files @@ -305,6 +306,17 @@ $(FLETCHER): $(top)/util/fletcher/fletcher.c @printf " HOSTCC $(subst $(obj)/,,$(@))\n" $(HOSTCC) $(HOSTCFLAGS) -o $@ $< +CBOOTIMAGE:=$(objutil)/cbootimage/cbootimage + +$(CBOOTIMAGE): $(top)/util/nvidia-cbootimage/Makefile + @printf " MAKE $(subst $(obj)/,,$(@))\n" + $(MAKE) -C $(top)/util/nvidia-cbootimage + cp $(top)/util/nvidia-cbootimage/src/cbootimage $@ + +$(top)/util/nvidia-cbootimage/Makefile: + cd $(top)/util/nvidia-cbootimage/; \ + ./autogen.sh >/dev/null + ####################################################################### # needed objects that every mainboard uses # Creation of these is architecture and mainboard independent @@ -413,7 +425,7 @@ crosstools-arm: clean-for-update crossgcc-clean: clean-for-update $(MAKE) -C util/crossgcc clean -tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/rmodtool $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(IFDFAKE) +tools: $(objutil)/kconfig/conf $(objutil)/cbfstool/cbfstool $(objutil)/cbfstool/rmodtool $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(IFDFAKE) $(CBOOTIMAGE) ########################################################################### # Common recipes for all stages diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc index a63eb35..b1f5998 100644 --- a/src/soc/nvidia/tegra124/Makefile.inc +++ b/src/soc/nvidia/tegra124/Makefile.inc @@ -1,5 +1,3 @@ -CBOOTIMAGE = cbootimage - bootblock-y += bootblock.c bootblock-y += bootblock_asm.S bootblock-y += cbfs.c @@ -40,13 +38,13 @@ CPPFLAGS_common += -Isrc/soc/nvidia/tegra124/include/ $(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf cp $< $@ -$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg +$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE) @printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n" $(CBOOTIMAGE) -gbct --soc tegra124 $< $@ BCT_BIN = $(obj)/generated/bct.bin BCT_WRAPPER = $(obj)/generated/bct.wrapper -$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) +$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BCT_BIN) $(CBOOTIMAGE) echo "Version = 1;" > $(BCT_WRAPPER) echo "Redundancy = 1;" >> $(BCT_WRAPPER) echo "Bctfile = $(BCT_BIN);" >> $(BCT_WRAPPER)

1 0

Patch set updated for coreboot: 5bf8620 tegra124: Switch the bootblock over the ARMv4 impelementation.
by Isaac Christensen 09 Sep '14

09 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6784 -gerrit commit 5bf862087e0f9325650218c464f6b4ddd25af8ed Author: Gabe Black <gabeblack(a)google.com> Date: Tue Oct 1 05:24:47 2013 -0700 tegra124: Switch the bootblock over the ARMv4 impelementation. The bootblock for the tegra124 runs on the AVP coprocessor which uses the ARMv4 architecture. Switch it over to that architecture. Change-Id: Ie527bbff938e6148c58727d448f9c2e6862da872 Signed-off-by: Gabe Black <gabeblack(a)google.com> Reviewed-on: https://chromium-review.googlesource.com/171402 Reviewed-by: Gabe Black <gabeblack(a)chromium.org> Tested-by: Gabe Black <gabeblack(a)chromium.org> Commit-Queue: Gabe Black <gabeblack(a)chromium.org> (cherry picked from commit c1aa76b7607ee40ff848628971a97eea5393aebe) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- src/soc/nvidia/tegra124/Kconfig | 2 +- src/soc/nvidia/tegra124/Makefile.inc | 3 --- 2 files changed, 1 insertion(+), 4 deletions(-) diff --git a/src/soc/nvidia/tegra124/Kconfig b/src/soc/nvidia/tegra124/Kconfig index 4f33f56..4e5bd62 100644 --- a/src/soc/nvidia/tegra124/Kconfig +++ b/src/soc/nvidia/tegra124/Kconfig @@ -1,5 +1,5 @@ config SOC_NVIDIA_TEGRA124 - select ARCH_BOOTBLOCK_ARMV7 + select ARCH_BOOTBLOCK_ARMV4 select ARCH_ROMSTAGE_ARMV7 select ARCH_RAMSTAGE_ARMV7 select HAVE_UART_SPECIAL diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc index 34d24da..a63eb35 100644 --- a/src/soc/nvidia/tegra124/Makefile.inc +++ b/src/soc/nvidia/tegra124/Makefile.inc @@ -1,8 +1,5 @@ CBOOTIMAGE = cbootimage -bootblock-c-ccopts += -marm -bootblock-S-ccopts += -marm - bootblock-y += bootblock.c bootblock-y += bootblock_asm.S bootblock-y += cbfs.c

1 0

Patch merged into coreboot/master: 3a75e5e Haswell/falco/peppy/slippy: continue to clean up FUI.
by gerrit＠coreboot.org 08 Sep '14

08 Sep '14

the following patch was just integrated into master: commit 3a75e5e8642d05d644ee3bccb92d8657ac2dadf0 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Mon Oct 28 15:01:54 2013 -0700 Haswell/falco/peppy/slippy: continue to clean up FUI. As a first step towards removing hardcodes from the FUI support, change the haswell call to i915_lightup to panel_lightup, and pass the intel_dp * as a parameter. Get rid of the scalar arguments and make them part of intel_dp. Get rid of file-scope variables and use the ones in the intel_dp struct. In falco, use functions that peppy uses. Drop slippy support for FUI, it's a dead board; if this is ok I'll remove the files next. And, incidentally, fix the broken RGBX constant and change it to BGRX. Change-Id: I46ef5a9ed8433382d042066ee3542af04cfc319a Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> Reviewed-on: https://chromium-review.googlesource.com/174932 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Commit-Queue: Ronald Minnich <rminnich(a)chromium.org> Tested-by: Ronald Minnich <rminnich(a)chromium.org> (cherry picked from commit 1e1ed410b445c8e2b7411e163d9d6f61499dc3f6) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> Reviewed-on: http://review.coreboot.org/6833 Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Tested-by: build bot (Jenkins) See http://review.coreboot.org/6833 for details. -gerrit

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Patch set updated for coreboot: 732bc9e Haswell/falco/peppy/slippy: continue to clean up FUI.
by Isaac Christensen 08 Sep '14

08 Sep '14

Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6833 -gerrit commit 732bc9eca4f470c57a78cb78b72ad0c19865fc01 Author: Ronald G. Minnich <rminnich(a)google.com> Date: Mon Oct 28 15:01:54 2013 -0700 Haswell/falco/peppy/slippy: continue to clean up FUI. As a first step towards removing hardcodes from the FUI support, change the haswell call to i915_lightup to panel_lightup, and pass the intel_dp * as a parameter. Get rid of the scalar arguments and make them part of intel_dp. Get rid of file-scope variables and use the ones in the intel_dp struct. In falco, use functions that peppy uses. Drop slippy support for FUI, it's a dead board; if this is ok I'll remove the files next. And, incidentally, fix the broken RGBX constant and change it to BGRX. Change-Id: I46ef5a9ed8433382d042066ee3542af04cfc319a Signed-off-by: Ronald G. Minnich <rminnich(a)google.com> Reviewed-on: https://chromium-review.googlesource.com/174932 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Commit-Queue: Ronald Minnich <rminnich(a)chromium.org> Tested-by: Ronald Minnich <rminnich(a)chromium.org> (cherry picked from commit 1e1ed410b445c8e2b7411e163d9d6f61499dc3f6) Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com> --- src/drivers/intel/gma/i915.h | 7 ++ src/mainboard/google/falco/gma.c | 156 +++------------------------------ src/mainboard/google/falco/i915io.c | 10 +-- src/mainboard/google/falco/mainboard.h | 25 ++++++ src/mainboard/google/link/i915.c | 2 +- src/mainboard/google/peppy/gma.c | 33 +++---- src/mainboard/google/peppy/i915io.c | 4 +- src/mainboard/google/slippy/Kconfig | 2 - src/northbridge/intel/haswell/gma.c | 31 ++++--- 9 files changed, 76 insertions(+), 194 deletions(-) diff --git a/src/drivers/intel/gma/i915.h b/src/drivers/intel/gma/i915.h index a67f8eb..8161d68 100644 --- a/src/drivers/intel/gma/i915.h +++ b/src/drivers/intel/gma/i915.h @@ -175,6 +175,12 @@ struct intel_dp { struct intel_dp_m_n m_n; u32 flags; u32 transcoder; + /* parameters computed by the early startup, to be used + * in the GMA code. + */ + u8 *graphics; + /* physical address, not to be used directly. */ + u64 physbase; }; /* we may yet need these. */ @@ -278,6 +284,7 @@ u32 gtt_read(u32 reg); int i915lightup(unsigned int physbase, unsigned int mmio, unsigned int gfx, unsigned int init_fb); +int panel_lightup(struct intel_dp *dp, unsigned int init_fb); /* display.c */ void compute_display_params(struct intel_dp *dp); diff --git a/src/mainboard/google/falco/gma.c b/src/mainboard/google/falco/gma.c index f3316f4..4e32b28 100644 --- a/src/mainboard/google/falco/gma.c +++ b/src/mainboard/google/falco/gma.c @@ -43,6 +43,7 @@ #include <cpu/x86/msr.h> #include <edid.h> #include <drivers/intel/gma/i915.h> +#include <northbridge/intel/haswell/haswell.h> #include "mainboard.h" /* @@ -86,52 +87,6 @@ */ #define FRAME_BUFFER_PAGES (FRAME_BUFFER_BYTES/(4096)) -static unsigned int *mmio; -static unsigned int graphics; -static unsigned int physbase; - -void ug1(int); -void ug2(int); -void ug22(int); -void ug3(int); - -/* GTT is the Global Translation Table for the graphics pipeline. - * It is used to translate graphics addresses to physical - * memory addresses. As in the CPU, GTTs map 4K pages. - * The setgtt function adds a further bit of flexibility: - * it allows you to set a range (the first two parameters) to point - * to a physical address (third parameter);the physical address is - * incremented by a count (fourth parameter) for each GTT in the - * range. - * Why do it this way? For ultrafast startup, - * we can point all the GTT entries to point to one page, - * and set that page to 0s: - * memset(physbase, 0, 4096); - * setgtt(0, 4250, physbase, 0); - * this takes about 2 ms, and is a win because zeroing - * the page takes a up to 200 ms. - * This call sets the GTT to point to a linear range of pages - * starting at physbase. - */ - -#define GTT_PTE_BASE (2 << 20) - -static void -setgtt(int start, int end, unsigned long base, int inc) -{ - int i; - - for(i = start; i < end; i++){ - u32 word = base + i*inc; - /* note: we've confirmed by checking - * the values that mrc does no - * useful setup before we run this. - */ - gtt_write(GTT_PTE_BASE + i * 4, word|1); - gtt_read(GTT_PTE_BASE + i * 4); - } -} - static int i915_init_done = 0; /* fill the palette. */ @@ -145,75 +100,6 @@ static void palette(void) } } -void dp_init_dim_regs(struct intel_dp *dp); -void dp_init_dim_regs(struct intel_dp *dp) -{ - struct edid *edid = &(dp->edid); - - dp->bytes_per_pixel = edid->framebuffer_bits_per_pixel / 8; - - dp->stride = edid->bytes_per_line; - - dp->htotal = (edid->ha - 1) | ((edid->ha + edid->hbl - 1) << 16); - - dp->hblank = (edid->ha - 1) | ((edid->ha + edid->hbl - 1) << 16); - - dp->hsync = (edid->ha + edid->hso - 1) | - ((edid->ha + edid->hso + edid->hspw - 1) << 16); - - dp->vtotal = (edid->va - 1) | ((edid->va + edid->vbl - 1) << 16); - - dp->vblank = (edid->va - 1) | ((edid->va + edid->vbl - 1) << 16); - - dp->vsync = (edid->va + edid->vso - 1) | - ((edid->va + edid->vso + edid->vspw - 1) << 16); - - /* PIPEASRC is wid-1 x ht-1 */ - dp->pipesrc = (edid->ha-1)<<16 | (edid->va-1); - - dp->pfa_pos = 0; - - dp->pfa_ctl = 0x80800000; - - dp->pfa_sz = (edid->ha << 16) | (edid->va); - - dp->flags = intel_ddi_calc_transcoder_flags(3 * 6, /* bits per color is 6 */ - dp->port, - dp->pipe, - dp->type, - dp->lane_count, - dp->pfa_sz, - dp->edid.phsync == '+'?1:0, - dp->edid.pvsync == '+'?1:0); - - dp->transcoder = intel_ddi_get_transcoder(dp->port, - dp->pipe); - - intel_dp_compute_m_n(dp->pipe_bits_per_pixel, - dp->lane_count, - dp->edid.pixel_clock, - dp->edid.link_clock, - &dp->m_n); - - printk(BIOS_SPEW, "dp->stride = 0x%08x\n",dp->stride); - printk(BIOS_SPEW, "dp->htotal = 0x%08x\n", dp->htotal); - printk(BIOS_SPEW, "dp->hblank = 0x%08x\n", dp->hblank); - printk(BIOS_SPEW, "dp->hsync = 0x%08x\n", dp->hsync); - printk(BIOS_SPEW, "dp->vtotal = 0x%08x\n", dp->vtotal); - printk(BIOS_SPEW, "dp->vblank = 0x%08x\n", dp->vblank); - printk(BIOS_SPEW, "dp->vsync = 0x%08x\n", dp->vsync); - printk(BIOS_SPEW, "dp->pipesrc = 0x%08x\n", dp->pipesrc); - printk(BIOS_SPEW, "dp->pfa_pos = 0x%08x\n", dp->pfa_pos); - printk(BIOS_SPEW, "dp->pfa_ctl = 0x%08x\n", dp->pfa_ctl); - printk(BIOS_SPEW, "dp->pfa_sz = 0x%08x\n", dp->pfa_sz); - printk(BIOS_SPEW, "dp->link_m = 0x%08x\n", dp->m_n.link_m); - printk(BIOS_SPEW, "dp->link_n = 0x%08x\n", dp->m_n.link_n); - printk(BIOS_SPEW, "0x6f030 = 0x%08x\n", TU_SIZE(dp->m_n.tu) | dp->m_n.gmch_m); - printk(BIOS_SPEW, "0x6f030 = 0x%08x\n", dp->m_n.gmch_m); - printk(BIOS_SPEW, "0x6f034 = 0x%08x\n", dp->m_n.gmch_n); - printk(BIOS_SPEW, "dp->flags = 0x%08x\n", dp->flags); -} - void mainboard_train_link(struct intel_dp *intel_dp) { u8 read_val; @@ -289,25 +175,14 @@ void mainboard_set_port_clk_dp(struct intel_dp *intel_dp) gtt_write(PORT_CLK_SEL(intel_dp->port), ddi_pll_sel); } -int i915lightup(unsigned int pphysbase, unsigned int pmmio, - unsigned int pgfx, unsigned int init_fb) +int panel_lightup(struct intel_dp *dp, unsigned int init_fb) { - int must_cycle_power = 0; - struct intel_dp adp, *dp = &adp; int i; int edid_ok; int pixels = FRAME_BUFFER_BYTES/64; - mmio = (void *)pmmio; - physbase = pphysbase; - graphics = pgfx; - printk(BIOS_SPEW, - "i915lightup: graphics %p mmio %p" - "physbase %08x\n", - (void *)graphics, mmio, physbase); - void runio(struct intel_dp *dp); - void runlinux(struct intel_dp *dp); + dp->gen = 8; // This is gen 8 which we believe is Haswell dp->is_haswell = 1; dp->DP = 0x2; @@ -332,11 +207,12 @@ int i915lightup(unsigned int pphysbase, unsigned int pmmio, all GTT entries point to the same page 2. Developer/Recovery mode: We do not zero out all the pages pointed to by GTT in order to avoid wasting time */ - if (init_fb) - setgtt(0, FRAME_BUFFER_PAGES, physbase, 4096); - else { - setgtt(0, FRAME_BUFFER_PAGES, physbase, 0); - memset((void*)graphics, 0, 4096); + if (init_fb){ + set_translation_table(0, FRAME_BUFFER_PAGES, dp->physbase, 4096); + memset((void *)dp->graphics, 0x55, FRAME_BUFFER_PAGES*4096); + } else { + set_translation_table(0, FRAME_BUFFER_PAGES, dp->physbase, 0); + memset((void*)dp->graphics, 0, 4096); } dp->address = 0x50; @@ -355,11 +231,7 @@ int i915lightup(unsigned int pphysbase, unsigned int pmmio, edid_ok = decode_edid(dp->rawedid, dp->edidlen, &dp->edid); printk(BIOS_SPEW, "decode edid returns %d\n", edid_ok); - dp->edid.link_clock = intel_dp_bw_code_to_link_rate(dp->link_bw); - - printk(BIOS_SPEW, "pixel_clock is %i, link_clock is %i\n",dp->edid.pixel_clock, dp->edid.link_clock); - - dp_init_dim_regs(dp); + compute_display_params(dp); intel_ddi_set_pipe_settings(dp); @@ -372,18 +244,12 @@ int i915lightup(unsigned int pphysbase, unsigned int pmmio, test_gfx(dp); - set_vbe_mode_info_valid(&dp->edid, graphics); + set_vbe_mode_info_valid(&dp->edid, (uintptr_t)dp->graphics); i915_init_done = 1; return i915_init_done; fail: printk(BIOS_SPEW, "Graphics could not be started;"); - if (0 && must_cycle_power){ - printk(BIOS_SPEW, "Turn off power and wait ..."); - gtt_write(PCH_PP_CONTROL,0xabcd0000); - udelay(600000); - gtt_write(PCH_PP_CONTROL,0xabcd000f); - } printk(BIOS_SPEW, "Returning.\n"); return 0; } diff --git a/src/mainboard/google/falco/i915io.c b/src/mainboard/google/falco/i915io.c index aae7f29..e1479f2 100644 --- a/src/mainboard/google/falco/i915io.c +++ b/src/mainboard/google/falco/i915io.c @@ -28,12 +28,6 @@ #include <arch/io.h> #include "mainboard.h" -/* these variables will be removed when the proper support is finished in src/drivers/intel/gma/intel_dp.c */ -int index; -u32 auxout; -u8 auxin[20]; -u8 msg[32]; - /* this function will either be renamed or subsumed into ./gma.c:i915_lightup */ void runio(struct intel_dp *dp); @@ -72,7 +66,7 @@ void runio(struct intel_dp *dp) mainboard_set_port_clk_dp(dp); gtt_write(DSPSTRIDE(dp->plane),dp->stride); - gtt_write(DSPCNTR(dp->plane),DISPLAY_PLANE_ENABLE|DISPPLANE_RGBX888); + gtt_write(DSPCNTR(dp->plane),DISPLAY_PLANE_ENABLE|DISPPLANE_BGRX888); gtt_write(DEIIR,0x00000080); gtt_write(TRANS_DDI_FUNC_CTL_EDP,dp->flags); @@ -125,7 +119,7 @@ void runio(struct intel_dp *dp) intel_dp_wait_reg(DEIIR, 0x00000000); gtt_write(DSPSTRIDE(dp->plane),dp->stride); - gtt_write(DSPCNTR(dp->plane),DISPLAY_PLANE_ENABLE | DISPPLANE_RGBX888); + gtt_write(DSPCNTR(dp->plane),DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); gtt_write(PCH_PP_CONTROL,EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON); diff --git a/src/mainboard/google/falco/mainboard.h b/src/mainboard/google/falco/mainboard.h new file mode 100644 index 0000000..f47fffd --- /dev/null +++ b/src/mainboard/google/falco/mainboard.h @@ -0,0 +1,25 @@ +/* +* This file is part of the coreboot project. +* +* Copyright 2013 Google Inc. +* +* This program is free software; you can redistribute it and/or modify +* it under the terms of the GNU General Public License as published by +* the Free Software Foundation; version 2 of the License. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU General Public License for more details. +* +* You should have received a copy of the GNU General Public License +* along with this program; if not, write to the Free Software +* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA +*/ + +#ifndef __MAINBOARD_H_ +#define __MAINBOARD_H_ +void mainboard_train_link(struct intel_dp *intel_dp); +void mainboard_set_port_clk_dp(struct intel_dp *intel_dp); + +#endif diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c index 8d94d36..c24c4bd 100644 --- a/src/mainboard/google/link/i915.c +++ b/src/mainboard/google/link/i915.c @@ -374,7 +374,7 @@ int i915lightup(const struct northbridge_intel_sandybridge_config *info, (void *)graphics, FRAME_BUFFER_BYTES); memset((void *)graphics, 0, FRAME_BUFFER_BYTES); printk(BIOS_SPEW, "%ld microseconds\n", globalmicroseconds()); - set_vbe_mode_info_valid(&edid, graphics); + set_vbe_mode_info_valid(&edid, (uintptr_t)graphics); i915_init_done = 1; return i915_init_done; } diff --git a/src/mainboard/google/peppy/gma.c b/src/mainboard/google/peppy/gma.c index 9c76c80..9b8a32b 100644 --- a/src/mainboard/google/peppy/gma.c +++ b/src/mainboard/google/peppy/gma.c @@ -87,9 +87,6 @@ */ #define FRAME_BUFFER_PAGES (FRAME_BUFFER_BYTES/(4096)) -static unsigned int *mmio; -static unsigned int graphics; -static unsigned int physbase; static int i915_init_done = 0; @@ -155,8 +152,6 @@ static void test_gfx(struct intel_dp *dp) green and blue. It is very useful to ensure all the initializations are made right. Thus, to be used only for testing, not otherwise */ - printk(BIOS_SPEW, "TEST: graphics %p, va %d, ha %d, stride %d\n", - (u32 *)graphics, dp->edid.va, dp->edid.ha, dp->stride); for (i = 0; i < (dp->edid.va - 4); i++) { u32 *l; @@ -166,7 +161,7 @@ static void test_gfx(struct intel_dp *dp) if (j == (dp->edid.ha/2)) { tcolor = 0xff00; } - l = (u32*)(graphics + i * dp->stride + j * sizeof(tcolor)); + l = (u32*)(dp->graphics + i * dp->stride + j * sizeof(tcolor)); memcpy(l,&tcolor,sizeof(tcolor)); } } @@ -196,24 +191,14 @@ void mainboard_set_port_clk_dp(struct intel_dp *intel_dp) gtt_write(PORT_CLK_SEL(intel_dp->port), ddi_pll_sel); } -int i915lightup(unsigned int pphysbase, unsigned int pmmio, - unsigned int pgfx, unsigned int init_fb) +int panel_lightup(struct intel_dp *dp, unsigned int init_fb) { - int must_cycle_power = 0; - struct intel_dp adp, *dp = &adp; int i; int edid_ok; int pixels = FRAME_BUFFER_BYTES/64; gtt_write(PCH_PP_CONTROL,0xabcd000f); delay(1); - mmio = (void *)pmmio; - physbase = pphysbase; - graphics = pgfx; - printk(BIOS_SPEW, - "i915lightup: graphics %p mmio %p" - "physbase %08x\n", - (void *)graphics, mmio, physbase); void runio(struct intel_dp *dp); /* hard codes -- stuff you can only know from the mainboard */ @@ -240,11 +225,12 @@ int i915lightup(unsigned int pphysbase, unsigned int pmmio, 2. Developer/Recovery mode: Set up a tasteful color so people know we are alive. */ if (init_fb || show_test) { - set_translation_table(0, FRAME_BUFFER_PAGES, physbase, 4096); - memset((void *)graphics, 0x55, FRAME_BUFFER_PAGES*4096); + set_translation_table(0, FRAME_BUFFER_PAGES, dp->physbase, + 4096); + memset((void *)dp->graphics, 0x55, FRAME_BUFFER_PAGES*4096); } else { - set_translation_table(0, FRAME_BUFFER_PAGES, physbase, 0); - memset((void*)graphics, 0, 4096); + set_translation_table(0, FRAME_BUFFER_PAGES, dp->physbase, 0); + memset((void*)dp->graphics, 0, 4096); } dp->address = 0x50; @@ -279,13 +265,14 @@ int i915lightup(unsigned int pphysbase, unsigned int pmmio, printk(BIOS_SPEW, "ha=%d, va=%d\n",dp->edid.ha, dp->edid.va); test_gfx(dp); - set_vbe_mode_info_valid(&dp->edid, graphics); + set_vbe_mode_info_valid(&dp->edid, (uintptr_t)dp->graphics); i915_init_done = 1; return 1; fail: printk(BIOS_SPEW, "Graphics could not be started;"); - if (0 && must_cycle_power){ + /* unclear we will *ever* want to do this. */ + if (0){ printk(BIOS_SPEW, "Turn off power and wait ..."); gtt_write(PCH_PP_CONTROL,0xabcd0000); udelay(600000); diff --git a/src/mainboard/google/peppy/i915io.c b/src/mainboard/google/peppy/i915io.c index 693aed5..cf84004 100644 --- a/src/mainboard/google/peppy/i915io.c +++ b/src/mainboard/google/peppy/i915io.c @@ -60,7 +60,7 @@ void runio(struct intel_dp *dp, int verbose) mainboard_set_port_clk_dp(dp); gtt_write(DSPSTRIDE(dp->plane),dp->stride); - gtt_write(DSPCNTR(dp->plane),DISPLAY_PLANE_ENABLE|DISPPLANE_RGBX888); + gtt_write(DSPCNTR(dp->plane),DISPLAY_PLANE_ENABLE|DISPPLANE_BGRX888); gtt_write(DEIIR,0x00000080); intel_dp_wait_reg(DEIIR, 0x00000000); @@ -132,7 +132,7 @@ void runio(struct intel_dp *dp, int verbose) intel_dp_wait_reg(DEIIR, 0x00000000); gtt_write(DSPSTRIDE(dp->plane),dp->stride); - gtt_write(DSPCNTR(dp->plane),DISPLAY_PLANE_ENABLE | DISPPLANE_RGBX888); + gtt_write(DSPCNTR(dp->plane),DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); gtt_write(PCH_PP_CONTROL,EDP_BLC_ENABLE | EDP_BLC_ENABLE | PANEL_POWER_ON); diff --git a/src/mainboard/google/slippy/Kconfig b/src/mainboard/google/slippy/Kconfig index 341e5bf..88bf501 100644 --- a/src/mainboard/google/slippy/Kconfig +++ b/src/mainboard/google/slippy/Kconfig @@ -18,8 +18,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy select MAINBOARD_HAS_CHROMEOS select EXTERNAL_MRC_BLOB select MONOTONIC_TIMER_MSR - select MAINBOARD_HAS_NATIVE_VGA_INIT - select MAINBOARD_DO_NATIVE_VGA_INIT select INTEL_DP select INTEL_DDI select INTEL_INT15 diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c index 8be25e7..015eabe 100644 --- a/src/northbridge/intel/haswell/gma.c +++ b/src/northbridge/intel/haswell/gma.c @@ -426,21 +426,18 @@ static void gma_pm_init_post_vbios(struct device *dev) static void gma_func0_init(struct device *dev) { +#if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT + struct northbridge_intel_haswell_config *conf = dev->chip_info; + struct intel_dp dp; +#endif + int lightup_ok = 0; u32 reg32; - u32 graphics_base; //, graphics_size; /* IGD needs to be Bus Master */ reg32 = pci_read_config32(dev, PCI_COMMAND); reg32 |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY | PCI_COMMAND_IO; pci_write_config32(dev, PCI_COMMAND, reg32); - - /* the BAR for graphics space is a well known number for - * sandy and ivy. And the resource code renumbers it. - * So it's almost like having two hardcodes. - */ - graphics_base = dev->resource_list[1].base; - /* Init graphics power management */ gma_pm_init_pre_vbios(dev); @@ -449,17 +446,25 @@ static void gma_func0_init(struct device *dev) #if CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT printk(BIOS_SPEW, "NATIVE graphics, run native enable\n"); - u32 mmiobase, physbase; /* Default set to 1 since it might be required for stuff like seabios */ unsigned int init_fb = 1; - mmiobase = dev->resource_list[0].base; - physbase = pci_read_config32(dev, 0x5c) & ~0xf; + + /* the BAR for graphics space is a well known number for + * sandy and ivy. And the resource code renumbers it. + * So it's almost like having two hardcodes. + */ + dp.graphics = (void *)((uintptr_t)dev->resource_list[1].base); + dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf; + dp.panel_power_down_delay = conf->gpu_panel_power_down_delay; + dp.panel_power_up_delay = conf->gpu_panel_power_up_delay; + dp.panel_power_cycle_delay = conf->gpu_panel_power_cycle_delay; + + dp.physbase = pci_read_config32(dev, 0x5c) & ~0xf; #ifdef CONFIG_CHROMEOS init_fb = developer_mode_enabled() || recovery_mode_enabled(); #endif - lightup_ok = i915lightup(physbase, mmiobase, graphics_base, init_fb); - if (lightup_ok) + lightup_ok = panel_lightup(&dp, init_fb); gfx_set_init_done(1); #endif if (! lightup_ok) {

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coreboot-gerrit September 2014