the following patch was just integrated into master:
commit 2120e0e200d41e4b29d5e035d8ae5c219a54c495
Author: Ronald G. Minnich <rminnich(a)google.com>
Date: Wed Oct 9 15:53:43 2013 -0700
FALCO: stop using the slippy graphics code
It's time to start cleaning up the falco graphics code, but it needs
to have its own files, not slippy's.
Change-Id: I7dbe27eafbf247b5c7806819bf0059d8b10e842c
Signed-off-by: Ronald G. Minnich <rminnich(a)google.com>
Reviewed-on: https://chromium-review.googlesource.com/172501
Tested-by: Ronald Minnich <rminnich(a)chromium.org>
Reviewed-by: Stefan Reinauer <reinauer(a)google.com>
Commit-Queue: David Hendricks <dhendrix(a)chromium.org>
(cherry picked from commit 262a0c16a39871d14972a92bff2dbc24de2ca3f0)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6832
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/6832 for details.
-gerrit
the following patch was just integrated into master:
commit 79634759e5961c1c2538b1f96b97bbda277f5db0
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Sun Oct 13 10:57:50 2013 +0800
samus: Disable SMBus controller
Nothing is connected to this port.
Change-Id: If3e466a3053fa694a511c2335c16381f77f56f47
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174089
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
(cherry picked from commit 5ddb6a444d5c3141868eaf618ecb014b0262a796)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6827
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/6827 for details.
-gerrit
the following patch was just integrated into master:
commit d68932463f0a5c23ebe19cce4465ed5a17dbb5eb
Author: Isaac Christensen <isaac.christensen(a)se-eng.com>
Date: Wed Sep 3 15:34:05 2014 -0600
tegra124: return the UART base address based on index
Change-Id: I73a8e56559c7ffdaab39a5c19311221c91565004
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6830
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/6830 for details.
-gerrit
the following patch was just integrated into master:
commit 33e295e66fe6fa5d7f2fead3bbbe30b6bfd5dca4
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Tue Oct 22 16:37:39 2013 -0700
samus: Tweaks from bringup
- GPIO29 is no longer connected so we don't need the SMI workaround
on the entry to sleep states.
- Disable touchscreen wake source until the kernel driver is working
so it does not wake immediately.
- Update a few GPIOs and disable the codec for now as it is leaking
into the 1.8V DDR rail.
Change-Id: Ia67b17eb4a097627befd8f39aadc939da1bf3d40
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174122
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
(cherry picked from commit 0fdc9a83a434378499f825d072ce0adba5ffda59)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6829
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/6829 for details.
-gerrit
the following patch was just integrated into master:
commit fe74092c4e802efbed76804fb43f0bd25a5721b2
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Tue Oct 22 16:35:12 2013 -0700
samus: Fix up memory SPD information
The LPDDR3 memory is x32 and dual rank with 14 row bits.
In addition the memory is actually elpida, even though
they are owned by micron it is confusing to label it as such.
And the ram strap options were inverted from what I expected
so the memory table needs to be updated.
Change-Id: Ia29a23e8140d884fb84f940806f041b40562aab9
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174121
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
(cherry picked from commit 0d63d36b8035165f95db798ed40488519e622a65)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6828
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/6828 for details.
-gerrit
Isaac Christensen (isaac.christensen(a)se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6827
-gerrit
commit 38366c11f2ae8d7aa95f368040dd7384df8c1280
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Sun Oct 13 10:57:50 2013 +0800
samus: Disable SMBus controller
Nothing is connected to this port.
Change-Id: If3e466a3053fa694a511c2335c16381f77f56f47
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174089
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
(cherry picked from commit 5ddb6a444d5c3141868eaf618ecb014b0262a796)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
---
src/mainboard/google/samus/devicetree.cb | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/google/samus/devicetree.cb b/src/mainboard/google/samus/devicetree.cb
index 64d7ebe..f848edc 100644
--- a/src/mainboard/google/samus/devicetree.cb
+++ b/src/mainboard/google/samus/devicetree.cb
@@ -114,7 +114,7 @@ chip northbridge/intel/haswell
end
end # LPC bridge
device pci 1f.2 on end # SATA Controller
- device pci 1f.3 on end # SMBus
+ device pci 1f.3 off end # SMBus
device pci 1f.6 on end # Thermal
end
end
the following patch was just integrated into master:
commit 50fc0b4cabcff9680aa53aaeaf1a54dc8e7d12de
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Sun Oct 13 10:57:01 2013 +0800
samus: Add onboard device configuration
Change-Id: Ib7b6688982e9f74cffe40d11d4a9ec69acd55d37
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174088
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
(cherry picked from commit 41624b073fb59b1372ee5a8eba3ed64c7e633311)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6826
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Ronald G. Minnich <rminnich(a)gmail.com>
See http://review.coreboot.org/6826 for details.
-gerrit
the following patch was just integrated into master:
commit 1eca1d4e15c254b1f63336b991bf1a81b70712c0
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Sat Oct 12 11:50:05 2013 +0800
samus: Change thermal behavior to match other haswell platforms
Change-Id: Ia835f16b156949f1841210c4a469223d5df28a54
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/174087
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
(cherry picked from commit 8e51d1d74cdcadde9cbf10e8321d601b099c46bc)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6825
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/6825 for details.
-gerrit
the following patch was just integrated into master:
commit 51edd54738b2248e92580caa317aa4e8e1694d40
Author: Gabe Black <gabeblack(a)google.com>
Date: Mon Sep 30 23:00:33 2013 -0700
ARM: Generalize armv7 as arm.
There are ARM systems which are essentially heterogeneous multicores where
some cores implement a different ARM architecture version than other cores. A
specific example is the tegra124 which boots on an ARMv4 coprocessor while
most code, including most of the firmware, runs on the main ARMv7 core. To
support SOCs like this, the plan is to generalize the ARM architecture so that
all versions are available, and an SOC/CPU can then select what architecture
variant should be used for each component of the firmware; bootblock,
romstage, and ramstage.
Old-Change-Id: I22e048c3bc72bd56371e14200942e436c1e312c2
Signed-off-by: Gabe Black <gabeblack(a)google.com>
Reviewed-on: https://chromium-review.googlesource.com/171338
Reviewed-by: Gabe Black <gabeblack(a)chromium.org>
Commit-Queue: Gabe Black <gabeblack(a)chromium.org>
Tested-by: Gabe Black <gabeblack(a)chromium.org>
(cherry picked from commit 8423a41529da0ff67fb9873be1e2beb30b09ae2d)
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
ARM: Split out ARMv7 code and make it possible to have other arch versions.
We don't always want to use ARMv7 code when building for ARM, so we should
separate out the ARMv7 code so it can be excluded, and also make it possible
to include code for some other version of the architecture instead, all per
build component for cases where we need more than one architecture version
at a time.
The tegra124 bootblock will ultimately need to be ARMv4, but until we have
some ARMv4 code to switch over to we can leave it set to ARMv7.
Old-Change-Id: Ia982c91057fac9c252397b7c866224f103761cc7
Reviewed-on: https://chromium-review.googlesource.com/171400
Reviewed-by: Gabe Black <gabeblack(a)chromium.org>
Tested-by: Gabe Black <gabeblack(a)chromium.org>
Commit-Queue: Gabe Black <gabeblack(a)chromium.org>
(cherry picked from commit 799514e6060aa97acdcf081b5c48f965be134483)
Squashed two related patches for splitting ARM support into general
ARM support and ARMv7 specific pieces.
Change-Id: Ic6511507953a2223c87c55f90252c4a4e1dd6010
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6782
Tested-by: build bot (Jenkins)
See http://review.coreboot.org/6782 for details.
-gerrit
the following patch was just integrated into master:
commit 94b4a266fb4df1f2f59ed8052c150ee4bf3e6d41
Author: Isaac Christensen <isaac.christensen(a)se-eng.com>
Date: Thu Sep 4 11:17:56 2014 -0600
nvidia-cbootimage: add submodule
Change-Id: I3ad8eed42255db426987065190c197baead40673
Signed-off-by: Isaac Christensen <isaac.christensen(a)se-eng.com>
Reviewed-on: http://review.coreboot.org/6836
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See http://review.coreboot.org/6836 for details.
-gerrit