coreboot-gerrit February 2014

coreboot-gerrit@coreboot.org

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1135 discussions

Patch merged into coreboot/master: 2c41dc9 baytrail: make default GPIO configs closer to power-on defaults
by gerrit＠coreboot.org 11 Feb '14

11 Feb '14

the following patch was just integrated into master: commit 2c41dc9a1035fdc8a4f961bbca6e06011f3bd4df Author: Shawn Nematbakhsh <shawnn(a)chromium.org> Date: Fri Oct 4 11:47:21 2013 -0700 baytrail: make default GPIO configs closer to power-on defaults - Set config0 defaults for hysteresis disable, pad bypass, etc. - Set config1 power-on defaults. - Set pad_val for input as default. BUG=chrome-os-partner:22863 TEST=Manual. Enable GPIO_DEBUG and verify pad registers are set according to expectation. Also verify bayleybay still boots to payload loading. Change-Id: I0f1c9e4d4f39c5c56d7e14a82eb4825612e19420 Reviewed-on: https://chromium-review.googlesource.com/171903 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Commit-Queue: Shawn Nematbakhsh <shawnn(a)chromium.org> Signed-off-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Tested-by: Shawn Nematbakhsh <shawnn(a)chromium.org> Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> See http://review.coreboot.org/4866 for details. -gerrit

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Patch merged into coreboot/master: 452390b SMP: Add arch-agnostic boot_cpu()
by gerrit＠coreboot.org 11 Feb '14

11 Feb '14

the following patch was just integrated into master: commit 452390b0fe6452fbfa0beaff65dce3ff81f130ea Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Jan 26 14:41:54 2014 +0200 SMP: Add arch-agnostic boot_cpu() We should not have x86 specific includes in lib/. Change-Id: I18fa9c8017d65c166ffd465038d71f35b30d6f3d Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/5156 for details. -gerrit

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Patch merged into coreboot/master: b927d95 Move hexdump32() to lib/hexdump.
by gerrit＠coreboot.org 11 Feb '14

11 Feb '14

the following patch was just integrated into master: commit b927d95a3a940cd21d84a63f5ba15f742b256248 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Jan 26 14:44:18 2014 +0200 Move hexdump32() to lib/hexdump. Needs printk and is not a console core function. Change-Id: Id90a363eca133af4469663c1e8b504baa70471e0 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> See http://review.coreboot.org/5155 for details. -gerrit

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Patch merged into coreboot/master: d660985 Kconfig: Move vendorcode menu up from the bottom to above Chipset menu
by gerrit＠coreboot.org 11 Feb '14

11 Feb '14

the following patch was just integrated into master: commit d660985218c90592df1c0e0dfa6af89898e273cc Author: Peter Stuge <peter(a)stuge.se> Date: Fri Feb 7 03:58:24 2014 +0100 Kconfig: Move vendorcode menu up from the bottom to above Chipset menu Change-Id: Ic97a497a634533f44d94df297ca6e35d94c34565 Signed-off-by: Peter Stuge <peter(a)stuge.se> See http://review.coreboot.org/5160 for details. -gerrit

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Patch set updated for coreboot: 13f65f0 cbfstool/lzma: Remove dead code under #ifdefs
by Alexandru Gagniuc 11 Feb '14

11 Feb '14

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5083 -gerrit commit 13f65f0e4ef0075193314abb3b70d26497a0f5eb Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Wed Jan 29 16:50:40 2014 -0600 cbfstool/lzma: Remove dead code under #ifdefs Remove a bunch of dead code which depends either on commented out #defines, or compiler definitions. Use this opportunity to remove the need for "-D_7ZIP_ST" in the compiler flags. Change-Id: Ib6629002be7bf4cee6d95d7baa724893b5e8ba32 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- util/cbfstool/Makefile | 1 - util/cbfstool/Makefile.inc | 2 +- util/cbfstool/lzma/C/LzmaEnc.c | 128 +---------------------------------------- 3 files changed, 2 insertions(+), 129 deletions(-) diff --git a/util/cbfstool/Makefile b/util/cbfstool/Makefile index 0df5c97..bc49c64 100644 --- a/util/cbfstool/Makefile +++ b/util/cbfstool/Makefile @@ -2,7 +2,6 @@ obj ?= $(shell pwd) HOSTCC ?= $(CC) CFLAGS ?= -g -CFLAGS += -D_7ZIP_ST CFLAGS += -Wall -Wundef -Wstrict-prototypes -Wmissing-prototypes CFLAGS += -Wwrite-strings -Wredundant-decls -Wno-trigraphs CFLAGS += -Wstrict-aliasing -Werror diff --git a/util/cbfstool/Makefile.inc b/util/cbfstool/Makefile.inc index f3596fb..c19b7d9 100644 --- a/util/cbfstool/Makefile.inc +++ b/util/cbfstool/Makefile.inc @@ -17,7 +17,7 @@ cbfsobj += LzmaEnc.o cbfsobj += linux_trampoline.o cbfsobj += cbfs-payload-linux.o -CBFSTOOLFLAGS=-D_7ZIP_ST -g +CBFSTOOLFLAGS= -g ifeq ($(shell uname -s | cut -c-7 2>/dev/null), MINGW32) CBFSTOOLFLAGS+=-mno-ms-bitfields diff --git a/util/cbfstool/lzma/C/LzmaEnc.c b/util/cbfstool/lzma/C/LzmaEnc.c index 583b455..e7d14c5 100644 --- a/util/cbfstool/lzma/C/LzmaEnc.c +++ b/util/cbfstool/lzma/C/LzmaEnc.c @@ -3,23 +3,9 @@ #include <string.h> -/* #define SHOW_STAT */ -/* #define SHOW_STAT2 */ - -#if defined(SHOW_STAT) || defined(SHOW_STAT2) -#include <stdio.h> -#endif - #include "LzmaEnc.h" #include "LzFind.h" -#ifndef _7ZIP_ST -#include "LzFindMt.h" -#endif - -#ifdef SHOW_STAT -static int ttt = 0; -#endif #define kBlockSizeMax ((1 << LZMA_NUM_BLOCK_SIZE_BITS) - 1) @@ -65,12 +51,7 @@ void LzmaEncProps_Normalize(struct CLzmaEncProps *p) if (p->numHashBytes < 0) p->numHashBytes = 4; if (p->mc == 0) p->mc = (16 + (p->fb >> 1)) >> (p->btMode ? 0 : 1); if (p->numThreads < 0) - p->numThreads = - #ifndef _7ZIP_ST - ((p->btMode && p->algo) ? 2 : 1); - #else - 1; - #endif + p->numThreads = 1; } uint32_t LzmaEncProps_GetDictSize(const struct CLzmaEncProps *props2) @@ -80,27 +61,6 @@ uint32_t LzmaEncProps_GetDictSize(const struct CLzmaEncProps *props2) return props.dictSize; } -/* #define LZMA_LOG_BSR */ -/* Define it for Intel's CPU */ - - -#ifdef LZMA_LOG_BSR - -#define kDicLogSizeMaxCompress 30 - -#define BSR2_RET(pos, res) { unsigned long i; _BitScanReverse(&i, (pos)); res = (i + i) + ((pos >> (i - 1)) & 1); } - -uint32_t GetPosSlot1(uint32_t pos) -{ - uint32_t res; - BSR2_RET(pos, res); - return res; -} -#define GetPosSlot2(pos, res) { BSR2_RET(pos, res); } -#define GetPosSlot(pos, res) { if (pos < 2) res = pos; else BSR2_RET(pos, res); } - -#else - #define kNumLogBits (9 + (int)sizeof(size_t) / 2) #define kDicLogSizeMaxCompress ((kNumLogBits - 1) * 2 + 7) @@ -132,9 +92,6 @@ static void LzmaEnc_FastPosInit(uint8_t *g_FastPos) #define GetPosSlot2(pos, res) { BSR2_RET(pos, res); } #define GetPosSlot(pos, res) { if (pos < kNumFullDistances) res = p->g_FastPos[pos]; else BSR2_RET(pos, res); } -#endif - - #define LZMA_NUM_REPS 4 typedef unsigned CState; @@ -256,17 +213,8 @@ struct CLzmaEnc struct IMatchFinder matchFinder; void *matchFinderObj; - #ifndef _7ZIP_ST - bool mtMode; - CMatchFinderMt matchFinderMt; - #endif - struct CMatchFinder matchFinderBase; - #ifndef _7ZIP_ST - uint8_t pad[128]; - #endif - uint32_t optimumEndIndex; uint32_t optimumCurrentIndex; @@ -425,17 +373,6 @@ SRes LzmaEnc_SetProps(CLzmaEncHandle pp, const struct CLzmaEncProps *props2) p->writeEndMark = props.writeEndMark; - #ifndef _7ZIP_ST - /* - if (newMultiThread != _multiThread) - { - ReleaseMatchFinder(); - _multiThread = newMultiThread; - } - */ - p->multiThread = (props.numThreads > 1); - #endif - return SZ_OK; } @@ -799,10 +736,6 @@ static void LenEnc_Encode2(struct CLenPriceEnc *p, struct CRangeEnc *rc, uint32_ static void MovePos(struct CLzmaEnc *p, uint32_t num) { - #ifdef SHOW_STAT - ttt += num; - printf("\n MovePos %d", num); - #endif if (num != 0) { p->additionalOffset += num; @@ -815,15 +748,6 @@ static uint32_t ReadMatchDistances(struct CLzmaEnc *p, uint32_t *numDistancePair uint32_t lenRes = 0, numPairs; p->numAvail = p->matchFinder.GetNumAvailableBytes(p->matchFinderObj); numPairs = p->matchFinder.GetMatches(p->matchFinderObj, p->matches); - #ifdef SHOW_STAT - printf("\n i = %d numPairs = %d ", ttt, numPairs / 2); - ttt++; - { - uint32_t i; - for (i = 0; i < numPairs; i += 2) - printf("%2d %6d | ", p->matches[i], p->matches[i + 1]); - } - #endif if (numPairs > 0) { lenRes = p->matches[numPairs - 2]; @@ -1108,16 +1032,6 @@ static uint32_t GetOptimum(struct CLzmaEnc *p, uint32_t position, uint32_t *back cur = 0; - #ifdef SHOW_STAT2 - if (position >= 0) - { - unsigned i; - printf("\n pos = %4X", position); - for (i = cur; i <= lenEnd; i++) - printf("\nprice[%4X] = %d", position - cur + i, p->opt[i].price); - } - #endif - for (;;) { uint32_t numAvailFull, newLen, posPrev, state, startLen; @@ -1669,10 +1583,6 @@ static void LzmaEnc_Construct(struct CLzmaEnc *p) { RangeEnc_Construct(&p->rc); MatchFinder_Construct(&p->matchFinderBase); - #ifndef _7ZIP_ST - MatchFinderMt_Construct(&p->matchFinderMt); - p->matchFinderMt.MatchFinder = &p->matchFinderBase; - #endif { struct CLzmaEncProps props; @@ -1708,9 +1618,6 @@ static void LzmaEnc_FreeLits(struct CLzmaEnc *p, struct ISzAlloc *alloc) static void LzmaEnc_Destruct(struct CLzmaEnc *p, struct ISzAlloc *alloc, struct ISzAlloc *allocBig) { - #ifndef _7ZIP_ST - MatchFinderMt_Destruct(&p->matchFinderMt, allocBig); - #endif MatchFinder_Free(&p->matchFinderBase, allocBig); LzmaEnc_FreeLits(p, alloc); RangeEnc_Free(&p->rc, alloc); @@ -1763,10 +1670,6 @@ static SRes LzmaEnc_CodeOneBlock(struct CLzmaEnc *p, bool useLimits, uint32_t ma else len = GetOptimum(p, nowPos32, &pos); - #ifdef SHOW_STAT2 - printf("\n pos = %4X, len = %d pos = %d", nowPos32, len, pos); - #endif - posState = nowPos32 & p->pbMask; if (len == 1 && pos == (uint32_t)-1) { @@ -1889,15 +1792,8 @@ static SRes LzmaEnc_CodeOneBlock(struct CLzmaEnc *p, bool useLimits, uint32_t ma static SRes LzmaEnc_Alloc(struct CLzmaEnc *p, uint32_t keepWindowSize, struct ISzAlloc *alloc, struct ISzAlloc *allocBig) { uint32_t beforeSize = kNumOpts; - #ifndef _7ZIP_ST - bool btMode; - #endif if (!RangeEnc_Alloc(&p->rc, alloc)) return SZ_ERROR_MEM; - #ifndef _7ZIP_ST - btMode = (p->matchFinderBase.btMode != 0); - p->mtMode = (p->multiThread && !p->fastMode && btMode); - #endif { unsigned lclp = p->lc + p->lp; @@ -1920,15 +1816,6 @@ static SRes LzmaEnc_Alloc(struct CLzmaEnc *p, uint32_t keepWindowSize, struct IS if (beforeSize + p->dictSize < keepWindowSize) beforeSize = keepWindowSize - p->dictSize; - #ifndef _7ZIP_ST - if (p->mtMode) - { - RINOK(MatchFinderMt_Create(&p->matchFinderMt, p->dictSize, beforeSize, p->numFastuint8_ts, LZMA_MATCH_LEN_MAX, allocBig)); - p->matchFinderObj = &p->matchFinderMt; - MatchFinderMt_CreateVTable(&p->matchFinderMt, &p->matchFinder); - } - else - #endif { if (!MatchFinder_Create(&p->matchFinderBase, p->dictSize, beforeSize, p->numFastuint8_ts, LZMA_MATCH_LEN_MAX, allocBig)) return SZ_ERROR_MEM; @@ -2067,13 +1954,7 @@ static SRes LzmaEnc_MemPrepare(CLzmaEncHandle pp, const uint8_t *src, size_t src static void LzmaEnc_Finish(CLzmaEncHandle pp) { - #ifndef _7ZIP_ST - CLzmaEnc *p = (CLzmaEnc *)pp; - if (p->mtMode) - MatchFinderMt_ReleaseStream(&p->matchFinderMt); - #else (void)pp; - #endif } struct CSeqOutStreamBuf @@ -2149,13 +2030,6 @@ static SRes LzmaEnc_Encode2(struct CLzmaEnc *p, struct ICompressProgress *progre { SRes res = SZ_OK; - #ifndef _7ZIP_ST - uint8_t allocaDummy[0x300]; - int i = 0; - for (i = 0; i < 16; i++) - allocaDummy[i] = (uint8_t)i; - #endif - for (;;) { res = LzmaEnc_CodeOneBlock(p, false, 0, 0);

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Patch merged into coreboot/master: a381b9f cbfstool/lzma: Remove code which depends on commented out defines
by gerrit＠coreboot.org 11 Feb '14

11 Feb '14

the following patch was just integrated into master: commit a381b9f62b655905b6c28869329e431399e35638 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Wed Jan 29 16:55:48 2014 -0600 cbfstool/lzma: Remove code which depends on commented out defines These options seem to control the behavior of the encoder/decoder, with comments citing a trade-off between memory usage and performance. I removed these in a separate patch to make reverting in the future easier, if we find these options are useful. Change-Id: I24cb7101b89e60f4fb96777e3681c03d2a62e3d5 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/5084 for details. -gerrit

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Patch merged into coreboot/master: 1ceb56a cbfstool: Deserialize CBFS master header when reading image
by gerrit＠coreboot.org 11 Feb '14

11 Feb '14

the following patch was just integrated into master: commit 1ceb56af55fcc55187bffd62d2bd33b4f44601be Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Wed Feb 5 01:10:08 2014 -0600 cbfstool: Deserialize CBFS master header when reading image Rather than using [hn]to[nh] whenever accessing a member of the CBFS header, deserialize the header when opening the CBFS image. The header is no longer a pointer inside the CBFS buffer, but a separate struct, a copy of the original header in a host-friendly format. This kills more of the ntohl usage. Change-Id: I5f8a5818b9d5a2d1152b1906249c4a5847d02bac Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> See http://review.coreboot.org/5121 for details. -gerrit

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Patch set updated for coreboot: 1ff338c cpu/allwinner/a10: Add minimal ramstage driver
by Alexandru Gagniuc 11 Feb '14

11 Feb '14

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4698 -gerrit commit 1ff338c2816a21ff60e43c60526c222982937fe2 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Fri Jan 3 04:24:35 2014 -0500 cpu/allwinner/a10: Add minimal ramstage driver Change-Id: I857755976b17b0e492c086162f395a77933eeed8 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- src/cpu/allwinner/a10/Makefile.inc | 3 +++ src/cpu/allwinner/a10/cbmem.c | 18 ++++++++++++++ src/cpu/allwinner/a10/chip.h | 11 +++++++++ src/cpu/allwinner/a10/cpu.c | 48 ++++++++++++++++++++++++++++++++++++++ src/cpu/allwinner/a10/ram_segs.h | 30 ++++++++++++++++++++++++ 5 files changed, 110 insertions(+) diff --git a/src/cpu/allwinner/a10/Makefile.inc b/src/cpu/allwinner/a10/Makefile.inc index 1b720bf..a86d719 100644 --- a/src/cpu/allwinner/a10/Makefile.inc +++ b/src/cpu/allwinner/a10/Makefile.inc @@ -8,6 +8,7 @@ bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart_console.c romstage-y += bootblock_media.c +romstage-y += cbmem.c romstage-y += clock.c romstage-y += pinmux.c romstage-y += timer.c @@ -16,7 +17,9 @@ romstage-y += uart.c romstage-y += uart_console.c ramstage-y += bootblock_media.c +ramstage-y += cbmem.c ramstage-y += clock.c +ramstage-y += cpu.c ramstage-y += monotonic_timer.c ramstage-y += timer.c ramstage-y += twi.c diff --git a/src/cpu/allwinner/a10/cbmem.c b/src/cpu/allwinner/a10/cbmem.c new file mode 100644 index 0000000..84dc2bf --- /dev/null +++ b/src/cpu/allwinner/a10/cbmem.c @@ -0,0 +1,18 @@ +/* + * Provides cbmem utilities for romstage and ramstage + * + * Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me(a)gmail.com> + * Subject to the GNU GPL v2, or (at your option) any later version. + */ + +#include "ram_segs.h" +#include <cbmem.h> + +#if IS_ENABLED(CONFIG_DYNAMIC_CBMEM) + +void *cbmem_top(void) +{ + return a1x_get_cbmem_top(); +} + +#endif diff --git a/src/cpu/allwinner/a10/chip.h b/src/cpu/allwinner/a10/chip.h new file mode 100644 index 0000000..16f60c0 --- /dev/null +++ b/src/cpu/allwinner/a10/chip.h @@ -0,0 +1,11 @@ +/* + * Allwinnwer A10 devicetree config struct + * + * Copyright (C) 2013 Alexandru Gagniuc <mr.nuke.me(a)gmail.com> + * Subject to the GNU GPL v2, or (at your option) any later version. + */ + +#include <types.h> + +struct cpu_allwinner_a10_config { +}; diff --git a/src/cpu/allwinner/a10/cpu.c b/src/cpu/allwinner/a10/cpu.c new file mode 100644 index 0000000..e0d4cdf --- /dev/null +++ b/src/cpu/allwinner/a10/cpu.c @@ -0,0 +1,48 @@ +/* + * Ramstage initialization for Allwinner CPUs + * + * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me(a)gmail.com> + * Subject to the GNU GPL v2, or (at your option) any later version. + */ + +#include <console/console.h> +#include <device/device.h> +#include <cpu/cpu.h> +#include <cbmem.h> + + +static void cpu_enable_resources(device_t dev) +{ + ram_resource(dev, 0, CONFIG_SYS_SDRAM_BASE >> 10, + CONFIG_DRAM_SIZE_MB << 10); + /* TODO: Declare CBFS cache as reserved? There's no guarantee we won't + * overwrite it. It seems to stay intact, being so high in RAM + */ +} + +static void cpu_init(device_t dev) +{ + /* TODO: Check if anything else needs to be explicitly initialized */ +} + +static void cpu_noop(device_t dev) +{ +} + +static struct device_operations cpu_ops = { + .read_resources = cpu_noop, + .set_resources = cpu_noop, + .enable_resources = cpu_enable_resources, + .init = cpu_init, + .scan_bus = NULL, +}; + +static void a1x_cpu_enable_dev(device_t dev) +{ + dev->ops = &cpu_ops; +} + +struct chip_operations cpu_allwinner_a10_ops = { + CHIP_NAME("CPU Allwinner A10") + .enable_dev = a1x_cpu_enable_dev, +}; diff --git a/src/cpu/allwinner/a10/ram_segs.h b/src/cpu/allwinner/a10/ram_segs.h new file mode 100644 index 0000000..45141fe --- /dev/null +++ b/src/cpu/allwinner/a10/ram_segs.h @@ -0,0 +1,30 @@ +/* + * How we use DRAM on Allwinner CPUs + * + * Copyright (C) 2014 Alexandru Gagniuc <mr.nuke.me(a)gmail.com> + * Subject to the GNU GPL v2, or (at your option) any later version. + */ + +#include <config.h> + +/* + * Put CBMEM at top of RAM + */ +static inline void *a1x_get_cbmem_top(void) +{ + return (void *)CONFIG_SYS_SDRAM_BASE + (CONFIG_DRAM_SIZE_MB << 20); +} + +/* + * By CBFS cache, we mean a cached copy, in RAM, of the entire CBFS region. + */ +static inline void *a1x_get_cbfs_cache_top(void) +{ + /* Arbitrary 16 MiB gap for cbmem tables and bouncebuffer */ + return a1x_get_cbmem_top() - (16 << 20); +} + +static inline void *a1x_get_cbfs_cache_base(void) +{ + return a1x_get_cbfs_cache_top() - CONFIG_ROM_SIZE; +}

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Patch set updated for coreboot: 4e11b44 cubieboard: Enable the SD controller and mux SD pins
by Alexandru Gagniuc 11 Feb '14

11 Feb '14

Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4745 -gerrit commit 4e11b448206c4afaa87a8828b91697fa7e326192 Author: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> Date: Sat Dec 28 15:10:28 2013 -0500 cubieboard: Enable the SD controller and mux SD pins This step needs to be done before calling any MMC functionality. Change-Id: I88763072c8a541ddba794e79fb55e82eb2f187a9 Signed-off-by: Alexandru Gagniuc <mr.nuke.me(a)gmail.com> --- src/cpu/allwinner/a10/clock.h | 10 ++++++++++ src/mainboard/cubietech/cubieboard/bootblock.c | 15 +++++++++++++++ 2 files changed, 25 insertions(+) diff --git a/src/cpu/allwinner/a10/clock.h b/src/cpu/allwinner/a10/clock.h index 0be736c..0a9cfd6 100644 --- a/src/cpu/allwinner/a10/clock.h +++ b/src/cpu/allwinner/a10/clock.h @@ -66,6 +66,16 @@ /* DRAM_CLK values*/ #define DRAM_CTRL_DCLK_OUT (1 << 15) +/* SDx_CLK values */ +#define SDx_CLK_GATE (1 << 31) +#define SDx_CLK_SRC_MASK (3 << 24) +#define SDx_CLK_SRC_OSC24M (0 << 24) +#define SDx_CLK_SRC_PLL6 (1 << 24) +#define SDx_CLK_SRC_PLL5 (2 << 24) +#define SDx_RAT_EXP_N_MASK (3 << 16) +#define SDx_RAT_EXP_N(n) (((n) << 16) & SDx_RAT_EXP_N_MASK) +#define SDx_RAT_M_MASK (0xf << 0) +#define SDx_RAT_M(m) ((((m) - 1) << 0) & SDx_RAT_M_MASK) /** * \brief Clock gating definitions * diff --git a/src/mainboard/cubietech/cubieboard/bootblock.c b/src/mainboard/cubietech/cubieboard/bootblock.c index 2e5929c..c994c57 100644 --- a/src/mainboard/cubietech/cubieboard/bootblock.c +++ b/src/mainboard/cubietech/cubieboard/bootblock.c @@ -27,6 +27,10 @@ #define GPB_UART0_FUNC 2 #define GPB_UART0_PINS ((1 << 22) | (1 << 23)) +#define GPF_SD0_FUNC 2 +#define GPF_SD0_PINS 0x3f /* PF0 thru PF5 */ +#define GPH1_SD0_DET_FUNC 5 + static void cubieboard_set_sys_clock(void) { u32 reg32; @@ -60,6 +64,13 @@ static void cubieboard_setup_clocks(void) write32(APB1_CLK_SRC_OSC24M | APB1_RAT_N(0) | APB1_RAT_M(0), &ccm->apb1_clk_div_cfg); + /* Configure the clock for SD0 */ + write32(SDx_CLK_GATE | SDx_CLK_SRC_OSC24M | SDx_RAT_EXP_N(0) + | SDx_RAT_M(1), &ccm->sd0_clk_cfg); + + /* Enable clock to SD0 */ + a1x_periph_clock_enable(A1X_CLKEN_MMC0); + } static void cubieboard_setup_gpios(void) @@ -71,6 +82,10 @@ static void cubieboard_setup_gpios(void) /* Mux UART pins */ gpio_set_multipin_func(GPB, GPB_UART0_PINS, GPB_UART0_FUNC); + + /* Mux SD pins */ + gpio_set_multipin_func(GPF, GPF_SD0_PINS, GPF_SD0_FUNC); + gpio_set_pin_func(GPH, 1, GPH1_SD0_DET_FUNC); } static void cubieboard_enable_uart(void)

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New patch to review for coreboot: 5a9c081 falco: Add ACPI code to describe the I2C touchpad device
by Duncan Laurie 11 Feb '14

11 Feb '14

Duncan Laurie (dlaurie(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5194 -gerrit commit 5a9c0814ff5d2064e17f4696ac05ab6dce8404aa Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue Feb 11 10:43:21 2014 -0800 falco: Add ACPI code to describe the I2C touchpad device If the SerialIO devices are put into ACPI mode then it is possible to use ACPI to instantiate the touchpad in the kernel without needing to have a platform level driver to do the binding. This is the "new way" of describing on-board I2C devices and the upstream kernel is starting to add ACPI IDs to drivers so they can be used in this fashion. For the Cypress touchpad use a generic ACPI ID of "CYPA0000" to describe it. In order to support the proper scoping of the touchpad device under the appropriate I2C controller device the mainboard.asl file needs to be included after pch.asl so the I2C device exists. Change-Id: I81e053d27be478f3a19b6f9b13cd2b4fabcb88c0 Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/mainboard/google/falco/acpi/mainboard.asl | 34 +++++++++++++++++++++++++++ src/mainboard/google/falco/dsdt.asl | 4 +++- 2 files changed, 37 insertions(+), 1 deletion(-) diff --git a/src/mainboard/google/falco/acpi/mainboard.asl b/src/mainboard/google/falco/acpi/mainboard.asl index 84e8a25..8d27cb9 100644 --- a/src/mainboard/google/falco/acpi/mainboard.asl +++ b/src/mainboard/google/falco/acpi/mainboard.asl @@ -108,3 +108,37 @@ Scope (\_SB) } } } + +Scope (\_SB.PCI0.I2C0) +{ + Device (CYPA) + { + Name (_HID, "CYPA0000") + Name (_DDN, "Cypress Touchpad") + Name (_UID, 1) + + Name (_CRS, ResourceTemplate() + { + I2cSerialBus ( + BOARD_TRACKPAD_I2C_ADDR, // SlaveAddress + ControllerInitiated, // SlaveMode + 400000, // ConnectionSpeed + AddressingMode7Bit, // AddressingMode + "\\_SB.PCI0.I2C0", // ResourceSource + ) + Interrupt (ResourceConsumer, Edge, ActiveLow) + { + BOARD_TRACKPAD_IRQ + } + }) + + Method (_STA) + { + If (LEqual (\S1EN, 1)) { + Return (0xF) + } Else { + Return (0x0) + } + } + } +} diff --git a/src/mainboard/google/falco/dsdt.asl b/src/mainboard/google/falco/dsdt.asl index 1316ebf..718d515 100644 --- a/src/mainboard/google/falco/dsdt.asl +++ b/src/mainboard/google/falco/dsdt.asl @@ -31,7 +31,6 @@ DefinitionBlock( { // Some generic macros #include "acpi/platform.asl" - #include "acpi/mainboard.asl" // global NVS and variables #include <southbridge/intel/lynxpoint/acpi/globalnvs.asl> @@ -50,6 +49,9 @@ DefinitionBlock( } } + // Mainboard specific + #include "acpi/mainboard.asl" + // Thermal handler #include "acpi/thermal.asl"

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coreboot-gerrit February 2014