coreboot-gerrit February 2014

coreboot-gerrit@coreboot.org

1 participants
1135 discussions

Patch merged into coreboot/master: 476986e winbond/w83627hf/acpi: Fix some ASL warnings
by gerrit＠coreboot.org 12 Feb '14

12 Feb '14

the following patch was just integrated into master: commit 476986e4e4493dd773f3ea4df83d3287e47a9f02 Author: Oskar Enoksson <enok(a)lysator.liu.se> Date: Tue Feb 11 23:20:14 2014 +0100 winbond/w83627hf/acpi: Fix some ASL warnings There were ASL compiler warnings about "Size mismatch". This commit eliminates the warnings by changing the ASL declarations of those fields. Change-Id: If851ed4892ef6c96acbff861abd7001ab67d9d66 Signed-off-by: Oskar Enoksson <enok(a)lysator.liu.se> See http://review.coreboot.org/5190 for details. -gerrit

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Patch merged into coreboot/master: f167b42 utils/crossgcc: Refactor Makefiles for separate arm/i386.
by gerrit＠coreboot.org 12 Feb '14

12 Feb '14

the following patch was just integrated into master: commit f167b421e6ff96278d20d94a49f48f6c92972348 Author: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> Date: Sat Nov 2 03:40:39 2013 +1100 utils/crossgcc: Refactor Makefiles for separate arm/i386. Refactor Makefile build system as decompartmentalise armv7a and i386 targets from crossgcc. Change-Id: If93f62050810ba594c9925a9eb8ba9d04bc76459 Signed-off-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com> See http://review.coreboot.org/4008 for details. -gerrit

1 0

Patch set updated for coreboot: c97cc98 PCI: Drop includes under cpu
by Kyösti Mälkki 12 Feb '14

12 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5200 -gerrit commit c97cc980d42f48ab861ee0cae4d5773503bd9aa0 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 12 14:45:02 2014 +0200 PCI: Drop includes under cpu The files affected do not make any PCI configuration calls. If they did, the more correct includes would be pci_ops.h, pci_defs.h and pci_ids.h. Change-Id: I3e7f009371be6ea50318eaabf0c15500cb3f1210 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/amd/agesa/family10/model_10_init.c | 1 - src/cpu/amd/agesa/family12/model_12_init.c | 1 - src/cpu/amd/agesa/family14/model_14_init.c | 1 - src/cpu/amd/agesa/family15/model_15_init.c | 1 - src/cpu/amd/agesa/family15tn/model_15_init.c | 1 - src/cpu/amd/agesa/family16kb/model_16_init.c | 1 - src/cpu/amd/agesa/s3_resume.c | 4 ---- src/cpu/amd/geode_gx1/geode_gx1_init.c | 1 - src/cpu/amd/geode_gx2/cpubug.c | 2 -- src/cpu/amd/geode_gx2/geode_gx2_init.c | 1 - src/cpu/amd/geode_lx/geode_lx_init.c | 1 - src/cpu/intel/ep80579/ep80579_init.c | 1 - src/cpu/intel/fsp_model_206ax/acpi.c | 1 - src/cpu/intel/fsp_model_206ax/model_206ax_init.c | 1 - src/cpu/intel/haswell/acpi.c | 1 - src/cpu/intel/haswell/haswell_init.c | 1 - src/cpu/intel/model_1067x/model_1067x_init.c | 1 - src/cpu/intel/model_106cx/model_106cx_init.c | 1 - src/cpu/intel/model_2065x/acpi.c | 1 - src/cpu/intel/model_2065x/model_2065x_init.c | 1 - src/cpu/intel/model_206ax/acpi.c | 1 - src/cpu/intel/model_206ax/model_206ax_init.c | 1 - src/cpu/intel/model_65x/model_65x_init.c | 1 - src/cpu/intel/model_68x/model_68x_init.c | 1 - src/cpu/intel/model_69x/model_69x_init.c | 1 - src/cpu/intel/model_6bx/model_6bx_init.c | 1 - src/cpu/intel/model_6dx/model_6dx_init.c | 1 - src/cpu/intel/model_6ex/model_6ex_init.c | 1 - src/cpu/intel/model_6fx/model_6fx_init.c | 1 - src/cpu/intel/model_6xx/model_6xx_init.c | 1 - src/cpu/intel/model_f0x/model_f0x_init.c | 1 - src/cpu/intel/model_f1x/model_f1x_init.c | 1 - src/cpu/intel/model_f2x/model_f2x_init.c | 1 - src/cpu/intel/model_f3x/model_f3x_init.c | 1 - src/cpu/intel/model_f4x/model_f4x_init.c | 1 - 35 files changed, 39 deletions(-) diff --git a/src/cpu/amd/agesa/family10/model_10_init.c b/src/cpu/amd/agesa/family10/model_10_init.c index 899a3c4..6fbfd1a 100644 --- a/src/cpu/amd/agesa/family10/model_10_init.c +++ b/src/cpu/amd/agesa/family10/model_10_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c index 0dae912..635bd81 100644 --- a/src/cpu/amd/agesa/family12/model_12_init.c +++ b/src/cpu/amd/agesa/family12/model_12_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index 7ae2b24..1a97f2c 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family15/model_15_init.c b/src/cpu/amd/agesa/family15/model_15_init.c index ea7e663..a755e1c 100644 --- a/src/cpu/amd/agesa/family15/model_15_init.c +++ b/src/cpu/amd/agesa/family15/model_15_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index aebc27b..f396201 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index 2964b78..734d9ef 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c index 558fc75..e056a18 100644 --- a/src/cpu/amd/agesa/s3_resume.c +++ b/src/cpu/amd/agesa/s3_resume.c @@ -26,10 +26,6 @@ #include <cpu/x86/cache.h> #include <cbmem.h> #include <device/device.h> -#include <device/pci.h> -#ifndef __PRE_RAM__ -#include <device/pci_ops.h> -#endif #include <arch/io.h> #include <arch/acpi.h> #include <string.h> diff --git a/src/cpu/amd/geode_gx1/geode_gx1_init.c b/src/cpu/amd/geode_gx1/geode_gx1_init.c index 60f9473..8fbf507 100644 --- a/src/cpu/amd/geode_gx1/geode_gx1_init.c +++ b/src/cpu/amd/geode_gx1/geode_gx1_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/cpu/amd/geode_gx2/cpubug.c b/src/cpu/amd/geode_gx2/cpubug.c index eddc924..b6824ad 100644 --- a/src/cpu/amd/geode_gx2/cpubug.c +++ b/src/cpu/amd/geode_gx2/cpubug.c @@ -2,8 +2,6 @@ #include <arch/io.h> #include <stdint.h> #include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> #include <stdlib.h> #include <string.h> #include <cpu/amd/gx2def.h> diff --git a/src/cpu/amd/geode_gx2/geode_gx2_init.c b/src/cpu/amd/geode_gx2/geode_gx2_init.c index 7e481b5..b8f56db 100644 --- a/src/cpu/amd/geode_gx2/geode_gx2_init.c +++ b/src/cpu/amd/geode_gx2/geode_gx2_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/cpu/amd/geode_lx/geode_lx_init.c b/src/cpu/amd/geode_lx/geode_lx_init.c index e2eded0..cd931a4 100644 --- a/src/cpu/amd/geode_lx/geode_lx_init.c +++ b/src/cpu/amd/geode_lx/geode_lx_init.c @@ -24,7 +24,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/cpu/intel/ep80579/ep80579_init.c b/src/cpu/intel/ep80579/ep80579_init.c index 22166b1..433636d 100644 --- a/src/cpu/intel/ep80579/ep80579_init.c +++ b/src/cpu/intel/ep80579/ep80579_init.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/fsp_model_206ax/acpi.c b/src/cpu/intel/fsp_model_206ax/acpi.c index 47e651f..d24de06 100644 --- a/src/cpu/intel/fsp_model_206ax/acpi.c +++ b/src/cpu/intel/fsp_model_206ax/acpi.c @@ -29,7 +29,6 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <device/device.h> -#include <device/pci.h> #include "model_206ax.h" #include "chip.h" diff --git a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c index c362ae3..5f4d3ce 100644 --- a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c +++ b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <arch/acpi.h> #include <cpu/cpu.h> diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 9e10c75..c67c8a1 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -29,7 +29,6 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <device/device.h> -#include <device/pci.h> #include "haswell.h" #include "chip.h" diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index f8d295e..7c9beed 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <arch/acpi.h> #include <cpu/cpu.h> diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index 2b151a3..4779a51 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index 0d96172..356b86d 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index fa0dc95..49517ac 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -29,7 +29,6 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <device/device.h> -#include <device/pci.h> #include "model_2065x.h" #include "chip.h" diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index 6df45a4..2cbe906 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <arch/acpi.h> #include <cpu/cpu.h> diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 80ed4ba..f97c1ee 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -29,7 +29,6 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <device/device.h> -#include <device/pci.h> #include "model_206ax.h" #include "chip.h" diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 6028801..26fd721 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <arch/acpi.h> #include <cpu/cpu.h> diff --git a/src/cpu/intel/model_65x/model_65x_init.c b/src/cpu/intel/model_65x/model_65x_init.c index 6914122..a9f1811 100644 --- a/src/cpu/intel/model_65x/model_65x_init.c +++ b/src/cpu/intel/model_65x/model_65x_init.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <device/device.h> -#include <device/pci.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> diff --git a/src/cpu/intel/model_68x/model_68x_init.c b/src/cpu/intel/model_68x/model_68x_init.c index 4bb9b56..c2f0002 100644 --- a/src/cpu/intel/model_68x/model_68x_init.c +++ b/src/cpu/intel/model_68x/model_68x_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_69x/model_69x_init.c b/src/cpu/intel/model_69x/model_69x_init.c index 9ee7424..4339274 100644 --- a/src/cpu/intel/model_69x/model_69x_init.c +++ b/src/cpu/intel/model_69x/model_69x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6bx/model_6bx_init.c b/src/cpu/intel/model_6bx/model_6bx_init.c index e06665a..083109c 100644 --- a/src/cpu/intel/model_6bx/model_6bx_init.c +++ b/src/cpu/intel/model_6bx/model_6bx_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6dx/model_6dx_init.c b/src/cpu/intel/model_6dx/model_6dx_init.c index 06236a3..18c2fa4 100644 --- a/src/cpu/intel/model_6dx/model_6dx_init.c +++ b/src/cpu/intel/model_6dx/model_6dx_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c index 4dc642a..30d3f10 100644 --- a/src/cpu/intel/model_6ex/model_6ex_init.c +++ b/src/cpu/intel/model_6ex/model_6ex_init.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index 39aa8e9..034dc9c 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c index e81f9ae..9b92dcc 100644 --- a/src/cpu/intel/model_6xx/model_6xx_init.c +++ b/src/cpu/intel/model_6xx/model_6xx_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f0x/model_f0x_init.c b/src/cpu/intel/model_f0x/model_f0x_init.c index 8d81182..ca40515 100644 --- a/src/cpu/intel/model_f0x/model_f0x_init.c +++ b/src/cpu/intel/model_f0x/model_f0x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f1x/model_f1x_init.c b/src/cpu/intel/model_f1x/model_f1x_init.c index b294c61..dbb5cd0 100644 --- a/src/cpu/intel/model_f1x/model_f1x_init.c +++ b/src/cpu/intel/model_f1x/model_f1x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c index 9e8fbfc..53eb75e 100644 --- a/src/cpu/intel/model_f2x/model_f2x_init.c +++ b/src/cpu/intel/model_f2x/model_f2x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index 5752347..f8d9ca6 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c index 80d7dc8..260b60a 100644 --- a/src/cpu/intel/model_f4x/model_f4x_init.c +++ b/src/cpu/intel/model_f4x/model_f4x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h>

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Patch set updated for coreboot: ef08623 NOTFORMERGE: lenovo/t60: Enable Infrared port.
by Vladimir Serbinenko 12 Feb '14

12 Feb '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5174 -gerrit commit ef086232d524945280bdcfa3ece32170cb174d76 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Feb 9 12:34:02 2014 +0100 NOTFORMERGE: lenovo/t60: Enable Infrared port. Change-Id: I4d49ee83c8135de503dcfb84b950f98c2a2306c9 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/lenovo/t60/acpi/superio.asl | 16 ++++++++++++++++ src/mainboard/lenovo/t60/devicetree.cb | 4 ++++ src/mainboard/lenovo/t60/romstage.c | 2 +- 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/src/mainboard/lenovo/t60/acpi/superio.asl b/src/mainboard/lenovo/t60/acpi/superio.asl index e69de29..a0d8e0a 100644 --- a/src/mainboard/lenovo/t60/acpi/superio.asl +++ b/src/mainboard/lenovo/t60/acpi/superio.asl @@ -0,0 +1,16 @@ + Device (FIR) // Infrared + { + Name(_HID, EISAID("IBM0071")) + Name(_CID, EISAID("PNP0511")) + + Name(_CRS, ResourceTemplate() + { + IO (Decode16, 0x2f8, 0x2f8, 0x01, 0x08) + IRQNoFlags () {3} + }) + + Method (_STA, 0) + { + Return (0xf) + } + } diff --git a/src/mainboard/lenovo/t60/devicetree.cb b/src/mainboard/lenovo/t60/devicetree.cb index b87a223..cce5f93 100644 --- a/src/mainboard/lenovo/t60/devicetree.cb +++ b/src/mainboard/lenovo/t60/devicetree.cb @@ -148,6 +148,10 @@ chip northbridge/intel/i945 chip superio/nsc/pc87382 device pnp 164e.2 on # IR io 0x60 = 0x2f8 + irq 0x29 = 0xb0 + irq 0x70 = 0x3 + drq 0x74 = 0x1 + irq 0xf0 = 0x82 end device pnp 164e.3 off # Serial Port diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c index dae917c..237e967 100644 --- a/src/mainboard/lenovo/t60/romstage.c +++ b/src/mainboard/lenovo/t60/romstage.c @@ -79,7 +79,7 @@ static void ich7_enable_lpc(void) // decode range pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0210); // decode range - pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1f0d); + pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1f0f); /* range 0x1600 - 0x167f */ pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x84, 0x1601);

1 0

Patch set updated for coreboot: e2ea60e NOTFORMERGE: lenovo/x60: Enable Infrared port.
by Vladimir Serbinenko 12 Feb '14

12 Feb '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5170 -gerrit commit e2ea60e4589be1cddf90e4b55a1b01cfa653e0b0 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Sun Feb 9 02:17:26 2014 +0100 NOTFORMERGE: lenovo/x60: Enable Infrared port. Change-Id: I251031086dd5ac012e3dc2e8fed816a8ca629f15 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/lenovo/x60/acpi/superio.asl | 18 ++++++++++++++++++ src/mainboard/lenovo/x60/devicetree.cb | 4 ++++ src/mainboard/lenovo/x60/romstage.c | 2 +- 3 files changed, 23 insertions(+), 1 deletion(-) diff --git a/src/mainboard/lenovo/x60/acpi/superio.asl b/src/mainboard/lenovo/x60/acpi/superio.asl index 6786da7..c07b336 100644 --- a/src/mainboard/lenovo/x60/acpi/superio.asl +++ b/src/mainboard/lenovo/x60/acpi/superio.asl @@ -16,6 +16,24 @@ } #endif + Device (FIR) // Infrared + { + Name(_HID, EISAID("IBM0071")) + Name(_CID, EISAID("PNP0511")) + Name(_UID, 1) + + Name(_CRS, ResourceTemplate() + { + IO (Decode16, 0x2f8, 0x2f8, 0x01, 0x08) + IRQNoFlags () {3} + }) + + Method (_STA, 0) + { + Return (0xf) + } + } + Device (COMA) // Serial { Name(_HID, EISAID("PNP0501")) diff --git a/src/mainboard/lenovo/x60/devicetree.cb b/src/mainboard/lenovo/x60/devicetree.cb index 5b4e37f..acd5af3 100644 --- a/src/mainboard/lenovo/x60/devicetree.cb +++ b/src/mainboard/lenovo/x60/devicetree.cb @@ -125,6 +125,10 @@ chip northbridge/intel/i945 chip superio/nsc/pc87382 device pnp 164e.2 on # IR io 0x60 = 0x2f8 + irq 0x29 = 0xb0 + irq 0x70 = 0x3 + drq 0x74 = 0x1 + irq 0xf0 = 0x82 end device pnp 164e.3 on # Digitizer diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c index 1198fb2..8eca464 100644 --- a/src/mainboard/lenovo/x60/romstage.c +++ b/src/mainboard/lenovo/x60/romstage.c @@ -86,7 +86,7 @@ static void ich7_enable_lpc(void) // decode range pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0210); // decode range - pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1f0d); + pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x1f0f); /* range 0x1600 - 0x167f */ pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x84, 0x1601);

1 0

New patch to review for coreboot: 6a5a93f PCI: Drop includes under cpu
by Kyösti Mälkki 12 Feb '14

12 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5200 -gerrit commit 6a5a93ff95ef7041cdedbe5f9bd037461a251579 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 12 14:45:02 2014 +0200 PCI: Drop includes under cpu Change-Id: I3e7f009371be6ea50318eaabf0c15500cb3f1210 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/cpu/amd/agesa/family10/model_10_init.c | 1 - src/cpu/amd/agesa/family12/model_12_init.c | 1 - src/cpu/amd/agesa/family14/model_14_init.c | 1 - src/cpu/amd/agesa/family15/model_15_init.c | 1 - src/cpu/amd/agesa/family15tn/model_15_init.c | 1 - src/cpu/amd/agesa/family16kb/model_16_init.c | 1 - src/cpu/amd/agesa/s3_resume.c | 4 ---- src/cpu/amd/geode_gx1/geode_gx1_init.c | 1 - src/cpu/amd/geode_gx2/cpubug.c | 2 -- src/cpu/amd/geode_gx2/geode_gx2_init.c | 1 - src/cpu/amd/geode_lx/geode_lx_init.c | 1 - src/cpu/intel/ep80579/ep80579_init.c | 1 - src/cpu/intel/fsp_model_206ax/acpi.c | 1 - src/cpu/intel/fsp_model_206ax/model_206ax_init.c | 1 - src/cpu/intel/haswell/acpi.c | 1 - src/cpu/intel/haswell/haswell_init.c | 1 - src/cpu/intel/model_1067x/model_1067x_init.c | 1 - src/cpu/intel/model_106cx/model_106cx_init.c | 1 - src/cpu/intel/model_2065x/acpi.c | 1 - src/cpu/intel/model_2065x/model_2065x_init.c | 1 - src/cpu/intel/model_206ax/acpi.c | 1 - src/cpu/intel/model_206ax/model_206ax_init.c | 1 - src/cpu/intel/model_65x/model_65x_init.c | 1 - src/cpu/intel/model_68x/model_68x_init.c | 1 - src/cpu/intel/model_69x/model_69x_init.c | 1 - src/cpu/intel/model_6bx/model_6bx_init.c | 1 - src/cpu/intel/model_6dx/model_6dx_init.c | 1 - src/cpu/intel/model_6ex/model_6ex_init.c | 1 - src/cpu/intel/model_6fx/model_6fx_init.c | 1 - src/cpu/intel/model_6xx/model_6xx_init.c | 1 - src/cpu/intel/model_f0x/model_f0x_init.c | 1 - src/cpu/intel/model_f1x/model_f1x_init.c | 1 - src/cpu/intel/model_f2x/model_f2x_init.c | 1 - src/cpu/intel/model_f3x/model_f3x_init.c | 1 - src/cpu/intel/model_f4x/model_f4x_init.c | 1 - 35 files changed, 39 deletions(-) diff --git a/src/cpu/amd/agesa/family10/model_10_init.c b/src/cpu/amd/agesa/family10/model_10_init.c index 899a3c4..6fbfd1a 100644 --- a/src/cpu/amd/agesa/family10/model_10_init.c +++ b/src/cpu/amd/agesa/family10/model_10_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family12/model_12_init.c b/src/cpu/amd/agesa/family12/model_12_init.c index 0dae912..635bd81 100644 --- a/src/cpu/amd/agesa/family12/model_12_init.c +++ b/src/cpu/amd/agesa/family12/model_12_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family14/model_14_init.c b/src/cpu/amd/agesa/family14/model_14_init.c index 7ae2b24..1a97f2c 100644 --- a/src/cpu/amd/agesa/family14/model_14_init.c +++ b/src/cpu/amd/agesa/family14/model_14_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family15/model_15_init.c b/src/cpu/amd/agesa/family15/model_15_init.c index ea7e663..a755e1c 100644 --- a/src/cpu/amd/agesa/family15/model_15_init.c +++ b/src/cpu/amd/agesa/family15/model_15_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index aebc27b..f396201 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/family16kb/model_16_init.c b/src/cpu/amd/agesa/family16kb/model_16_init.c index 2964b78..734d9ef 100644 --- a/src/cpu/amd/agesa/family16kb/model_16_init.c +++ b/src/cpu/amd/agesa/family16kb/model_16_init.c @@ -21,7 +21,6 @@ #include <cpu/x86/msr.h> #include <cpu/amd/mtrr.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/x86/msr.h> #include <cpu/x86/pae.h> diff --git a/src/cpu/amd/agesa/s3_resume.c b/src/cpu/amd/agesa/s3_resume.c index 558fc75..e056a18 100644 --- a/src/cpu/amd/agesa/s3_resume.c +++ b/src/cpu/amd/agesa/s3_resume.c @@ -26,10 +26,6 @@ #include <cpu/x86/cache.h> #include <cbmem.h> #include <device/device.h> -#include <device/pci.h> -#ifndef __PRE_RAM__ -#include <device/pci_ops.h> -#endif #include <arch/io.h> #include <arch/acpi.h> #include <string.h> diff --git a/src/cpu/amd/geode_gx1/geode_gx1_init.c b/src/cpu/amd/geode_gx1/geode_gx1_init.c index 60f9473..8fbf507 100644 --- a/src/cpu/amd/geode_gx1/geode_gx1_init.c +++ b/src/cpu/amd/geode_gx1/geode_gx1_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/cpu/amd/geode_gx2/cpubug.c b/src/cpu/amd/geode_gx2/cpubug.c index eddc924..b6824ad 100644 --- a/src/cpu/amd/geode_gx2/cpubug.c +++ b/src/cpu/amd/geode_gx2/cpubug.c @@ -2,8 +2,6 @@ #include <arch/io.h> #include <stdint.h> #include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> #include <stdlib.h> #include <string.h> #include <cpu/amd/gx2def.h> diff --git a/src/cpu/amd/geode_gx2/geode_gx2_init.c b/src/cpu/amd/geode_gx2/geode_gx2_init.c index 7e481b5..b8f56db 100644 --- a/src/cpu/amd/geode_gx2/geode_gx2_init.c +++ b/src/cpu/amd/geode_gx2/geode_gx2_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/cpu/amd/geode_lx/geode_lx_init.c b/src/cpu/amd/geode_lx/geode_lx_init.c index e2eded0..cd931a4 100644 --- a/src/cpu/amd/geode_lx/geode_lx_init.c +++ b/src/cpu/amd/geode_lx/geode_lx_init.c @@ -24,7 +24,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/lapic.h> diff --git a/src/cpu/intel/ep80579/ep80579_init.c b/src/cpu/intel/ep80579/ep80579_init.c index 22166b1..433636d 100644 --- a/src/cpu/intel/ep80579/ep80579_init.c +++ b/src/cpu/intel/ep80579/ep80579_init.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/fsp_model_206ax/acpi.c b/src/cpu/intel/fsp_model_206ax/acpi.c index 47e651f..d24de06 100644 --- a/src/cpu/intel/fsp_model_206ax/acpi.c +++ b/src/cpu/intel/fsp_model_206ax/acpi.c @@ -29,7 +29,6 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <device/device.h> -#include <device/pci.h> #include "model_206ax.h" #include "chip.h" diff --git a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c index c362ae3..5f4d3ce 100644 --- a/src/cpu/intel/fsp_model_206ax/model_206ax_init.c +++ b/src/cpu/intel/fsp_model_206ax/model_206ax_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <arch/acpi.h> #include <cpu/cpu.h> diff --git a/src/cpu/intel/haswell/acpi.c b/src/cpu/intel/haswell/acpi.c index 9e10c75..c67c8a1 100644 --- a/src/cpu/intel/haswell/acpi.c +++ b/src/cpu/intel/haswell/acpi.c @@ -29,7 +29,6 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <device/device.h> -#include <device/pci.h> #include "haswell.h" #include "chip.h" diff --git a/src/cpu/intel/haswell/haswell_init.c b/src/cpu/intel/haswell/haswell_init.c index f8d295e..7c9beed 100644 --- a/src/cpu/intel/haswell/haswell_init.c +++ b/src/cpu/intel/haswell/haswell_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <arch/acpi.h> #include <cpu/cpu.h> diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index 2b151a3..4779a51 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index 0d96172..356b86d 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -19,7 +19,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_2065x/acpi.c b/src/cpu/intel/model_2065x/acpi.c index fa0dc95..49517ac 100644 --- a/src/cpu/intel/model_2065x/acpi.c +++ b/src/cpu/intel/model_2065x/acpi.c @@ -29,7 +29,6 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <device/device.h> -#include <device/pci.h> #include "model_2065x.h" #include "chip.h" diff --git a/src/cpu/intel/model_2065x/model_2065x_init.c b/src/cpu/intel/model_2065x/model_2065x_init.c index 6df45a4..2cbe906 100644 --- a/src/cpu/intel/model_2065x/model_2065x_init.c +++ b/src/cpu/intel/model_2065x/model_2065x_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <arch/acpi.h> #include <cpu/cpu.h> diff --git a/src/cpu/intel/model_206ax/acpi.c b/src/cpu/intel/model_206ax/acpi.c index 80ed4ba..f97c1ee 100644 --- a/src/cpu/intel/model_206ax/acpi.c +++ b/src/cpu/intel/model_206ax/acpi.c @@ -29,7 +29,6 @@ #include <cpu/intel/speedstep.h> #include <cpu/intel/turbo.h> #include <device/device.h> -#include <device/pci.h> #include "model_206ax.h" #include "chip.h" diff --git a/src/cpu/intel/model_206ax/model_206ax_init.c b/src/cpu/intel/model_206ax/model_206ax_init.c index 6028801..26fd721 100644 --- a/src/cpu/intel/model_206ax/model_206ax_init.c +++ b/src/cpu/intel/model_206ax/model_206ax_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <arch/acpi.h> #include <cpu/cpu.h> diff --git a/src/cpu/intel/model_65x/model_65x_init.c b/src/cpu/intel/model_65x/model_65x_init.c index 6914122..a9f1811 100644 --- a/src/cpu/intel/model_65x/model_65x_init.c +++ b/src/cpu/intel/model_65x/model_65x_init.c @@ -20,7 +20,6 @@ #include <stdint.h> #include <device/device.h> -#include <device/pci.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> diff --git a/src/cpu/intel/model_68x/model_68x_init.c b/src/cpu/intel/model_68x/model_68x_init.c index 4bb9b56..c2f0002 100644 --- a/src/cpu/intel/model_68x/model_68x_init.c +++ b/src/cpu/intel/model_68x/model_68x_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_69x/model_69x_init.c b/src/cpu/intel/model_69x/model_69x_init.c index 9ee7424..4339274 100644 --- a/src/cpu/intel/model_69x/model_69x_init.c +++ b/src/cpu/intel/model_69x/model_69x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6bx/model_6bx_init.c b/src/cpu/intel/model_6bx/model_6bx_init.c index e06665a..083109c 100644 --- a/src/cpu/intel/model_6bx/model_6bx_init.c +++ b/src/cpu/intel/model_6bx/model_6bx_init.c @@ -22,7 +22,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6dx/model_6dx_init.c b/src/cpu/intel/model_6dx/model_6dx_init.c index 06236a3..18c2fa4 100644 --- a/src/cpu/intel/model_6dx/model_6dx_init.c +++ b/src/cpu/intel/model_6dx/model_6dx_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c index 4dc642a..30d3f10 100644 --- a/src/cpu/intel/model_6ex/model_6ex_init.c +++ b/src/cpu/intel/model_6ex/model_6ex_init.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index 39aa8e9..034dc9c 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -21,7 +21,6 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c index e81f9ae..9b92dcc 100644 --- a/src/cpu/intel/model_6xx/model_6xx_init.c +++ b/src/cpu/intel/model_6xx/model_6xx_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f0x/model_f0x_init.c b/src/cpu/intel/model_f0x/model_f0x_init.c index 8d81182..ca40515 100644 --- a/src/cpu/intel/model_f0x/model_f0x_init.c +++ b/src/cpu/intel/model_f0x/model_f0x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f1x/model_f1x_init.c b/src/cpu/intel/model_f1x/model_f1x_init.c index b294c61..dbb5cd0 100644 --- a/src/cpu/intel/model_f1x/model_f1x_init.c +++ b/src/cpu/intel/model_f1x/model_f1x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c index 9e8fbfc..53eb75e 100644 --- a/src/cpu/intel/model_f2x/model_f2x_init.c +++ b/src/cpu/intel/model_f2x/model_f2x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index 5752347..f8d9ca6 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c index 80d7dc8..260b60a 100644 --- a/src/cpu/intel/model_f4x/model_f4x_init.c +++ b/src/cpu/intel/model_f4x/model_f4x_init.c @@ -1,6 +1,5 @@ #include <console/console.h> #include <device/device.h> -#include <device/pci.h> #include <string.h> #include <cpu/cpu.h> #include <cpu/x86/mtrr.h>

1 0

Patch set updated for coreboot: fecfe30 usbdebug: Remove EHCI_DEBUG_OFFSET
by Kyösti Mälkki 12 Feb '14

12 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5176 -gerrit commit fecfe30d0548604cf11a2202074407b73ee8e2b6 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Feb 9 19:21:30 2014 +0200 usbdebug: Remove EHCI_DEBUG_OFFSET Read this variable from PCI configuration capabilities list instead. Change-Id: I0cfe981833873397c32cd3aa2af307f35f01784b Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/drivers/usb/ehci_debug.c | 9 ++++++--- src/drivers/usb/ehci_debug.h | 2 +- src/drivers/usb/pci_ehci.c | 25 +++++++++++++++++++++++-- src/southbridge/amd/agesa/hudson/Kconfig | 4 ---- src/southbridge/amd/cimx/sb700/Kconfig | 4 ---- src/southbridge/amd/cimx/sb800/Kconfig | 4 ---- src/southbridge/amd/sb600/Kconfig | 4 ---- src/southbridge/amd/sb700/Kconfig | 4 ---- src/southbridge/amd/sb800/Kconfig | 4 ---- src/southbridge/intel/bd82x6x/Kconfig | 4 ---- src/southbridge/intel/fsp_bd82x6x/Kconfig | 4 ---- src/southbridge/intel/i82801dx/Kconfig | 4 ---- src/southbridge/intel/i82801ex/Kconfig | 4 ---- src/southbridge/intel/i82801gx/Kconfig | 4 ---- src/southbridge/intel/i82801ix/Kconfig | 4 ---- src/southbridge/intel/ibexpeak/Kconfig | 4 ---- src/southbridge/intel/lynxpoint/Kconfig | 4 ---- src/southbridge/intel/sch/Kconfig | 4 ---- src/southbridge/nvidia/ck804/Kconfig | 4 ---- src/southbridge/nvidia/mcp55/Kconfig | 4 ---- src/southbridge/sis/sis966/Kconfig | 3 --- 21 files changed, 30 insertions(+), 77 deletions(-) diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index 26d61fb..beb553e 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -588,6 +588,8 @@ static int usbdebug_init_(unsigned ehci_bar, unsigned offset, struct ehci_debug_ int port_map_tried; int playtimes = 3; + dprintk(BIOS_INFO, "ehci_bar: 0x%x debug_offset 0x%x\n", ehci_bar, offset); + ehci_caps = (struct ehci_caps *)ehci_bar; ehci_regs = (struct ehci_regs *)(ehci_bar + HC_LENGTH(read32((unsigned long)&ehci_caps->hc_capbase))); @@ -608,7 +610,6 @@ try_next_port: debug_port = HCS_DEBUG_PORT(hcs_params); n_ports = HCS_N_PORTS(hcs_params); - dprintk(BIOS_INFO, "ehci_bar: 0x%x\n", ehci_bar); dprintk(BIOS_INFO, "debug_port: %d\n", debug_port); dprintk(BIOS_INFO, "n_ports: %d\n", n_ports); @@ -985,11 +986,13 @@ struct dbgp_pipe *dbgp_console_input(void) int usbdebug_init(void) { struct ehci_debug_info *dbg_info = dbgp_ehci_info(); + unsigned int ehci_base, dbg_offset; #if !defined(__PRE_RAM__) && !defined(__SMM__) if (!get_usbdebug_from_cbmem(dbg_info)) return 0; #endif - ehci_debug_hw_enable(); - return usbdebug_init_(CONFIG_EHCI_BAR, CONFIG_EHCI_DEBUG_OFFSET, dbg_info); + if (ehci_debug_hw_enable(&ehci_base, &dbg_offset)) + return -1; + return usbdebug_init_(ehci_base, dbg_offset, dbg_info); } diff --git a/src/drivers/usb/ehci_debug.h b/src/drivers/usb/ehci_debug.h index 462eb23..2e549d2 100644 --- a/src/drivers/usb/ehci_debug.h +++ b/src/drivers/usb/ehci_debug.h @@ -24,7 +24,7 @@ void usbdebug_re_enable(unsigned ehci_base); void usbdebug_disable(void); -void ehci_debug_hw_enable(void); +int ehci_debug_hw_enable(unsigned *base, unsigned *dbg_offset); void ehci_debug_select_port(unsigned int port); #endif /* _EHCI_DEBUG_H_ */ diff --git a/src/drivers/usb/pci_ehci.c b/src/drivers/usb/pci_ehci.c index 7c715f6..0f6b026 100644 --- a/src/drivers/usb/pci_ehci.c +++ b/src/drivers/usb/pci_ehci.c @@ -34,12 +34,33 @@ static struct device_operations *ehci_drv_ops; static struct device_operations ehci_dbg_ops; #endif -void ehci_debug_hw_enable(void) +/* Returns 0 and sets MMIO base and dbg_offset if EHCI debug capability + * was found and enabled. Returns non-zero on error. + */ +int ehci_debug_hw_enable(unsigned int *base, unsigned int *dbg_offset) { -#if defined(__PRE_RAM__) || !CONFIG_USBDEBUG_IN_ROMSTAGE pci_devfn_t dbg_dev = pci_ehci_dbg_dev(CONFIG_USBDEBUG_HCD_INDEX); pci_ehci_dbg_enable(dbg_dev, CONFIG_EHCI_BAR); +#ifdef __SIMPLE_DEVICE__ + pci_devfn_t dev = dbg_dev; +#else + device_t dev = dev_find_slot(PCI_DEV2SEGBUS(dbg_dev), PCI_DEV2DEVFN(dbg_dev)); #endif + + u8 pos = pci_find_capability(dev, PCI_CAP_ID_EHCI_DEBUG); + if (!pos) + return 1; + + u32 cap = pci_read_config32(dev, pos); + + /* FIXME: We should remove static EHCI_BAR_INDEX. */ + u8 dbg_bar = 0x10 + 4 * ((cap >> 29) - 1); + if (dbg_bar != EHCI_BAR_INDEX) + return 1; + + *base = CONFIG_EHCI_BAR; + *dbg_offset = (cap>>16) & 0x1ffc; + return 0; } void ehci_debug_select_port(unsigned int port) diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig index 1550cb4..dd5120d 100644 --- a/src/southbridge/amd/agesa/hudson/Kconfig +++ b/src/southbridge/amd/agesa/hudson/Kconfig @@ -43,10 +43,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xe0 - config HUDSON_XHCI_ENABLE bool "Enable Hudson XHCI Controller" default y diff --git a/src/southbridge/amd/cimx/sb700/Kconfig b/src/southbridge/amd/cimx/sb700/Kconfig index 4304357..d8bad86 100644 --- a/src/southbridge/amd/cimx/sb700/Kconfig +++ b/src/southbridge/amd/cimx/sb700/Kconfig @@ -54,10 +54,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xe0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/amd/cimx/sb700/bootblock.c" diff --git a/src/southbridge/amd/cimx/sb800/Kconfig b/src/southbridge/amd/cimx/sb800/Kconfig index 37aff9e..832655d 100644 --- a/src/southbridge/amd/cimx/sb800/Kconfig +++ b/src/southbridge/amd/cimx/sb800/Kconfig @@ -209,10 +209,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xe0 - choice prompt "Fan Control" default SB800_NO_FAN_CONTROL diff --git a/src/southbridge/amd/sb600/Kconfig b/src/southbridge/amd/sb600/Kconfig index fe9468d..4d5fff4 100644 --- a/src/southbridge/amd/sb600/Kconfig +++ b/src/southbridge/amd/sb600/Kconfig @@ -32,10 +32,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xe0 - choice prompt "SATA Mode" default SATA_MODE_IDE diff --git a/src/southbridge/amd/sb700/Kconfig b/src/southbridge/amd/sb700/Kconfig index b0c92dc..e391fc8 100644 --- a/src/southbridge/amd/sb700/Kconfig +++ b/src/southbridge/amd/sb700/Kconfig @@ -45,8 +45,4 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xe0 - endif # SOUTHBRIDGE_AMD_SB700 diff --git a/src/southbridge/amd/sb800/Kconfig b/src/southbridge/amd/sb800/Kconfig index 9547d3e..24dc007 100644 --- a/src/southbridge/amd/sb800/Kconfig +++ b/src/southbridge/amd/sb800/Kconfig @@ -37,8 +37,4 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xe0 - endif # SOUTHBRIDGE_AMD_SB800 diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index d060dae..9cfa5d5 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -41,10 +41,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config DRAM_RESET_GATE_GPIO int default 60 diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig index 1a8e80a..b2b4929 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Kconfig +++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig @@ -37,10 +37,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/fsp_bd82x6x/bootblock.c" diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig index f7f93a7..8ef778f 100644 --- a/src/southbridge/intel/i82801dx/Kconfig +++ b/src/southbridge/intel/i82801dx/Kconfig @@ -33,8 +33,4 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0x80 - endif diff --git a/src/southbridge/intel/i82801ex/Kconfig b/src/southbridge/intel/i82801ex/Kconfig index e4e9160..caa5c79 100644 --- a/src/southbridge/intel/i82801ex/Kconfig +++ b/src/southbridge/intel/i82801ex/Kconfig @@ -11,8 +11,4 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - endif diff --git a/src/southbridge/intel/i82801gx/Kconfig b/src/southbridge/intel/i82801gx/Kconfig index 62c6b43..777b69b 100644 --- a/src/southbridge/intel/i82801gx/Kconfig +++ b/src/southbridge/intel/i82801gx/Kconfig @@ -32,10 +32,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/i82801gx/bootblock.c" diff --git a/src/southbridge/intel/i82801ix/Kconfig b/src/southbridge/intel/i82801ix/Kconfig index 8a4a53e..493be60 100644 --- a/src/southbridge/intel/i82801ix/Kconfig +++ b/src/southbridge/intel/i82801ix/Kconfig @@ -33,10 +33,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/i82801ix/bootblock.c" diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig index 97d5883..c05fe43 100644 --- a/src/southbridge/intel/ibexpeak/Kconfig +++ b/src/southbridge/intel/ibexpeak/Kconfig @@ -39,10 +39,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config DRAM_RESET_GATE_GPIO int default 60 diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig index 5ff00db..bfb7b73 100644 --- a/src/southbridge/intel/lynxpoint/Kconfig +++ b/src/southbridge/intel/lynxpoint/Kconfig @@ -44,10 +44,6 @@ config EHCI_BAR hex default 0xe8000000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config BOOTBLOCK_SOUTHBRIDGE_INIT string default "southbridge/intel/lynxpoint/bootblock.c" diff --git a/src/southbridge/intel/sch/Kconfig b/src/southbridge/intel/sch/Kconfig index 432fb8d..d320a53 100644 --- a/src/southbridge/intel/sch/Kconfig +++ b/src/southbridge/intel/sch/Kconfig @@ -30,10 +30,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0xa0 - config HAVE_CMC bool "Add a CMC state machine binary" help diff --git a/src/southbridge/nvidia/ck804/Kconfig b/src/southbridge/nvidia/ck804/Kconfig index b6f718e..e21f79e 100644 --- a/src/southbridge/nvidia/ck804/Kconfig +++ b/src/southbridge/nvidia/ck804/Kconfig @@ -14,10 +14,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0x98 - config CK804_USE_NIC bool default n diff --git a/src/southbridge/nvidia/mcp55/Kconfig b/src/southbridge/nvidia/mcp55/Kconfig index cd6009d..89aa452 100644 --- a/src/southbridge/nvidia/mcp55/Kconfig +++ b/src/southbridge/nvidia/mcp55/Kconfig @@ -14,10 +14,6 @@ config EHCI_BAR hex default 0xfef00000 -config EHCI_DEBUG_OFFSET - hex - default 0x98 - config MCP55_USE_NIC bool default n diff --git a/src/southbridge/sis/sis966/Kconfig b/src/southbridge/sis/sis966/Kconfig index 03dd6b1..1fbd57d 100644 --- a/src/southbridge/sis/sis966/Kconfig +++ b/src/southbridge/sis/sis966/Kconfig @@ -12,6 +12,3 @@ config EHCI_BAR hex default 0xfef00000 if SOUTHBRIDGE_SIS_SIS966 -config EHCI_DEBUG_OFFSET - hex - default 0x98 if SOUTHBRIDGE_SIS_SIS966

1 0

Patch set updated for coreboot: 3cdb0a9 usbdebug: Split to USB host/device
by Kyösti Mälkki 12 Feb '14

12 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5197 -gerrit commit 3cdb0a915b4db35adb1e65f56f19a2b44dc7e60b Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Sun Feb 9 23:35:39 2014 +0200 usbdebug: Split to USB host/device Top-level interface to console over USB mut not require low-level details of ECHI debug port internals. Change-Id: If3ca3b1f479e3f20976cd4abd8f5e682a58d5650 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/drivers/usb/Makefile.inc | 4 +-- src/drivers/usb/console.c | 64 ++++++++++++++++++++++++++++++++++++++++++++ src/drivers/usb/ehci_debug.c | 63 ++----------------------------------------- src/drivers/usb/ehci_debug.h | 22 +++++++++++++++ 4 files changed, 90 insertions(+), 63 deletions(-) diff --git a/src/drivers/usb/Makefile.inc b/src/drivers/usb/Makefile.inc index 043ebe1..bab6737 100644 --- a/src/drivers/usb/Makefile.inc +++ b/src/drivers/usb/Makefile.inc @@ -1,3 +1,3 @@ -romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c pci_ehci.c +romstage-$(CONFIG_USBDEBUG_IN_ROMSTAGE) += ehci_debug.c pci_ehci.c console.c -ramstage-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c +ramstage-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c diff --git a/src/drivers/usb/console.c b/src/drivers/usb/console.c new file mode 100644 index 0000000..c47610a --- /dev/null +++ b/src/drivers/usb/console.c @@ -0,0 +1,64 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2006 Eric Biederman (ebiederm(a)xmission.com) + * Copyright (C) 2007 AMD + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +#include <stddef.h> +#include <console/console.h> +#include <console/usb.h> +#include "ehci_debug.h" + +void usbdebug_tx_byte(struct dbgp_pipe *pipe, unsigned char data) +{ + if (!dbgp_try_get(pipe)) + return; + pipe->buf[pipe->bufidx++] = data; + if (pipe->bufidx >= 8) { + dbgp_bulk_write_x(pipe, pipe->buf, pipe->bufidx); + pipe->bufidx = 0; + } + dbgp_put(pipe); +} + +void usbdebug_tx_flush(struct dbgp_pipe *pipe) +{ + if (!dbgp_try_get(pipe)) + return; + if (pipe->bufidx > 0) { + dbgp_bulk_write_x(pipe, pipe->buf, pipe->bufidx); + pipe->bufidx = 0; + } + dbgp_put(pipe); +} + +unsigned char usbdebug_rx_byte(struct dbgp_pipe *pipe) +{ + unsigned char data = 0xff; + if (!dbgp_try_get(pipe)) + return 0xff; + while (pipe->bufidx >= pipe->buflen) { + pipe->buflen = 0; + pipe->bufidx = 0; + int count = dbgp_bulk_read_x(pipe, pipe->buf, 8); + if (count>0) + pipe->buflen = count; + } + data = pipe->buf[pipe->bufidx++]; + dbgp_put(pipe); + return data; +} diff --git a/src/drivers/usb/ehci_debug.c b/src/drivers/usb/ehci_debug.c index beb553e..c60fbaa 100644 --- a/src/drivers/usb/ehci_debug.c +++ b/src/drivers/usb/ehci_debug.c @@ -31,25 +31,6 @@ #include "usb_ch9.h" #include "ehci.h" - -#define DBGP_EP_VALID (1<<0) -#define DBGP_EP_ENABLED (1<<1) -#define DBGP_EP_BUSY (1<<2) -#define DBGP_EP_STATMASK (DBGP_EP_VALID | DBGP_EP_ENABLED) - -struct dbgp_pipe -{ - u8 devnum; - u8 endpoint; - u8 pid; - u8 status; - int timeout; - - u8 bufidx; - u8 buflen; - char buf[8]; -}; - #define DBGP_MAX_ENDPOINTS 4 #define DBGP_SETUP_EP0 0 /* Compulsory endpoint 0. */ #define DBGP_CONSOLE_EPOUT 1 @@ -852,7 +833,7 @@ static int dbgp_enabled(void) } #endif -static int dbgp_try_get(struct dbgp_pipe *pipe) +int dbgp_try_get(struct dbgp_pipe *pipe) { struct dbgp_pipe *globals = &dbgp_ehci_info()->ep_pipe[DBGP_SETUP_EP0]; if (!dbgp_ep_is_active(pipe) || (globals->status & DBGP_EP_BUSY)) @@ -862,53 +843,13 @@ static int dbgp_try_get(struct dbgp_pipe *pipe) return 1; } -static void dbgp_put(struct dbgp_pipe *pipe) +void dbgp_put(struct dbgp_pipe *pipe) { struct dbgp_pipe *globals = &dbgp_ehci_info()->ep_pipe[DBGP_SETUP_EP0]; globals->status &= ~DBGP_EP_BUSY; pipe->status &= ~DBGP_EP_BUSY; } -void usbdebug_tx_byte(struct dbgp_pipe *pipe, unsigned char data) -{ - if (!dbgp_try_get(pipe)) - return; - pipe->buf[pipe->bufidx++] = data; - if (pipe->bufidx >= 8) { - dbgp_bulk_write_x(pipe, pipe->buf, pipe->bufidx); - pipe->bufidx = 0; - } - dbgp_put(pipe); -} - -void usbdebug_tx_flush(struct dbgp_pipe *pipe) -{ - if (!dbgp_try_get(pipe)) - return; - if (pipe->bufidx > 0) { - dbgp_bulk_write_x(pipe, pipe->buf, pipe->bufidx); - pipe->bufidx = 0; - } - dbgp_put(pipe); -} - -unsigned char usbdebug_rx_byte(struct dbgp_pipe *pipe) -{ - unsigned char data = 0xff; - if (!dbgp_try_get(pipe)) - return 0xff; - while (pipe->bufidx >= pipe->buflen) { - pipe->buflen = 0; - pipe->bufidx = 0; - int count = dbgp_bulk_read_x(pipe, pipe->buf, 8); - if (count>0) - pipe->buflen = count; - } - data = pipe->buf[pipe->bufidx++]; - dbgp_put(pipe); - return data; -} - #if !defined(__PRE_RAM__) && !defined(__SMM__) void usbdebug_re_enable(unsigned ehci_base) { diff --git a/src/drivers/usb/ehci_debug.h b/src/drivers/usb/ehci_debug.h index 2e549d2..c470ad6 100644 --- a/src/drivers/usb/ehci_debug.h +++ b/src/drivers/usb/ehci_debug.h @@ -27,4 +27,26 @@ void usbdebug_disable(void); int ehci_debug_hw_enable(unsigned *base, unsigned *dbg_offset); void ehci_debug_select_port(unsigned int port); + +#define DBGP_EP_VALID (1<<0) +#define DBGP_EP_ENABLED (1<<1) +#define DBGP_EP_BUSY (1<<2) +#define DBGP_EP_STATMASK (DBGP_EP_VALID | DBGP_EP_ENABLED) + +struct dbgp_pipe +{ + u8 devnum; + u8 endpoint; + u8 pid; + u8 status; + int timeout; + + u8 bufidx; + u8 buflen; + char buf[8]; +}; + +void dbgp_put(struct dbgp_pipe *pipe); +int dbgp_try_get(struct dbgp_pipe *pipe); + #endif /* _EHCI_DEBUG_H_ */

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New patch to review for coreboot: c80879f PCI: Guard pci.h with CONFIG_PCI
by Kyösti Mälkki 12 Feb '14

12 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5199 -gerrit commit c80879f36e0d0b7295510edbaad26d9807ce5007 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Wed Feb 12 14:18:50 2014 +0200 PCI: Guard pci.h with CONFIG_PCI Adding PCI functions for romstage in pci.h breaks ARMv7 build without this. Also fix two related includes to use pci_def.h instead. Change-Id: I5291eaf6ddf5a584f50af29cf791d2ca4d9caa71 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/device.c | 2 +- src/device/device_util.c | 2 +- src/include/device/pci.h | 5 +++++ 3 files changed, 7 insertions(+), 2 deletions(-) diff --git a/src/device/device.c b/src/device/device.c index 9e06810..e068cee 100644 --- a/src/device/device.c +++ b/src/device/device.c @@ -35,7 +35,7 @@ #include <console/console.h> #include <arch/io.h> #include <device/device.h> -#include <device/pci.h> +#include <device/pci_def.h> #include <device/pci_ids.h> #include <stdlib.h> #include <string.h> diff --git a/src/device/device_util.c b/src/device/device_util.c index dc43b9a..2bed4a9 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -25,7 +25,7 @@ #include <console/console.h> #include <device/device.h> #include <device/path.h> -#include <device/pci.h> +#include <device/pci_def.h> #include <device/resource.h> #include <string.h> diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 1741c0d..7504cc7 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -15,6 +15,8 @@ #ifndef PCI_H #define PCI_H +#if CONFIG_PCI + #include <stdint.h> #include <stddef.h> #include <arch/rules.h> @@ -98,4 +100,7 @@ static inline const struct pci_operations *ops_pci(device_t dev) } #endif /* ! __SIMPLE_DEVICE__ */ + +#endif /* CONFIG_PCI */ + #endif /* PCI_H */

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Patch set updated for coreboot: ad93af5 PCI: Add capability list parser to romstage
by Kyösti Mälkki 12 Feb '14

12 Feb '14

Kyösti Mälkki (kyosti.malkki(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5196 -gerrit commit ad93af5c5e48c4882a63447b9d3b8d1def8f7277 Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Date: Tue Feb 11 19:56:57 2014 +0200 PCI: Add capability list parser to romstage These are almost one-to-one copies from pci_device.c. However, devicetree has not been enumerated yet and we have no console. Change-Id: Ic80c781626521d03adde05bdb1916acce31290ea Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- src/device/Makefile.inc | 3 ++- src/device/pci_early.c | 68 ++++++++++++++++++++++++++++++++++++++++++++++++ src/include/device/pci.h | 6 +++-- 3 files changed, 74 insertions(+), 3 deletions(-) diff --git a/src/device/Makefile.inc b/src/device/Makefile.inc index 1dbb510..ce412b7 100644 --- a/src/device/Makefile.inc +++ b/src/device/Makefile.inc @@ -13,7 +13,8 @@ ramstage-$(CONFIG_ARCH_X86) += pnp_device.c ramstage-$(CONFIG_PCI) += pci_ops.c ramstage-y += smbus_ops.c -romstage-y+= device_romstage.c +romstage-y += device_romstage.c +romstage-$(CONFIG_PCI) += pci_early.c subdirs-y += oprom diff --git a/src/device/pci_early.c b/src/device/pci_early.c new file mode 100644 index 0000000..c15a4d0 --- /dev/null +++ b/src/device/pci_early.c @@ -0,0 +1,68 @@ +/* + * This file is part of the coreboot project. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA + */ + +#include <arch/io.h> +#include <device/pci.h> +#include <device/pci_def.h> + +unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last) +{ + unsigned pos = 0; + u16 status; + unsigned reps = 48; + + status = pci_read_config16(dev, PCI_STATUS); + if (!(status & PCI_STATUS_CAP_LIST)) + return 0; + + u8 hdr_type = pci_read_config8(dev, PCI_HEADER_TYPE); + switch (hdr_type & 0x7f) { + case PCI_HEADER_TYPE_NORMAL: + case PCI_HEADER_TYPE_BRIDGE: + pos = PCI_CAPABILITY_LIST; + break; + case PCI_HEADER_TYPE_CARDBUS: + pos = PCI_CB_CAPABILITY_LIST; + break; + default: + return 0; + } + + pos = pci_read_config8(dev, pos); + while (reps-- && (pos >= 0x40)) { /* Loop through the linked list. */ + int this_cap; + + pos &= ~3; + this_cap = pci_read_config8(dev, pos + PCI_CAP_LIST_ID); + if (this_cap == 0xff) + break; + + if (!last && (this_cap == cap)) + return pos; + + if (last == pos) + last = 0; + + pos = pci_read_config8(dev, pos + PCI_CAP_LIST_NEXT); + } + return 0; +} + +unsigned pci_find_capability(device_t dev, unsigned cap) +{ + return pci_find_next_capability(dev, cap, 0); +} diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 7504cc7..29d988f 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -20,6 +20,7 @@ #include <stdint.h> #include <stddef.h> #include <arch/rules.h> +#include <arch/io.h> #include <device/pci_def.h> #include <device/resource.h> #include <device/device.h> @@ -76,8 +77,6 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devf uint8_t pci_moving_config8(struct device *dev, unsigned reg); uint16_t pci_moving_config16(struct device *dev, unsigned reg); uint32_t pci_moving_config32(struct device *dev, unsigned reg); -unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last); -unsigned pci_find_capability(device_t dev, unsigned cap); struct resource *pci_get_resource(struct device *dev, unsigned long index); void pci_dev_set_subsystem(device_t dev, unsigned vendor, unsigned device); void pci_dev_init(struct device *dev); @@ -101,6 +100,9 @@ static inline const struct pci_operations *ops_pci(device_t dev) #endif /* ! __SIMPLE_DEVICE__ */ +unsigned pci_find_next_capability(device_t dev, unsigned cap, unsigned last); +unsigned pci_find_capability(device_t dev, unsigned cap); + #endif /* CONFIG_PCI */ #endif /* PCI_H */

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coreboot-gerrit February 2014